Re: [PATCH] PM / devfreq: tegra30: disable clock on error in probe

Dmitry Osipenko
2020-09-14T14:28:46Z

14.09.2020 17:17, Dan Carpenter пишет:
...
>>> Is it doesn't need to reset with reset_contrl_reset()?
>>
>> Hello, Chanwoo!
>>
>> It's reset just before the clk_round_rate() invocation, hence there
>> shouldn't be a need to reset it second time.
>
> Ah... I was looking the wrong code. Plus I don't really know this code
> very well.
>
> If clk_prepare_enable() fails, then I would have assumed we need to call
> reset_control_deassert(). I would have assumed the
> reset_control_assert() and _deassert() functions were paired. So what
> I'm suggesting is something like the following: (I'll resend this if
> it's correct).

The reset shouldn't be deasserted if clk-enable fails.

Reset deassertion should be done only with enabled clock because reset
happens synchronously with a clock tick, otherwise it makes no much
sense to deassert the reset.

Yours current v1 variant is already good to me.