Re: [PATCH v6 23/52] ARM: tegra: Add interconnect properties to Tegra124 device-tree

Krzysztof Kozlowski
2020-10-27T09:16:12Z

On Mon, Oct 26, 2020 at 01:17:06AM +0300, Dmitry Osipenko wrote:
> Add interconnect properties to the Memory Controller, External Memory
> Controller and the Display Controller nodes in order to describe hardware
> interconnection.
>
> Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
> ---
> arch/arm/boot/dts/tegra124.dtsi | 25 +++++++++++++++++++++++++
> 1 file changed, 25 insertions(+)
>
> diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi
> index 64f488ba1e72..1801e30b1d3a 100644
> --- a/arch/arm/boot/dts/tegra124.dtsi
> +++ b/arch/arm/boot/dts/tegra124.dtsi
> @@ -113,6 +113,19 @@ dc@54200000 {
> iommus = <&mc TEGRA_SWGROUP_DC>;
>
> nvidia,head = <0>;
> +
> + interconnects = <&mc TEGRA124_MC_DISPLAY0A &emc>,

This does not compile.

> + <&mc TEGRA124_MC_DISPLAY0B &emc>,
> + <&mc TEGRA124_MC_DISPLAY0C &emc>,
> + <&mc TEGRA124_MC_DISPLAYHC &emc>,
> + <&mc TEGRA124_MC_DISPLAYD &emc>,
> + <&mc TEGRA124_MC_DISPLAYT &emc>;
> + interconnect-names = "wina",
> + "winb",
> + "winc",
> + "cursor",
> + "wind",
> + "wint";
> };
>
> dc@54240000 {
> @@ -127,6 +140,15 @@ dc@54240000 {
> iommus = <&mc TEGRA_SWGROUP_DCB>;
>
> nvidia,head = <1>;
> +
> + interconnects = <&mc TEGRA124_MC_DISPLAY0AB &emc>,
> + <&mc TEGRA124_MC_DISPLAY0BB &emc>,
> + <&mc TEGRA124_MC_DISPLAY0CB &emc>,
> + <&mc TEGRA124_MC_DISPLAYHCB &emc>;
> + interconnect-names = "wina",
> + "winb",
> + "winc",
> + "cursor";
> };
>
> hdmi: hdmi@54280000 {
> @@ -628,6 +650,7 @@ mc: memory-controller@70019000 {
>
> #iommu-cells = <1>;
> #reset-cells = <1>;
> + #interconnect-cells = <1>;
> };
>
> emc: external-memory-controller@7001b000 {
> @@ -637,6 +660,8 @@ emc: external-memory-controller@7001b000 {
> clock-names = "emc";
>
> nvidia,memory-controller = <&mc>;
> +

No need for blank line.

Best regards,
Krzysztof