* [PATCH 2/3] thermal: mediatek: control buffer enablement tweaks
2022-05-30 18:38 [PATCH 1/3] dt-bindings: thermal: mediatek: add binding documentation for MT8365 SoC Fabien Parent
@ 2022-05-30 18:38 ` Fabien Parent
2022-05-30 18:38 ` [PATCH 3/3] thermal: mediatek: add support for MT8365 SoC Fabien Parent
2022-06-05 21:21 ` [PATCH 1/3] dt-bindings: thermal: mediatek: add binding documentation " Rob Herring
2 siblings, 0 replies; 4+ messages in thread
From: Fabien Parent @ 2022-05-30 18:38 UTC (permalink / raw)
To: Rafael J. Wysocki, Daniel Lezcano, Amit Kucheria, Zhang Rui,
Matthias Brugger
Cc: Markus Schneider-Pargmann, Fabien Parent, linux-pm,
linux-arm-kernel, linux-mediatek, linux-kernel
From: Markus Schneider-Pargmann <msp@baylibre.com>
Add logic in order to be able to turn on the control buffer on MT8365.
This change now allows to have control buffer support for MTK_THERMAL_V1,
and it allows to define the register offset, and mask used to enable it.
Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com>
Signed-off-by: Fabien Parent <fparent@baylibre.com>
---
drivers/thermal/mtk_thermal.c | 23 +++++++++++++++++------
1 file changed, 17 insertions(+), 6 deletions(-)
diff --git a/drivers/thermal/mtk_thermal.c b/drivers/thermal/mtk_thermal.c
index ede94eadddda..b09738ef1093 100644
--- a/drivers/thermal/mtk_thermal.c
+++ b/drivers/thermal/mtk_thermal.c
@@ -271,6 +271,9 @@ struct mtk_thermal_data {
bool need_switch_bank;
struct thermal_bank_cfg bank_data[MAX_NUM_ZONES];
enum mtk_thermal_version version;
+ u32 apmixed_buffer_ctl_reg;
+ u32 apmixed_buffer_ctl_mask;
+ u32 apmixed_buffer_ctl_set;
};
struct mtk_thermal {
@@ -514,6 +517,9 @@ static const struct mtk_thermal_data mt7622_thermal_data = {
.adcpnp = mt7622_adcpnp,
.sensor_mux_values = mt7622_mux_values,
.version = MTK_THERMAL_V2,
+ .apmixed_buffer_ctl_reg = APMIXED_SYS_TS_CON1,
+ .apmixed_buffer_ctl_mask = ~0x37,
+ .apmixed_buffer_ctl_set = 0x1,
};
/*
@@ -963,14 +969,18 @@ static const struct of_device_id mtk_thermal_of_match[] = {
};
MODULE_DEVICE_TABLE(of, mtk_thermal_of_match);
-static void mtk_thermal_turn_on_buffer(void __iomem *apmixed_base)
+static void mtk_thermal_turn_on_buffer(struct mtk_thermal *mt,
+ void __iomem *apmixed_base)
{
int tmp;
- tmp = readl(apmixed_base + APMIXED_SYS_TS_CON1);
- tmp &= ~(0x37);
- tmp |= 0x1;
- writel(tmp, apmixed_base + APMIXED_SYS_TS_CON1);
+ if (!mt->conf->apmixed_buffer_ctl_reg)
+ return;
+
+ tmp = readl(apmixed_base + mt->conf->apmixed_buffer_ctl_reg);
+ tmp &= mt->conf->apmixed_buffer_ctl_mask;
+ tmp |= mt->conf->apmixed_buffer_ctl_set;
+ writel(tmp, apmixed_base + mt->conf->apmixed_buffer_ctl_reg);
udelay(200);
}
@@ -1070,8 +1080,9 @@ static int mtk_thermal_probe(struct platform_device *pdev)
goto err_disable_clk_auxadc;
}
+ mtk_thermal_turn_on_buffer(mt, apmixed_base);
+
if (mt->conf->version == MTK_THERMAL_V2) {
- mtk_thermal_turn_on_buffer(apmixed_base);
mtk_thermal_release_periodic_ts(mt, auxadc_base);
}
--
2.36.1
^ permalink raw reply related [flat|nested] 4+ messages in thread* [PATCH 3/3] thermal: mediatek: add support for MT8365 SoC
2022-05-30 18:38 [PATCH 1/3] dt-bindings: thermal: mediatek: add binding documentation for MT8365 SoC Fabien Parent
2022-05-30 18:38 ` [PATCH 2/3] thermal: mediatek: control buffer enablement tweaks Fabien Parent
@ 2022-05-30 18:38 ` Fabien Parent
2022-06-05 21:21 ` [PATCH 1/3] dt-bindings: thermal: mediatek: add binding documentation " Rob Herring
2 siblings, 0 replies; 4+ messages in thread
From: Fabien Parent @ 2022-05-30 18:38 UTC (permalink / raw)
To: Rafael J. Wysocki, Daniel Lezcano, Amit Kucheria, Zhang Rui,
Matthias Brugger
Cc: Fabien Parent, linux-pm, linux-arm-kernel, linux-mediatek,
linux-kernel
MT8365 is similar to the other SoCs supported by the driver. It has only
one bank and 3 actual sensors that can be multiplexed. There is another
one sensor that does not have usable data.
Signed-off-by: Fabien Parent <fparent@baylibre.com>
---
drivers/thermal/mtk_thermal.c | 68 +++++++++++++++++++++++++++++++++++
1 file changed, 68 insertions(+)
diff --git a/drivers/thermal/mtk_thermal.c b/drivers/thermal/mtk_thermal.c
index b09738ef1093..1dc276f8c4f1 100644
--- a/drivers/thermal/mtk_thermal.c
+++ b/drivers/thermal/mtk_thermal.c
@@ -31,6 +31,7 @@
#define AUXADC_CON2_V 0x010
#define AUXADC_DATA(channel) (0x14 + (channel) * 4)
+#define APMIXED_SYS_TS_CON0 0x600
#define APMIXED_SYS_TS_CON1 0x604
/* Thermal Controller Registers */
@@ -245,6 +246,17 @@ enum mtk_thermal_version {
/* The calibration coefficient of sensor */
#define MT8183_CALIBRATION 153
+/* MT8365 */
+#define MT8365_TEMP_AUXADC_CHANNEL 11
+#define MT8365_CALIBRATION 164
+#define MT8365_NUM_CONTROLLER 1
+#define MT8365_NUM_BANKS 1
+#define MT8365_NUM_SENSORS 3
+#define MT8365_NUM_SENSORS_PER_ZONE 3
+#define MT8365_TS1 0
+#define MT8365_TS2 1
+#define MT8365_TS3 2
+
struct mtk_thermal;
struct thermal_bank_cfg {
@@ -389,6 +401,24 @@ static const int mt7622_mux_values[MT7622_NUM_SENSORS] = { 0, };
static const int mt7622_vts_index[MT7622_NUM_SENSORS] = { VTS1 };
static const int mt7622_tc_offset[MT7622_NUM_CONTROLLER] = { 0x0, };
+/* MT8365 thermal sensor data */
+static const int mt8365_bank_data[MT8365_NUM_SENSORS] = {
+ MT8365_TS1, MT8365_TS2, MT8365_TS3
+};
+
+static const int mt8365_msr[MT8365_NUM_SENSORS_PER_ZONE] = {
+ TEMP_MSR0, TEMP_MSR1, TEMP_MSR2
+};
+
+static const int mt8365_adcpnp[MT8365_NUM_SENSORS_PER_ZONE] = {
+ TEMP_ADCPNP0, TEMP_ADCPNP1, TEMP_ADCPNP2
+};
+
+static const int mt8365_mux_values[MT8365_NUM_SENSORS] = { 0, 1, 2 };
+static const int mt8365_tc_offset[MT8365_NUM_CONTROLLER] = { 0 };
+
+static const int mt8365_vts_index[MT8365_NUM_SENSORS] = { VTS1, VTS2, VTS3 };
+
/*
* The MT8173 thermal controller has four banks. Each bank can read up to
* four temperature sensors simultaneously. The MT8173 has a total of 5
@@ -463,6 +493,40 @@ static const struct mtk_thermal_data mt2701_thermal_data = {
.version = MTK_THERMAL_V1,
};
+/*
+ * The MT8365 thermal controller has one bank, which can read up to
+ * four temperature sensors simultaneously. The MT8365 has a total of 3
+ * temperature sensors.
+ *
+ * The thermal core only gets the maximum temperature of this one bank,
+ * so the bank concept wouldn't be necessary here. However, the SVS (Smart
+ * Voltage Scaling) unit makes its decisions based on the same bank
+ * data.
+ */
+static const struct mtk_thermal_data mt8365_thermal_data = {
+ .auxadc_channel = MT8365_TEMP_AUXADC_CHANNEL,
+ .num_banks = MT8365_NUM_BANKS,
+ .num_sensors = MT8365_NUM_SENSORS,
+ .vts_index = mt8365_vts_index,
+ .cali_val = MT8365_CALIBRATION,
+ .num_controller = MT8365_NUM_CONTROLLER,
+ .controller_offset = mt8365_tc_offset,
+ .need_switch_bank = false,
+ .bank_data = {
+ {
+ .num_sensors = MT8365_NUM_SENSORS,
+ .sensors = mt8365_bank_data
+ },
+ },
+ .msr = mt8365_msr,
+ .adcpnp = mt8365_adcpnp,
+ .sensor_mux_values = mt8365_mux_values,
+ .version = MTK_THERMAL_V1,
+ .apmixed_buffer_ctl_reg = APMIXED_SYS_TS_CON0,
+ .apmixed_buffer_ctl_mask = (u32) ~GENMASK(29, 28),
+ .apmixed_buffer_ctl_set = 0,
+};
+
/*
* The MT2712 thermal controller has one bank, which can read up to
* four temperature sensors simultaneously. The MT2712 has a total of 4
@@ -964,6 +1028,10 @@ static const struct of_device_id mtk_thermal_of_match[] = {
{
.compatible = "mediatek,mt8183-thermal",
.data = (void *)&mt8183_thermal_data,
+ },
+ {
+ .compatible = "mediatek,mt8365-thermal",
+ .data = (void *)&mt8365_thermal_data,
}, {
},
};
--
2.36.1
^ permalink raw reply related [flat|nested] 4+ messages in thread