[PATCH 1/2] LoongArch: Add suspend (ACPI S3) support

[PATCH 1/2] LoongArch: Add suspend (ACPI S3) support

[Huacai Chen]

Add suspend (Suspend To RAM, aka ACPI S3) support for LoongArch.

Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
---
 arch/loongarch/Kconfig                |   5 ++
 arch/loongarch/Makefile               |   3 +
 arch/loongarch/include/asm/acpi.h     |  10 +++
 arch/loongarch/include/asm/bootinfo.h |   1 +
 arch/loongarch/include/asm/loongson.h |   3 +
 arch/loongarch/include/asm/time.h     |   1 +
 arch/loongarch/kernel/acpi.c          |   6 ++
 arch/loongarch/kernel/smp.c           |   1 +
 arch/loongarch/kernel/time.c          |  11 ++-
 arch/loongarch/power/Makefile         |   3 +
 arch/loongarch/power/platform.c       |  45 +++++++++++
 arch/loongarch/power/suspend.c        |  73 +++++++++++++++++
 arch/loongarch/power/suspend_asm.S    | 112 ++++++++++++++++++++++++++
 13 files changed, 271 insertions(+), 3 deletions(-)
 create mode 100644 arch/loongarch/power/Makefile
 create mode 100644 arch/loongarch/power/platform.c
 create mode 100644 arch/loongarch/power/suspend.c
 create mode 100644 arch/loongarch/power/suspend_asm.S

diff --git a/arch/loongarch/Kconfig b/arch/loongarch/Kconfig
index a8dc58e8162a..0df102401d1d 100644
--- a/arch/loongarch/Kconfig
+++ b/arch/loongarch/Kconfig
@@ -57,6 +57,7 @@ config LOONGARCH
 	select ARCH_WANTS_NO_INSTR
 	select BUILDTIME_TABLE_SORT
 	select COMMON_CLK
+	select CPU_PM
 	select EFI
 	select GENERIC_CLOCKEVENTS
 	select GENERIC_CMOS_UPDATE
@@ -517,6 +518,10 @@ config ARCH_MMAP_RND_BITS_MAX
 
 menu "Power management options"
 
+config ARCH_SUSPEND_POSSIBLE
+	def_bool y
+
+source "kernel/power/Kconfig"
 source "drivers/acpi/Kconfig"
 
 endmenu
diff --git a/arch/loongarch/Makefile b/arch/loongarch/Makefile
index f4cb54d5afd6..a0fc1f9980e3 100644
--- a/arch/loongarch/Makefile
+++ b/arch/loongarch/Makefile
@@ -104,6 +104,9 @@ endif
 libs-y += arch/loongarch/lib/
 libs-$(CONFIG_EFI_STUB) += $(objtree)/drivers/firmware/efi/libstub/lib.a
 
+# suspend and hibernation support
+drivers-$(CONFIG_PM)	+= arch/loongarch/power/
+
 ifeq ($(KBUILD_EXTMOD),)
 prepare: vdso_prepare
 vdso_prepare: prepare0
diff --git a/arch/loongarch/include/asm/acpi.h b/arch/loongarch/include/asm/acpi.h
index 825c2519b9d1..9664868b1260 100644
--- a/arch/loongarch/include/asm/acpi.h
+++ b/arch/loongarch/include/asm/acpi.h
@@ -35,4 +35,14 @@ extern struct list_head acpi_wakeup_device_list;
 
 #define ACPI_TABLE_UPGRADE_MAX_PHYS ARCH_LOW_ADDRESS_LIMIT
 
+extern int loongarch_acpi_suspend(void);
+extern int (*acpi_suspend_lowlevel)(void);
+extern void loongarch_suspend_enter(void);
+extern void loongarch_wakeup_start(void);
+
+static inline unsigned long acpi_get_wakeup_address(void)
+{
+	return (unsigned long)loongarch_wakeup_start;
+}
+
 #endif /* _ASM_LOONGARCH_ACPI_H */
diff --git a/arch/loongarch/include/asm/bootinfo.h b/arch/loongarch/include/asm/bootinfo.h
index ed0910e8b856..0051b526ac6d 100644
--- a/arch/loongarch/include/asm/bootinfo.h
+++ b/arch/loongarch/include/asm/bootinfo.h
@@ -32,6 +32,7 @@ struct loongson_system_configuration {
 	int cores_per_node;
 	int cores_per_package;
 	unsigned long cores_io_master;
+	unsigned long suspend_addr;
 	const char *cpuname;
 };
 
diff --git a/arch/loongarch/include/asm/loongson.h b/arch/loongarch/include/asm/loongson.h
index 00db93edae1b..12494cffffd1 100644
--- a/arch/loongarch/include/asm/loongson.h
+++ b/arch/loongarch/include/asm/loongson.h
@@ -136,4 +136,7 @@ typedef enum {
 #define ls7a_writel(val, addr)	*(volatile unsigned int   *)TO_UNCACHE(addr) = (val)
 #define ls7a_writeq(val, addr)	*(volatile unsigned long  *)TO_UNCACHE(addr) = (val)
 
+void enable_gpe_wakeup(void);
+void enable_pci_wakeup(void);
+
 #endif /* __ASM_LOONGSON_H */
diff --git a/arch/loongarch/include/asm/time.h b/arch/loongarch/include/asm/time.h
index 2eae219301d0..037a2d1b8ff4 100644
--- a/arch/loongarch/include/asm/time.h
+++ b/arch/loongarch/include/asm/time.h
@@ -12,6 +12,7 @@
 extern u64 cpu_clock_freq;
 extern u64 const_clock_freq;
 
+extern void save_counter(void);
 extern void sync_counter(void);
 
 static inline unsigned int calc_const_freq(void)
diff --git a/arch/loongarch/kernel/acpi.c b/arch/loongarch/kernel/acpi.c
index 335398482038..982672caf753 100644
--- a/arch/loongarch/kernel/acpi.c
+++ b/arch/loongarch/kernel/acpi.c
@@ -156,6 +156,12 @@ static void __init acpi_process_madt(void)
 	loongson_sysconf.nr_cpus = num_processors;
 }
 
+#ifdef CONFIG_ACPI_SLEEP
+int (*acpi_suspend_lowlevel)(void) = loongarch_acpi_suspend;
+#else
+int (*acpi_suspend_lowlevel)(void);
+#endif
+
 int __init acpi_boot_init(void)
 {
 	/*
diff --git a/arch/loongarch/kernel/smp.c b/arch/loongarch/kernel/smp.c
index 781a4d4bdddc..6e192a25e134 100644
--- a/arch/loongarch/kernel/smp.c
+++ b/arch/loongarch/kernel/smp.c
@@ -16,6 +16,7 @@
 #include <linux/smp.h>
 #include <linux/threads.h>
 #include <linux/export.h>
+#include <linux/syscore_ops.h>
 #include <linux/time.h>
 #include <linux/tracepoint.h>
 #include <linux/sched/hotplug.h>
diff --git a/arch/loongarch/kernel/time.c b/arch/loongarch/kernel/time.c
index 786735dcc8d6..a6576dea590c 100644
--- a/arch/loongarch/kernel/time.c
+++ b/arch/loongarch/kernel/time.c
@@ -115,12 +115,17 @@ static unsigned long __init get_loops_per_jiffy(void)
 	return lpj;
 }
 
-static long init_timeval;
+static long init_offset __nosavedata;
+
+void save_counter(void)
+{
+	init_offset = drdtime();
+}
 
 void sync_counter(void)
 {
 	/* Ensure counter begin at 0 */
-	csr_write64(-init_timeval, LOONGARCH_CSR_CNTC);
+	csr_write64(init_offset, LOONGARCH_CSR_CNTC);
 }
 
 static int get_timer_irq(void)
@@ -219,7 +224,7 @@ void __init time_init(void)
 	else
 		const_clock_freq = calc_const_freq();
 
-	init_timeval = drdtime() - csr_read64(LOONGARCH_CSR_CNTC);
+	init_offset = -(drdtime() - csr_read64(LOONGARCH_CSR_CNTC));
 
 	constant_clockevent_init();
 	constant_clocksource_init();
diff --git a/arch/loongarch/power/Makefile b/arch/loongarch/power/Makefile
new file mode 100644
index 000000000000..6740117decaa
--- /dev/null
+++ b/arch/loongarch/power/Makefile
@@ -0,0 +1,3 @@
+obj-y	+= platform.o
+
+obj-$(CONFIG_SUSPEND)		+= suspend.o suspend_asm.o
diff --git a/arch/loongarch/power/platform.c b/arch/loongarch/power/platform.c
new file mode 100644
index 000000000000..675e8792afaf
--- /dev/null
+++ b/arch/loongarch/power/platform.c
@@ -0,0 +1,45 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Author: Huacai Chen <chenhuacai@loongson.cn>
+ * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
+ */
+#include <linux/acpi.h>
+#include <linux/platform_device.h>
+
+#include <asm/bootinfo.h>
+#include <asm/setup.h>
+
+void enable_gpe_wakeup(void)
+{
+	acpi_enable_all_wakeup_gpes();
+}
+
+void enable_pci_wakeup(void)
+{
+	acpi_write_bit_register(ACPI_BITREG_PCIEXP_WAKE_STATUS, 1);
+
+	if (acpi_gbl_FADT.flags & ACPI_FADT_PCI_EXPRESS_WAKE)
+		acpi_write_bit_register(ACPI_BITREG_PCIEXP_WAKE_DISABLE, 0);
+}
+
+static int __init loongson3_acpi_suspend_init(void)
+{
+#ifdef CONFIG_ACPI
+	acpi_status status;
+	uint64_t suspend_addr = 0;
+
+	if (acpi_disabled || acpi_gbl_reduced_hardware)
+		return 0;
+
+	acpi_write_bit_register(ACPI_BITREG_SCI_ENABLE, 1);
+	status = acpi_evaluate_integer(NULL, "\\SADR", NULL, &suspend_addr);
+	if (ACPI_FAILURE(status) || !suspend_addr) {
+		pr_err("ACPI S3 is not support!\n");
+		return -1;
+	}
+	loongson_sysconf.suspend_addr = (u64)phys_to_virt(PHYSADDR(suspend_addr));
+#endif
+	return 0;
+}
+
+device_initcall(loongson3_acpi_suspend_init);
diff --git a/arch/loongarch/power/suspend.c b/arch/loongarch/power/suspend.c
new file mode 100644
index 000000000000..b9fa0f9a9277
--- /dev/null
+++ b/arch/loongarch/power/suspend.c
@@ -0,0 +1,73 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * loongson-specific suspend support
+ *
+ * Author: Huacai Chen <chenhuacai@loongson.cn>
+ * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
+ */
+#include <linux/acpi.h>
+#include <linux/pm.h>
+#include <linux/suspend.h>
+
+#include <asm/loongarch.h>
+#include <asm/loongson.h>
+#include <asm/setup.h>
+#include <asm/time.h>
+#include <asm/tlbflush.h>
+
+u64 loongarch_suspend_addr;
+
+struct saved_registers {
+	u32 ecfg;
+	u32 euen;
+	u64 pgd;
+	u64 kpgd;
+	u32 pwctl0;
+	u32 pwctl1;
+};
+static struct saved_registers saved_regs;
+
+static void arch_common_suspend(void)
+{
+	save_counter();
+	saved_regs.pgd = csr_read64(LOONGARCH_CSR_PGDL);
+	saved_regs.kpgd = csr_read64(LOONGARCH_CSR_PGDH);
+	saved_regs.pwctl0 = csr_read32(LOONGARCH_CSR_PWCTL0);
+	saved_regs.pwctl1 = csr_read32(LOONGARCH_CSR_PWCTL1);
+	saved_regs.ecfg = csr_read32(LOONGARCH_CSR_ECFG);
+	saved_regs.euen = csr_read32(LOONGARCH_CSR_EUEN);
+
+	loongarch_suspend_addr = loongson_sysconf.suspend_addr;
+}
+
+static void arch_common_resume(void)
+{
+	sync_counter();
+	local_flush_tlb_all();
+	csr_write64(per_cpu_offset(0), PERCPU_BASE_KS);
+	csr_write64(eentry, LOONGARCH_CSR_EENTRY);
+	csr_write64(eentry, LOONGARCH_CSR_MERRENTRY);
+	csr_write64(tlbrentry, LOONGARCH_CSR_TLBRENTRY);
+
+	csr_write64(saved_regs.pgd, LOONGARCH_CSR_PGDL);
+	csr_write64(saved_regs.kpgd, LOONGARCH_CSR_PGDH);
+	csr_write32(saved_regs.pwctl0, LOONGARCH_CSR_PWCTL0);
+	csr_write32(saved_regs.pwctl1, LOONGARCH_CSR_PWCTL1);
+	csr_write32(saved_regs.ecfg, LOONGARCH_CSR_ECFG);
+	csr_write32(saved_regs.euen, LOONGARCH_CSR_EUEN);
+}
+
+int loongarch_acpi_suspend(void)
+{
+	enable_gpe_wakeup();
+	enable_pci_wakeup();
+
+	arch_common_suspend();
+
+	/* processor specific suspend */
+	loongarch_suspend_enter();
+
+	arch_common_resume();
+
+	return 0;
+}
diff --git a/arch/loongarch/power/suspend_asm.S b/arch/loongarch/power/suspend_asm.S
new file mode 100644
index 000000000000..ff52c3aa09d9
--- /dev/null
+++ b/arch/loongarch/power/suspend_asm.S
@@ -0,0 +1,108 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Sleep helper for Loongson-3 sleep mode.
+ *
+ * Author: Huacai Chen <chenhuacai@loongson.cn>
+ * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
+ */
+
+#include <asm/asm.h>
+#include <asm/asmmacro.h>
+#include <asm/addrspace.h>
+#include <asm/loongarch.h>
+#include <asm/stackframe.h>
+
+	.text
+	.align	5
+
+/* preparatory stuff */
+.macro	SETUP_SLEEP
+	addi.d		sp, sp, -PT_SIZE
+	st.d		$r1, sp, PT_R1
+	st.d		$r2, sp, PT_R2
+	st.d		$r3, sp, PT_R3
+	st.d		$r4, sp, PT_R4
+	st.d		$r5, sp, PT_R5
+	st.d		$r6, sp, PT_R6
+	st.d		$r7, sp, PT_R7
+	st.d		$r8, sp, PT_R8
+	st.d		$r9, sp, PT_R9
+	st.d		$r10, sp, PT_R10
+	st.d		$r11, sp, PT_R11
+	st.d		$r20, sp, PT_R20
+	st.d		$r21, sp, PT_R21
+	st.d		$r22, sp, PT_R22
+	st.d		$r23, sp, PT_R23
+	st.d		$r24, sp, PT_R24
+	st.d		$r25, sp, PT_R25
+	st.d		$r26, sp, PT_R26
+	st.d		$r27, sp, PT_R27
+	st.d		$r28, sp, PT_R28
+	st.d		$r29, sp, PT_R29
+	st.d		$r30, sp, PT_R30
+	st.d		$r31, sp, PT_R31
+
+	la.pcrel	t0, acpi_saved_sp
+	st.d		sp, t0, 0
+.endm
+
+/* Sleep code for Loongson-3 */
+SYM_CODE_START(loongarch_suspend_enter)
+	SETUP_SLEEP
+	bl		__flush_cache_all
+
+	/* Pass RA and SP to BIOS */
+	addi.d		a1, sp, 0
+	la.pcrel	a0, loongarch_wakeup_start
+	la.pcrel	t0, loongarch_suspend_addr
+	ld.d		t0, t0, 0 /* Call BIOS's STR sleep routine */
+	jr		t0
+	nop
+SYM_CODE_END(loongarch_suspend_enter)
+
+.macro SETUP_WAKEUP
+	ld.d		$r1, sp, PT_R1
+	ld.d		$r2, sp, PT_R2
+	ld.d		$r3, sp, PT_R3
+	ld.d		$r4, sp, PT_R4
+	ld.d		$r5, sp, PT_R5
+	ld.d		$r6, sp, PT_R6
+	ld.d		$r7, sp, PT_R7
+	ld.d		$r8, sp, PT_R8
+	ld.d		$r9, sp, PT_R9
+	ld.d		$r10, sp, PT_R10
+	ld.d		$r11, sp, PT_R11
+	ld.d		$r20, sp, PT_R20
+	ld.d		$r21, sp, PT_R21
+	ld.d		$r22, sp, PT_R22
+	ld.d		$r23, sp, PT_R23
+	ld.d		$r24, sp, PT_R24
+	ld.d		$r25, sp, PT_R25
+	ld.d		$r26, sp, PT_R26
+	ld.d		$r27, sp, PT_R27
+	ld.d		$r28, sp, PT_R28
+	ld.d		$r29, sp, PT_R29
+	ld.d		$r30, sp, PT_R30
+	ld.d		$r31, sp, PT_R31
+.endm
+
+	/* This is where we return upon wakeup.
+	 * Reload all of the registers and return.
+	 */
+	.align 12
+
+SYM_CODE_START(loongarch_wakeup_start)
+	li.d		t0, CSR_DMW0_INIT	# UC, PLV0
+	csrwr		t0, LOONGARCH_CSR_DMWIN0
+	li.d		t0, CSR_DMW1_INIT	# CA, PLV0
+	csrwr		t0, LOONGARCH_CSR_DMWIN1
+
+	la.abs		t0, 0f
+	jr		t0
+0:
+	la.pcrel	t0, acpi_saved_sp
+	ld.d		sp, t0, 0
+	SETUP_WAKEUP
+	addi.d		sp, sp, PT_SIZE
+	jr		ra
+SYM_CODE_END(loongarch_wakeup_start)
-- 
2.31.1

[PATCH 2/2] LoongArch: Add hibernation (ACPI S4) support

[Huacai Chen]

Add hibernation (Suspend to Disk, aka ACPI S4) support for LoongArch.

Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
---
 arch/loongarch/Kconfig               |  3 ++
 arch/loongarch/kernel/asm-offsets.c  | 12 +++++
 arch/loongarch/kernel/reset.c        |  2 +
 arch/loongarch/kernel/setup.c        |  5 ++
 arch/loongarch/power/Makefile        |  1 +
 arch/loongarch/power/hibernate.c     | 58 ++++++++++++++++++++++++
 arch/loongarch/power/hibernate_asm.S | 68 ++++++++++++++++++++++++++++
 7 files changed, 149 insertions(+)
 create mode 100644 arch/loongarch/power/hibernate.c
 create mode 100644 arch/loongarch/power/hibernate_asm.S

diff --git a/arch/loongarch/Kconfig b/arch/loongarch/Kconfig
index 0df102401d1d..1943f840e494 100644
--- a/arch/loongarch/Kconfig
+++ b/arch/loongarch/Kconfig
@@ -521,6 +521,9 @@ menu "Power management options"
 config ARCH_SUSPEND_POSSIBLE
 	def_bool y
 
+config ARCH_HIBERNATION_POSSIBLE
+	def_bool y
+
 source "kernel/power/Kconfig"
 source "drivers/acpi/Kconfig"
 
diff --git a/arch/loongarch/kernel/asm-offsets.c b/arch/loongarch/kernel/asm-offsets.c
index bdd88eda9513..4ef494577813 100644
--- a/arch/loongarch/kernel/asm-offsets.c
+++ b/arch/loongarch/kernel/asm-offsets.c
@@ -257,3 +257,15 @@ void output_smpboot_defines(void)
 	BLANK();
 }
 #endif
+
+#ifdef CONFIG_HIBERNATION
+void output_pbe_defines(void)
+{
+	COMMENT(" Linux struct pbe offsets. ");
+	OFFSET(PBE_ADDRESS, pbe, address);
+	OFFSET(PBE_ORIG_ADDRESS, pbe, orig_address);
+	OFFSET(PBE_NEXT, pbe, next);
+	DEFINE(PBE_SIZE, sizeof(struct pbe));
+	BLANK();
+}
+#endif
diff --git a/arch/loongarch/kernel/reset.c b/arch/loongarch/kernel/reset.c
index 8c82021eb2f4..cdf021ff6214 100644
--- a/arch/loongarch/kernel/reset.c
+++ b/arch/loongarch/kernel/reset.c
@@ -15,6 +15,7 @@
 #include <acpi/reboot.h>
 #include <asm/idle.h>
 #include <asm/loongarch.h>
+#include <asm/loongson.h>
 
 void (*pm_power_off)(void);
 EXPORT_SYMBOL(pm_power_off);
@@ -42,6 +43,7 @@ void machine_power_off(void)
 	preempt_disable();
 	smp_send_stop();
 #endif
+	enable_pci_wakeup();
 	do_kernel_power_off();
 #ifdef CONFIG_EFI
 	efi.reset_system(EFI_RESET_SHUTDOWN, EFI_SUCCESS, 0, NULL);
diff --git a/arch/loongarch/kernel/setup.c b/arch/loongarch/kernel/setup.c
index 96b6cb5db004..3c8bc250f4e2 100644
--- a/arch/loongarch/kernel/setup.c
+++ b/arch/loongarch/kernel/setup.c
@@ -28,6 +28,7 @@
 #include <linux/sizes.h>
 #include <linux/device.h>
 #include <linux/dma-map-ops.h>
+#include <linux/suspend.h>
 #include <linux/swiotlb.h>
 
 #include <asm/addrspace.h>
@@ -312,6 +313,10 @@ static void __init arch_mem_init(char **cmdline_p)
 
 	dma_contiguous_reserve(PFN_PHYS(max_low_pfn));
 
+	/* Reserve for hibernation. */
+	register_nosave_region(PFN_DOWN(__pa_symbol(&__nosave_begin)),
+				   PFN_UP(__pa_symbol(&__nosave_end)));
+
 	memblock_dump_all();
 
 	early_memtest(PFN_PHYS(ARCH_PFN_OFFSET), PFN_PHYS(max_low_pfn));
diff --git a/arch/loongarch/power/Makefile b/arch/loongarch/power/Makefile
index 6740117decaa..58151d003e40 100644
--- a/arch/loongarch/power/Makefile
+++ b/arch/loongarch/power/Makefile
@@ -1,3 +1,4 @@
 obj-y	+= platform.o
 
 obj-$(CONFIG_SUSPEND)		+= suspend.o suspend_asm.o
+obj-$(CONFIG_HIBERNATION)	+= hibernate.o hibernate_asm.o
diff --git a/arch/loongarch/power/hibernate.c b/arch/loongarch/power/hibernate.c
new file mode 100644
index 000000000000..32dae9ef311a
--- /dev/null
+++ b/arch/loongarch/power/hibernate.c
@@ -0,0 +1,58 @@
+// SPDX-License-Identifier: GPL-2.0
+#include <asm/fpu.h>
+#include <asm/loongson.h>
+#include <asm/sections.h>
+#include <asm/tlbflush.h>
+
+static u64 saved_crmd;
+static u64 saved_prmd;
+static u64 saved_euen;
+static u64 saved_ecfg;
+struct pt_regs saved_regs;
+
+void save_processor_state(void)
+{
+	saved_crmd = csr_read32(LOONGARCH_CSR_CRMD);
+	saved_prmd = csr_read32(LOONGARCH_CSR_PRMD);
+	saved_euen = csr_read32(LOONGARCH_CSR_EUEN);
+	saved_ecfg = csr_read32(LOONGARCH_CSR_ECFG);
+
+	if (is_fpu_owner())
+		save_fp(current);
+}
+
+void restore_processor_state(void)
+{
+	csr_write32(saved_crmd, LOONGARCH_CSR_CRMD);
+	csr_write32(saved_prmd, LOONGARCH_CSR_PRMD);
+	csr_write32(saved_euen, LOONGARCH_CSR_EUEN);
+	csr_write32(saved_ecfg, LOONGARCH_CSR_ECFG);
+
+	if (is_fpu_owner())
+		restore_fp(current);
+}
+
+int pfn_is_nosave(unsigned long pfn)
+{
+	unsigned long nosave_begin_pfn = PFN_DOWN(__pa(&__nosave_begin));
+	unsigned long nosave_end_pfn = PFN_UP(__pa(&__nosave_end));
+
+	return	(pfn >= nosave_begin_pfn) && (pfn < nosave_end_pfn);
+}
+
+extern int swsusp_asm_suspend(void);
+
+int swsusp_arch_suspend(void)
+{
+	enable_pci_wakeup();
+	return swsusp_asm_suspend();
+}
+
+extern int swsusp_asm_resume(void);
+
+int swsusp_arch_resume(void)
+{
+	/* Avoid TLB mismatch during and after kernel resume */
+	local_flush_tlb_all();
+	return swsusp_asm_resume();
+}
diff --git a/arch/loongarch/power/hibernate_asm.S b/arch/loongarch/power/hibernate_asm.S
new file mode 100644
index 000000000000..7894fbd56c85
--- /dev/null
+++ b/arch/loongarch/power/hibernate_asm.S
@@ -0,0 +1,64 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Hibernation support specific for LoongArch
+ *
+ * Author: Huacai Chen <chenhuacai@loongson.cn>
+ * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
+ */
+#include <linux/linkage.h>
+#include <asm/asm.h>
+#include <asm/asm-offsets.h>
+#include <asm/regdef.h>
+
+.text
+SYM_FUNC_START(swsusp_asm_suspend)
+	la.pcrel	t0, saved_regs
+	PTR_S		ra, t0, PT_R1
+	PTR_S		sp, t0, PT_R3
+	PTR_S		fp, t0, PT_R22
+	PTR_S		tp, t0, PT_R2
+	PTR_S		s0, t0, PT_R23
+	PTR_S		s1, t0, PT_R24
+	PTR_S		s2, t0, PT_R25
+	PTR_S		s3, t0, PT_R26
+	PTR_S		s4, t0, PT_R27
+	PTR_S		s5, t0, PT_R28
+	PTR_S		s6, t0, PT_R29
+	PTR_S		s7, t0, PT_R30
+	PTR_S		s8, t0, PT_R31
+	b		swsusp_save
+SYM_FUNC_END(swsusp_asm_suspend)
+
+SYM_FUNC_START(swsusp_asm_resume)
+	la.pcrel	t0, restore_pblist
+	PTR_L		t0, t0, 0
+0:
+	PTR_L		t1, t0, PBE_ADDRESS  /* source */
+	PTR_L		t2, t0, PBE_ORIG_ADDRESS /* destination */
+	PTR_LI		t3, _PAGE_SIZE
+	PTR_ADD		t3, t3, t1
+1:
+	REG_L		t8, t1, 0
+	REG_S		t8, t2, 0
+	PTR_ADDI	t1, t1, SZREG
+	PTR_ADDI	t2, t2, SZREG
+	bne		t1, t3, 1b
+	PTR_L		t0, t0, PBE_NEXT
+	bnez		t0, 0b
+	la.pcrel	t0, saved_regs
+	PTR_L		ra, t0, PT_R1
+	PTR_L		sp, t0, PT_R3
+	PTR_L		fp, t0, PT_R22
+	PTR_L		tp, t0, PT_R2
+	PTR_L		s0, t0, PT_R23
+	PTR_L		s1, t0, PT_R24
+	PTR_L		s2, t0, PT_R25
+	PTR_L		s3, t0, PT_R26
+	PTR_L		s4, t0, PT_R27
+	PTR_L		s5, t0, PT_R28
+	PTR_L		s6, t0, PT_R29
+	PTR_L		s7, t0, PT_R30
+	PTR_L		s8, t0, PT_R31
+	PTR_LI		a0, 0x0
+	jirl		zero, ra, 0
+SYM_FUNC_END(swsusp_asm_resume)
-- 
2.31.1

Re: [PATCH 1/2] LoongArch: Add suspend (ACPI S3) support

[Jinyang He]

On 2022/10/28 上午10:38, Huacai Chen wrote:

> Add suspend (Suspend To RAM, aka ACPI S3) support for LoongArch.
>
> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
> ---
>   arch/loongarch/Kconfig                |   5 ++
>   arch/loongarch/Makefile               |   3 +
>   arch/loongarch/include/asm/acpi.h     |  10 +++
>   arch/loongarch/include/asm/bootinfo.h |   1 +
>   arch/loongarch/include/asm/loongson.h |   3 +
>   arch/loongarch/include/asm/time.h     |   1 +
>   arch/loongarch/kernel/acpi.c          |   6 ++
>   arch/loongarch/kernel/smp.c           |   1 +
>   arch/loongarch/kernel/time.c          |  11 ++-
>   arch/loongarch/power/Makefile         |   3 +
>   arch/loongarch/power/platform.c       |  45 +++++++++++
>   arch/loongarch/power/suspend.c        |  73 +++++++++++++++++
>   arch/loongarch/power/suspend_asm.S    | 112 ++++++++++++++++++++++++++
>   13 files changed, 271 insertions(+), 3 deletions(-)
>   create mode 100644 arch/loongarch/power/Makefile
>   create mode 100644 arch/loongarch/power/platform.c
>   create mode 100644 arch/loongarch/power/suspend.c
>   create mode 100644 arch/loongarch/power/suspend_asm.S
>
> diff --git a/arch/loongarch/Kconfig b/arch/loongarch/Kconfig
> index a8dc58e8162a..0df102401d1d 100644
> --- a/arch/loongarch/Kconfig
> +++ b/arch/loongarch/Kconfig
> @@ -57,6 +57,7 @@ config LOONGARCH
>   	select ARCH_WANTS_NO_INSTR
>   	select BUILDTIME_TABLE_SORT
>   	select COMMON_CLK
> +	select CPU_PM
>   	select EFI
>   	select GENERIC_CLOCKEVENTS
>   	select GENERIC_CMOS_UPDATE
> @@ -517,6 +518,10 @@ config ARCH_MMAP_RND_BITS_MAX
>   
>   menu "Power management options"
>   
> +config ARCH_SUSPEND_POSSIBLE
> +	def_bool y
> +
> +source "kernel/power/Kconfig"
>   source "drivers/acpi/Kconfig"
>   
>   endmenu
> diff --git a/arch/loongarch/Makefile b/arch/loongarch/Makefile
> index f4cb54d5afd6..a0fc1f9980e3 100644
> --- a/arch/loongarch/Makefile
> +++ b/arch/loongarch/Makefile
> @@ -104,6 +104,9 @@ endif
>   libs-y += arch/loongarch/lib/
>   libs-$(CONFIG_EFI_STUB) += $(objtree)/drivers/firmware/efi/libstub/lib.a
>   
> +# suspend and hibernation support
> +drivers-$(CONFIG_PM)	+= arch/loongarch/power/
> +
>   ifeq ($(KBUILD_EXTMOD),)
>   prepare: vdso_prepare
>   vdso_prepare: prepare0
> diff --git a/arch/loongarch/include/asm/acpi.h b/arch/loongarch/include/asm/acpi.h
> index 825c2519b9d1..9664868b1260 100644
> --- a/arch/loongarch/include/asm/acpi.h
> +++ b/arch/loongarch/include/asm/acpi.h
> @@ -35,4 +35,14 @@ extern struct list_head acpi_wakeup_device_list;
>   
>   #define ACPI_TABLE_UPGRADE_MAX_PHYS ARCH_LOW_ADDRESS_LIMIT
>   
> +extern int loongarch_acpi_suspend(void);
> +extern int (*acpi_suspend_lowlevel)(void);
> +extern void loongarch_suspend_enter(void);
> +extern void loongarch_wakeup_start(void);
> +
> +static inline unsigned long acpi_get_wakeup_address(void)
> +{
> +	return (unsigned long)loongarch_wakeup_start;
> +}
> +
>   #endif /* _ASM_LOONGARCH_ACPI_H */
> diff --git a/arch/loongarch/include/asm/bootinfo.h b/arch/loongarch/include/asm/bootinfo.h
> index ed0910e8b856..0051b526ac6d 100644
> --- a/arch/loongarch/include/asm/bootinfo.h
> +++ b/arch/loongarch/include/asm/bootinfo.h
> @@ -32,6 +32,7 @@ struct loongson_system_configuration {
>   	int cores_per_node;
>   	int cores_per_package;
>   	unsigned long cores_io_master;
> +	unsigned long suspend_addr;
>   	const char *cpuname;
>   };
>   
> diff --git a/arch/loongarch/include/asm/loongson.h b/arch/loongarch/include/asm/loongson.h
> index 00db93edae1b..12494cffffd1 100644
> --- a/arch/loongarch/include/asm/loongson.h
> +++ b/arch/loongarch/include/asm/loongson.h
> @@ -136,4 +136,7 @@ typedef enum {
>   #define ls7a_writel(val, addr)	*(volatile unsigned int   *)TO_UNCACHE(addr) = (val)
>   #define ls7a_writeq(val, addr)	*(volatile unsigned long  *)TO_UNCACHE(addr) = (val)
>   
> +void enable_gpe_wakeup(void);
> +void enable_pci_wakeup(void);
> +
>   #endif /* __ASM_LOONGSON_H */
> diff --git a/arch/loongarch/include/asm/time.h b/arch/loongarch/include/asm/time.h
> index 2eae219301d0..037a2d1b8ff4 100644
> --- a/arch/loongarch/include/asm/time.h
> +++ b/arch/loongarch/include/asm/time.h
> @@ -12,6 +12,7 @@
>   extern u64 cpu_clock_freq;
>   extern u64 const_clock_freq;
>   
> +extern void save_counter(void);
>   extern void sync_counter(void);
>   
>   static inline unsigned int calc_const_freq(void)
> diff --git a/arch/loongarch/kernel/acpi.c b/arch/loongarch/kernel/acpi.c
> index 335398482038..982672caf753 100644
> --- a/arch/loongarch/kernel/acpi.c
> +++ b/arch/loongarch/kernel/acpi.c
> @@ -156,6 +156,12 @@ static void __init acpi_process_madt(void)
>   	loongson_sysconf.nr_cpus = num_processors;
>   }
>   
> +#ifdef CONFIG_ACPI_SLEEP
> +int (*acpi_suspend_lowlevel)(void) = loongarch_acpi_suspend;
> +#else
> +int (*acpi_suspend_lowlevel)(void);
> +#endif
> +
>   int __init acpi_boot_init(void)
>   {
>   	/*
> diff --git a/arch/loongarch/kernel/smp.c b/arch/loongarch/kernel/smp.c
> index 781a4d4bdddc..6e192a25e134 100644
> --- a/arch/loongarch/kernel/smp.c
> +++ b/arch/loongarch/kernel/smp.c
> @@ -16,6 +16,7 @@
>   #include <linux/smp.h>
>   #include <linux/threads.h>
>   #include <linux/export.h>
> +#include <linux/syscore_ops.h>
>   #include <linux/time.h>
>   #include <linux/tracepoint.h>
>   #include <linux/sched/hotplug.h>
> diff --git a/arch/loongarch/kernel/time.c b/arch/loongarch/kernel/time.c
> index 786735dcc8d6..a6576dea590c 100644
> --- a/arch/loongarch/kernel/time.c
> +++ b/arch/loongarch/kernel/time.c
> @@ -115,12 +115,17 @@ static unsigned long __init get_loops_per_jiffy(void)
>   	return lpj;
>   }
>   
> -static long init_timeval;
> +static long init_offset __nosavedata;
> +
> +void save_counter(void)
> +{
> +	init_offset = drdtime();
> +}
>   
>   void sync_counter(void)
>   {
>   	/* Ensure counter begin at 0 */
> -	csr_write64(-init_timeval, LOONGARCH_CSR_CNTC);
> +	csr_write64(init_offset, LOONGARCH_CSR_CNTC);
>   }
>   
>   static int get_timer_irq(void)
> @@ -219,7 +224,7 @@ void __init time_init(void)
>   	else
>   		const_clock_freq = calc_const_freq();
>   
> -	init_timeval = drdtime() - csr_read64(LOONGARCH_CSR_CNTC);
> +	init_offset = -(drdtime() - csr_read64(LOONGARCH_CSR_CNTC));
>   
>   	constant_clockevent_init();
>   	constant_clocksource_init();
> diff --git a/arch/loongarch/power/Makefile b/arch/loongarch/power/Makefile
> new file mode 100644
> index 000000000000..6740117decaa
> --- /dev/null
> +++ b/arch/loongarch/power/Makefile
> @@ -0,0 +1,3 @@
> +obj-y	+= platform.o
> +
> +obj-$(CONFIG_SUSPEND)		+= suspend.o suspend_asm.o
> diff --git a/arch/loongarch/power/platform.c b/arch/loongarch/power/platform.c
> new file mode 100644
> index 000000000000..675e8792afaf
> --- /dev/null
> +++ b/arch/loongarch/power/platform.c
> @@ -0,0 +1,45 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Author: Huacai Chen <chenhuacai@loongson.cn>
> + * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
> + */
> +#include <linux/acpi.h>
> +#include <linux/platform_device.h>
> +
> +#include <asm/bootinfo.h>
> +#include <asm/setup.h>
> +
> +void enable_gpe_wakeup(void)
> +{
> +	acpi_enable_all_wakeup_gpes();
> +}
> +
> +void enable_pci_wakeup(void)
> +{
> +	acpi_write_bit_register(ACPI_BITREG_PCIEXP_WAKE_STATUS, 1);
> +
> +	if (acpi_gbl_FADT.flags & ACPI_FADT_PCI_EXPRESS_WAKE)
> +		acpi_write_bit_register(ACPI_BITREG_PCIEXP_WAKE_DISABLE, 0);
> +}
> +
> +static int __init loongson3_acpi_suspend_init(void)
> +{
> +#ifdef CONFIG_ACPI
> +	acpi_status status;
> +	uint64_t suspend_addr = 0;
> +
> +	if (acpi_disabled || acpi_gbl_reduced_hardware)
> +		return 0;
> +
> +	acpi_write_bit_register(ACPI_BITREG_SCI_ENABLE, 1);
> +	status = acpi_evaluate_integer(NULL, "\\SADR", NULL, &suspend_addr);
> +	if (ACPI_FAILURE(status) || !suspend_addr) {
> +		pr_err("ACPI S3 is not support!\n");
> +		return -1;
> +	}
> +	loongson_sysconf.suspend_addr = (u64)phys_to_virt(PHYSADDR(suspend_addr));
> +#endif
> +	return 0;
> +}
> +
> +device_initcall(loongson3_acpi_suspend_init);
> diff --git a/arch/loongarch/power/suspend.c b/arch/loongarch/power/suspend.c
> new file mode 100644
> index 000000000000..b9fa0f9a9277
> --- /dev/null
> +++ b/arch/loongarch/power/suspend.c
> @@ -0,0 +1,73 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * loongson-specific suspend support
> + *
> + * Author: Huacai Chen <chenhuacai@loongson.cn>
> + * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
> + */
> +#include <linux/acpi.h>
> +#include <linux/pm.h>
> +#include <linux/suspend.h>
> +
> +#include <asm/loongarch.h>
> +#include <asm/loongson.h>
> +#include <asm/setup.h>
> +#include <asm/time.h>
> +#include <asm/tlbflush.h>
> +
> +u64 loongarch_suspend_addr;
> +
> +struct saved_registers {
> +	u32 ecfg;
> +	u32 euen;
> +	u64 pgd;
> +	u64 kpgd;
> +	u32 pwctl0;
> +	u32 pwctl1;
> +};
> +static struct saved_registers saved_regs;
> +
> +static void arch_common_suspend(void)
> +{
> +	save_counter();
> +	saved_regs.pgd = csr_read64(LOONGARCH_CSR_PGDL);
> +	saved_regs.kpgd = csr_read64(LOONGARCH_CSR_PGDH);
> +	saved_regs.pwctl0 = csr_read32(LOONGARCH_CSR_PWCTL0);
> +	saved_regs.pwctl1 = csr_read32(LOONGARCH_CSR_PWCTL1);
> +	saved_regs.ecfg = csr_read32(LOONGARCH_CSR_ECFG);
> +	saved_regs.euen = csr_read32(LOONGARCH_CSR_EUEN);
> +
> +	loongarch_suspend_addr = loongson_sysconf.suspend_addr;
> +}
> +
> +static void arch_common_resume(void)
> +{
> +	sync_counter();
> +	local_flush_tlb_all();
> +	csr_write64(per_cpu_offset(0), PERCPU_BASE_KS);
> +	csr_write64(eentry, LOONGARCH_CSR_EENTRY);
> +	csr_write64(eentry, LOONGARCH_CSR_MERRENTRY);
> +	csr_write64(tlbrentry, LOONGARCH_CSR_TLBRENTRY);
> +
> +	csr_write64(saved_regs.pgd, LOONGARCH_CSR_PGDL);
> +	csr_write64(saved_regs.kpgd, LOONGARCH_CSR_PGDH);
> +	csr_write32(saved_regs.pwctl0, LOONGARCH_CSR_PWCTL0);
> +	csr_write32(saved_regs.pwctl1, LOONGARCH_CSR_PWCTL1);
> +	csr_write32(saved_regs.ecfg, LOONGARCH_CSR_ECFG);
> +	csr_write32(saved_regs.euen, LOONGARCH_CSR_EUEN);
> +}
> +
> +int loongarch_acpi_suspend(void)
> +{
> +	enable_gpe_wakeup();
> +	enable_pci_wakeup();
> +
> +	arch_common_suspend();
> +
> +	/* processor specific suspend */
> +	loongarch_suspend_enter();
> +
> +	arch_common_resume();
> +
> +	return 0;
> +}
> diff --git a/arch/loongarch/power/suspend_asm.S b/arch/loongarch/power/suspend_asm.S
> new file mode 100644
> index 000000000000..ff52c3aa09d9
> --- /dev/null
> +++ b/arch/loongarch/power/suspend_asm.S
> @@ -0,0 +1,108 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/*
> + * Sleep helper for Loongson-3 sleep mode.
> + *
> + * Author: Huacai Chen <chenhuacai@loongson.cn>
> + * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
> + */
> +
> +#include <asm/asm.h>
> +#include <asm/asmmacro.h>
> +#include <asm/addrspace.h>
> +#include <asm/loongarch.h>
> +#include <asm/stackframe.h>
> +
> +	.text
> +	.align	5
> +
> +/* preparatory stuff */
> +.macro	SETUP_SLEEP
> +	addi.d		sp, sp, -PT_SIZE
> +	st.d		$r1, sp, PT_R1
> +	st.d		$r2, sp, PT_R2
> +	st.d		$r3, sp, PT_R3
> +	st.d		$r4, sp, PT_R4
> +	st.d		$r5, sp, PT_R5
> +	st.d		$r6, sp, PT_R6
> +	st.d		$r7, sp, PT_R7
> +	st.d		$r8, sp, PT_R8
> +	st.d		$r9, sp, PT_R9
> +	st.d		$r10, sp, PT_R10
> +	st.d		$r11, sp, PT_R11
> +	st.d		$r20, sp, PT_R20
> +	st.d		$r21, sp, PT_R21
> +	st.d		$r22, sp, PT_R22
> +	st.d		$r23, sp, PT_R23
> +	st.d		$r24, sp, PT_R24
> +	st.d		$r25, sp, PT_R25
> +	st.d		$r26, sp, PT_R26
> +	st.d		$r27, sp, PT_R27
> +	st.d		$r28, sp, PT_R28
> +	st.d		$r29, sp, PT_R29
> +	st.d		$r30, sp, PT_R30
> +	st.d		$r31, sp, PT_R31
> +
> +	la.pcrel	t0, acpi_saved_sp
> +	st.d		sp, t0, 0
> +.endm
> +
> +/* Sleep code for Loongson-3 */
> +SYM_CODE_START(loongarch_suspend_enter)
> +	SETUP_SLEEP
> +	bl		__flush_cache_all
> +
> +	/* Pass RA and SP to BIOS */
> +	addi.d		a1, sp, 0
> +	la.pcrel	a0, loongarch_wakeup_start
> +	la.pcrel	t0, loongarch_suspend_addr
> +	ld.d		t0, t0, 0 /* Call BIOS's STR sleep routine */
> +	jr		t0
> +	nop
Hi, Huacai,

For loongarch_suspend_enter() and loongarch_wakeup_start(), it is better to
make them be more like C-style, that means it could obey LoongArch-psABI.
Just alloc limited stack and store the ra, s* and fp registers. 
Additionally,
the tp and the u0 should be saved, too. Combine 
loongarch_suspend_enter() and
loongarch_suspend_enter() to one function and using 'jirl a0, t0, 0' to link
them which indicate the control flow will return. These works make the 
control
flow clarity. Finally use SYM_FUNC_START/END declare the new function.

Thanks,

Jinyang


> +SYM_CODE_END(loongarch_suspend_enter)
> +
> +.macro SETUP_WAKEUP
> +	ld.d		$r1, sp, PT_R1
> +	ld.d		$r2, sp, PT_R2
> +	ld.d		$r3, sp, PT_R3
> +	ld.d		$r4, sp, PT_R4
> +	ld.d		$r5, sp, PT_R5
> +	ld.d		$r6, sp, PT_R6
> +	ld.d		$r7, sp, PT_R7
> +	ld.d		$r8, sp, PT_R8
> +	ld.d		$r9, sp, PT_R9
> +	ld.d		$r10, sp, PT_R10
> +	ld.d		$r11, sp, PT_R11
> +	ld.d		$r20, sp, PT_R20
> +	ld.d		$r21, sp, PT_R21
> +	ld.d		$r22, sp, PT_R22
> +	ld.d		$r23, sp, PT_R23
> +	ld.d		$r24, sp, PT_R24
> +	ld.d		$r25, sp, PT_R25
> +	ld.d		$r26, sp, PT_R26
> +	ld.d		$r27, sp, PT_R27
> +	ld.d		$r28, sp, PT_R28
> +	ld.d		$r29, sp, PT_R29
> +	ld.d		$r30, sp, PT_R30
> +	ld.d		$r31, sp, PT_R31
> +.endm
> +
> +	/* This is where we return upon wakeup.
> +	 * Reload all of the registers and return.
> +	 */
> +	.align 12
> +
> +SYM_CODE_START(loongarch_wakeup_start)
> +	li.d		t0, CSR_DMW0_INIT	# UC, PLV0
> +	csrwr		t0, LOONGARCH_CSR_DMWIN0
> +	li.d		t0, CSR_DMW1_INIT	# CA, PLV0
> +	csrwr		t0, LOONGARCH_CSR_DMWIN1
> +
> +	la.abs		t0, 0f
> +	jr		t0
> +0:
> +	la.pcrel	t0, acpi_saved_sp
> +	ld.d		sp, t0, 0
> +	SETUP_WAKEUP
> +	addi.d		sp, sp, PT_SIZE
> +	jr		ra
> +SYM_CODE_END(loongarch_wakeup_start)

Re: [PATCH 2/2] LoongArch: Add hibernation (ACPI S4) support

[Jinyang He]

Hi, Huacai,


On 2022/10/28 上午10:38, Huacai Chen wrote:
> Add hibernation (Suspend to Disk, aka ACPI S4) support for LoongArch.
>
> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
> ---
>   arch/loongarch/Kconfig               |  3 ++
>   arch/loongarch/kernel/asm-offsets.c  | 12 +++++
>   arch/loongarch/kernel/reset.c        |  2 +
>   arch/loongarch/kernel/setup.c        |  5 ++
>   arch/loongarch/power/Makefile        |  1 +
>   arch/loongarch/power/hibernate.c     | 58 ++++++++++++++++++++++++
>   arch/loongarch/power/hibernate_asm.S | 68 ++++++++++++++++++++++++++++
>   7 files changed, 149 insertions(+)
>   create mode 100644 arch/loongarch/power/hibernate.c
>   create mode 100644 arch/loongarch/power/hibernate_asm.S
>
> diff --git a/arch/loongarch/Kconfig b/arch/loongarch/Kconfig
> index 0df102401d1d..1943f840e494 100644
> --- a/arch/loongarch/Kconfig
> +++ b/arch/loongarch/Kconfig
> @@ -521,6 +521,9 @@ menu "Power management options"
>   config ARCH_SUSPEND_POSSIBLE
>   	def_bool y
>   
> +config ARCH_HIBERNATION_POSSIBLE
> +	def_bool y
> +
>   source "kernel/power/Kconfig"
>   source "drivers/acpi/Kconfig"
>   
> diff --git a/arch/loongarch/kernel/asm-offsets.c b/arch/loongarch/kernel/asm-offsets.c
> index bdd88eda9513..4ef494577813 100644
> --- a/arch/loongarch/kernel/asm-offsets.c
> +++ b/arch/loongarch/kernel/asm-offsets.c
> @@ -257,3 +257,15 @@ void output_smpboot_defines(void)
>   	BLANK();
>   }
>   #endif
> +
> +#ifdef CONFIG_HIBERNATION
> +void output_pbe_defines(void)
> +{
> +	COMMENT(" Linux struct pbe offsets. ");
> +	OFFSET(PBE_ADDRESS, pbe, address);
> +	OFFSET(PBE_ORIG_ADDRESS, pbe, orig_address);
> +	OFFSET(PBE_NEXT, pbe, next);
> +	DEFINE(PBE_SIZE, sizeof(struct pbe));
> +	BLANK();
> +}
> +#endif
> diff --git a/arch/loongarch/kernel/reset.c b/arch/loongarch/kernel/reset.c
> index 8c82021eb2f4..cdf021ff6214 100644
> --- a/arch/loongarch/kernel/reset.c
> +++ b/arch/loongarch/kernel/reset.c
> @@ -15,6 +15,7 @@
>   #include <acpi/reboot.h>
>   #include <asm/idle.h>
>   #include <asm/loongarch.h>
> +#include <asm/loongson.h>
>   
>   void (*pm_power_off)(void);
>   EXPORT_SYMBOL(pm_power_off);
> @@ -42,6 +43,7 @@ void machine_power_off(void)
>   	preempt_disable();
>   	smp_send_stop();
>   #endif
> +	enable_pci_wakeup();
>   	do_kernel_power_off();
>   #ifdef CONFIG_EFI
>   	efi.reset_system(EFI_RESET_SHUTDOWN, EFI_SUCCESS, 0, NULL);
> diff --git a/arch/loongarch/kernel/setup.c b/arch/loongarch/kernel/setup.c
> index 96b6cb5db004..3c8bc250f4e2 100644
> --- a/arch/loongarch/kernel/setup.c
> +++ b/arch/loongarch/kernel/setup.c
> @@ -28,6 +28,7 @@
>   #include <linux/sizes.h>
>   #include <linux/device.h>
>   #include <linux/dma-map-ops.h>
> +#include <linux/suspend.h>
>   #include <linux/swiotlb.h>
>   
>   #include <asm/addrspace.h>
> @@ -312,6 +313,10 @@ static void __init arch_mem_init(char **cmdline_p)
>   
>   	dma_contiguous_reserve(PFN_PHYS(max_low_pfn));
>   
> +	/* Reserve for hibernation. */
> +	register_nosave_region(PFN_DOWN(__pa_symbol(&__nosave_begin)),
> +				   PFN_UP(__pa_symbol(&__nosave_end)));
> +
>   	memblock_dump_all();
>   
>   	early_memtest(PFN_PHYS(ARCH_PFN_OFFSET), PFN_PHYS(max_low_pfn));
> diff --git a/arch/loongarch/power/Makefile b/arch/loongarch/power/Makefile
> index 6740117decaa..58151d003e40 100644
> --- a/arch/loongarch/power/Makefile
> +++ b/arch/loongarch/power/Makefile
> @@ -1,3 +1,4 @@
>   obj-y	+= platform.o
>   
>   obj-$(CONFIG_SUSPEND)		+= suspend.o suspend_asm.o
> +obj-$(CONFIG_HIBERNATION)	+= hibernate.o hibernate_asm.o
> diff --git a/arch/loongarch/power/hibernate.c b/arch/loongarch/power/hibernate.c
> new file mode 100644
> index 000000000000..32dae9ef311a
> --- /dev/null
> +++ b/arch/loongarch/power/hibernate.c
> @@ -0,0 +1,58 @@
> +// SPDX-License-Identifier: GPL-2.0
> +#include <asm/fpu.h>
> +#include <asm/loongson.h>
> +#include <asm/sections.h>
> +#include <asm/tlbflush.h>
> +
> +static u64 saved_crmd;
> +static u64 saved_prmd;
> +static u64 saved_euen;
> +static u64 saved_ecfg;
> +struct pt_regs saved_regs;
> +
> +void save_processor_state(void)
> +{
> +	saved_crmd = csr_read32(LOONGARCH_CSR_CRMD);
> +	saved_prmd = csr_read32(LOONGARCH_CSR_PRMD);
> +	saved_euen = csr_read32(LOONGARCH_CSR_EUEN);
> +	saved_ecfg = csr_read32(LOONGARCH_CSR_ECFG);
> +
> +	if (is_fpu_owner())
> +		save_fp(current);
> +}
> +
> +void restore_processor_state(void)
> +{
> +	csr_write32(saved_crmd, LOONGARCH_CSR_CRMD);
> +	csr_write32(saved_prmd, LOONGARCH_CSR_PRMD);
> +	csr_write32(saved_euen, LOONGARCH_CSR_EUEN);
> +	csr_write32(saved_ecfg, LOONGARCH_CSR_ECFG);
> +
> +	if (is_fpu_owner())
> +		restore_fp(current);
> +}
> +
> +int pfn_is_nosave(unsigned long pfn)
> +{
I'm surprised that every arch has its own version of pfn_is_nosave().

We can improve it. But it's beyond these patches, just ignore here.


> +	unsigned long nosave_begin_pfn = PFN_DOWN(__pa(&__nosave_begin));
> +	unsigned long nosave_end_pfn = PFN_UP(__pa(&__nosave_end));
> +
> +	return	(pfn >= nosave_begin_pfn) && (pfn < nosave_end_pfn);
> +}
> +
> +extern int swsusp_asm_suspend(void);
> +
> +int swsusp_arch_suspend(void)
> +{
> +	enable_pci_wakeup();
> +	return swsusp_asm_suspend();
> +}
> +
> +extern int swsusp_asm_resume(void);
> +
> +int swsusp_arch_resume(void)
> +{
> +	/* Avoid TLB mismatch during and after kernel resume */
> +	local_flush_tlb_all();
> +	return swsusp_asm_resume();
> +}
> diff --git a/arch/loongarch/power/hibernate_asm.S b/arch/loongarch/power/hibernate_asm.S
> new file mode 100644
> index 000000000000..7894fbd56c85
> --- /dev/null
> +++ b/arch/loongarch/power/hibernate_asm.S
> @@ -0,0 +1,64 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/*
> + * Hibernation support specific for LoongArch
> + *
> + * Author: Huacai Chen <chenhuacai@loongson.cn>
> + * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
> + */
> +#include <linux/linkage.h>
> +#include <asm/asm.h>
> +#include <asm/asm-offsets.h>
> +#include <asm/regdef.h>
> +
> +.text
> +SYM_FUNC_START(swsusp_asm_suspend)
> +	la.pcrel	t0, saved_regs
> +	PTR_S		ra, t0, PT_R1
> +	PTR_S		sp, t0, PT_R3
> +	PTR_S		fp, t0, PT_R22
> +	PTR_S		tp, t0, PT_R2
> +	PTR_S		s0, t0, PT_R23
> +	PTR_S		s1, t0, PT_R24
> +	PTR_S		s2, t0, PT_R25
> +	PTR_S		s3, t0, PT_R26
> +	PTR_S		s4, t0, PT_R27
> +	PTR_S		s5, t0, PT_R28
> +	PTR_S		s6, t0, PT_R29
> +	PTR_S		s7, t0, PT_R30
> +	PTR_S		s8, t0, PT_R31
> +	b		swsusp_save

Is needed save and restore PERCPU_BASE_KS, u0 or other KSave registers?


Thanks,

Jinyang


> +SYM_FUNC_END(swsusp_asm_suspend)
> +
> +SYM_FUNC_START(swsusp_asm_resume)
> +	la.pcrel	t0, restore_pblist
> +	PTR_L		t0, t0, 0
> +0:
> +	PTR_L		t1, t0, PBE_ADDRESS  /* source */
> +	PTR_L		t2, t0, PBE_ORIG_ADDRESS /* destination */
> +	PTR_LI		t3, _PAGE_SIZE
> +	PTR_ADD		t3, t3, t1
> +1:
> +	REG_L		t8, t1, 0
> +	REG_S		t8, t2, 0
> +	PTR_ADDI	t1, t1, SZREG
> +	PTR_ADDI	t2, t2, SZREG
> +	bne		t1, t3, 1b
> +	PTR_L		t0, t0, PBE_NEXT
> +	bnez		t0, 0b
> +	la.pcrel	t0, saved_regs
> +	PTR_L		ra, t0, PT_R1
> +	PTR_L		sp, t0, PT_R3
> +	PTR_L		fp, t0, PT_R22
> +	PTR_L		tp, t0, PT_R2
> +	PTR_L		s0, t0, PT_R23
> +	PTR_L		s1, t0, PT_R24
> +	PTR_L		s2, t0, PT_R25
> +	PTR_L		s3, t0, PT_R26
> +	PTR_L		s4, t0, PT_R27
> +	PTR_L		s5, t0, PT_R28
> +	PTR_L		s6, t0, PT_R29
> +	PTR_L		s7, t0, PT_R30
> +	PTR_L		s8, t0, PT_R31
> +	PTR_LI		a0, 0x0
> +	jirl		zero, ra, 0
> +SYM_FUNC_END(swsusp_asm_resume)

Re: [PATCH 1/2] LoongArch: Add suspend (ACPI S3) support

[Huacai Chen]

 Hi, Jinyang,

On Fri, Oct 28, 2022 at 3:23 PM Jinyang He <hejinyang@loongson.cn> wrote:
>
> On 2022/10/28 上午10:38, Huacai Chen wrote:
>
> > Add suspend (Suspend To RAM, aka ACPI S3) support for LoongArch.
> >
> > Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
> > ---
> >   arch/loongarch/Kconfig                |   5 ++
> >   arch/loongarch/Makefile               |   3 +
> >   arch/loongarch/include/asm/acpi.h     |  10 +++
> >   arch/loongarch/include/asm/bootinfo.h |   1 +
> >   arch/loongarch/include/asm/loongson.h |   3 +
> >   arch/loongarch/include/asm/time.h     |   1 +
> >   arch/loongarch/kernel/acpi.c          |   6 ++
> >   arch/loongarch/kernel/smp.c           |   1 +
> >   arch/loongarch/kernel/time.c          |  11 ++-
> >   arch/loongarch/power/Makefile         |   3 +
> >   arch/loongarch/power/platform.c       |  45 +++++++++++
> >   arch/loongarch/power/suspend.c        |  73 +++++++++++++++++
> >   arch/loongarch/power/suspend_asm.S    | 112 ++++++++++++++++++++++++++
> >   13 files changed, 271 insertions(+), 3 deletions(-)
> >   create mode 100644 arch/loongarch/power/Makefile
> >   create mode 100644 arch/loongarch/power/platform.c
> >   create mode 100644 arch/loongarch/power/suspend.c
> >   create mode 100644 arch/loongarch/power/suspend_asm.S
> >
> > diff --git a/arch/loongarch/Kconfig b/arch/loongarch/Kconfig
> > index a8dc58e8162a..0df102401d1d 100644
> > --- a/arch/loongarch/Kconfig
> > +++ b/arch/loongarch/Kconfig
> > @@ -57,6 +57,7 @@ config LOONGARCH
> >       select ARCH_WANTS_NO_INSTR
> >       select BUILDTIME_TABLE_SORT
> >       select COMMON_CLK
> > +     select CPU_PM
> >       select EFI
> >       select GENERIC_CLOCKEVENTS
> >       select GENERIC_CMOS_UPDATE
> > @@ -517,6 +518,10 @@ config ARCH_MMAP_RND_BITS_MAX
> >
> >   menu "Power management options"
> >
> > +config ARCH_SUSPEND_POSSIBLE
> > +     def_bool y
> > +
> > +source "kernel/power/Kconfig"
> >   source "drivers/acpi/Kconfig"
> >
> >   endmenu
> > diff --git a/arch/loongarch/Makefile b/arch/loongarch/Makefile
> > index f4cb54d5afd6..a0fc1f9980e3 100644
> > --- a/arch/loongarch/Makefile
> > +++ b/arch/loongarch/Makefile
> > @@ -104,6 +104,9 @@ endif
> >   libs-y += arch/loongarch/lib/
> >   libs-$(CONFIG_EFI_STUB) += $(objtree)/drivers/firmware/efi/libstub/lib.a
> >
> > +# suspend and hibernation support
> > +drivers-$(CONFIG_PM) += arch/loongarch/power/
> > +
> >   ifeq ($(KBUILD_EXTMOD),)
> >   prepare: vdso_prepare
> >   vdso_prepare: prepare0
> > diff --git a/arch/loongarch/include/asm/acpi.h b/arch/loongarch/include/asm/acpi.h
> > index 825c2519b9d1..9664868b1260 100644
> > --- a/arch/loongarch/include/asm/acpi.h
> > +++ b/arch/loongarch/include/asm/acpi.h
> > @@ -35,4 +35,14 @@ extern struct list_head acpi_wakeup_device_list;
> >
> >   #define ACPI_TABLE_UPGRADE_MAX_PHYS ARCH_LOW_ADDRESS_LIMIT
> >
> > +extern int loongarch_acpi_suspend(void);
> > +extern int (*acpi_suspend_lowlevel)(void);
> > +extern void loongarch_suspend_enter(void);
> > +extern void loongarch_wakeup_start(void);
> > +
> > +static inline unsigned long acpi_get_wakeup_address(void)
> > +{
> > +     return (unsigned long)loongarch_wakeup_start;
> > +}
> > +
> >   #endif /* _ASM_LOONGARCH_ACPI_H */
> > diff --git a/arch/loongarch/include/asm/bootinfo.h b/arch/loongarch/include/asm/bootinfo.h
> > index ed0910e8b856..0051b526ac6d 100644
> > --- a/arch/loongarch/include/asm/bootinfo.h
> > +++ b/arch/loongarch/include/asm/bootinfo.h
> > @@ -32,6 +32,7 @@ struct loongson_system_configuration {
> >       int cores_per_node;
> >       int cores_per_package;
> >       unsigned long cores_io_master;
> > +     unsigned long suspend_addr;
> >       const char *cpuname;
> >   };
> >
> > diff --git a/arch/loongarch/include/asm/loongson.h b/arch/loongarch/include/asm/loongson.h
> > index 00db93edae1b..12494cffffd1 100644
> > --- a/arch/loongarch/include/asm/loongson.h
> > +++ b/arch/loongarch/include/asm/loongson.h
> > @@ -136,4 +136,7 @@ typedef enum {
> >   #define ls7a_writel(val, addr)      *(volatile unsigned int   *)TO_UNCACHE(addr) = (val)
> >   #define ls7a_writeq(val, addr)      *(volatile unsigned long  *)TO_UNCACHE(addr) = (val)
> >
> > +void enable_gpe_wakeup(void);
> > +void enable_pci_wakeup(void);
> > +
> >   #endif /* __ASM_LOONGSON_H */
> > diff --git a/arch/loongarch/include/asm/time.h b/arch/loongarch/include/asm/time.h
> > index 2eae219301d0..037a2d1b8ff4 100644
> > --- a/arch/loongarch/include/asm/time.h
> > +++ b/arch/loongarch/include/asm/time.h
> > @@ -12,6 +12,7 @@
> >   extern u64 cpu_clock_freq;
> >   extern u64 const_clock_freq;
> >
> > +extern void save_counter(void);
> >   extern void sync_counter(void);
> >
> >   static inline unsigned int calc_const_freq(void)
> > diff --git a/arch/loongarch/kernel/acpi.c b/arch/loongarch/kernel/acpi.c
> > index 335398482038..982672caf753 100644
> > --- a/arch/loongarch/kernel/acpi.c
> > +++ b/arch/loongarch/kernel/acpi.c
> > @@ -156,6 +156,12 @@ static void __init acpi_process_madt(void)
> >       loongson_sysconf.nr_cpus = num_processors;
> >   }
> >
> > +#ifdef CONFIG_ACPI_SLEEP
> > +int (*acpi_suspend_lowlevel)(void) = loongarch_acpi_suspend;
> > +#else
> > +int (*acpi_suspend_lowlevel)(void);
> > +#endif
> > +
> >   int __init acpi_boot_init(void)
> >   {
> >       /*
> > diff --git a/arch/loongarch/kernel/smp.c b/arch/loongarch/kernel/smp.c
> > index 781a4d4bdddc..6e192a25e134 100644
> > --- a/arch/loongarch/kernel/smp.c
> > +++ b/arch/loongarch/kernel/smp.c
> > @@ -16,6 +16,7 @@
> >   #include <linux/smp.h>
> >   #include <linux/threads.h>
> >   #include <linux/export.h>
> > +#include <linux/syscore_ops.h>
> >   #include <linux/time.h>
> >   #include <linux/tracepoint.h>
> >   #include <linux/sched/hotplug.h>
> > diff --git a/arch/loongarch/kernel/time.c b/arch/loongarch/kernel/time.c
> > index 786735dcc8d6..a6576dea590c 100644
> > --- a/arch/loongarch/kernel/time.c
> > +++ b/arch/loongarch/kernel/time.c
> > @@ -115,12 +115,17 @@ static unsigned long __init get_loops_per_jiffy(void)
> >       return lpj;
> >   }
> >
> > -static long init_timeval;
> > +static long init_offset __nosavedata;
> > +
> > +void save_counter(void)
> > +{
> > +     init_offset = drdtime();
> > +}
> >
> >   void sync_counter(void)
> >   {
> >       /* Ensure counter begin at 0 */
> > -     csr_write64(-init_timeval, LOONGARCH_CSR_CNTC);
> > +     csr_write64(init_offset, LOONGARCH_CSR_CNTC);
> >   }
> >
> >   static int get_timer_irq(void)
> > @@ -219,7 +224,7 @@ void __init time_init(void)
> >       else
> >               const_clock_freq = calc_const_freq();
> >
> > -     init_timeval = drdtime() - csr_read64(LOONGARCH_CSR_CNTC);
> > +     init_offset = -(drdtime() - csr_read64(LOONGARCH_CSR_CNTC));
> >
> >       constant_clockevent_init();
> >       constant_clocksource_init();
> > diff --git a/arch/loongarch/power/Makefile b/arch/loongarch/power/Makefile
> > new file mode 100644
> > index 000000000000..6740117decaa
> > --- /dev/null
> > +++ b/arch/loongarch/power/Makefile
> > @@ -0,0 +1,3 @@
> > +obj-y        += platform.o
> > +
> > +obj-$(CONFIG_SUSPEND)                += suspend.o suspend_asm.o
> > diff --git a/arch/loongarch/power/platform.c b/arch/loongarch/power/platform.c
> > new file mode 100644
> > index 000000000000..675e8792afaf
> > --- /dev/null
> > +++ b/arch/loongarch/power/platform.c
> > @@ -0,0 +1,45 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * Author: Huacai Chen <chenhuacai@loongson.cn>
> > + * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
> > + */
> > +#include <linux/acpi.h>
> > +#include <linux/platform_device.h>
> > +
> > +#include <asm/bootinfo.h>
> > +#include <asm/setup.h>
> > +
> > +void enable_gpe_wakeup(void)
> > +{
> > +     acpi_enable_all_wakeup_gpes();
> > +}
> > +
> > +void enable_pci_wakeup(void)
> > +{
> > +     acpi_write_bit_register(ACPI_BITREG_PCIEXP_WAKE_STATUS, 1);
> > +
> > +     if (acpi_gbl_FADT.flags & ACPI_FADT_PCI_EXPRESS_WAKE)
> > +             acpi_write_bit_register(ACPI_BITREG_PCIEXP_WAKE_DISABLE, 0);
> > +}
> > +
> > +static int __init loongson3_acpi_suspend_init(void)
> > +{
> > +#ifdef CONFIG_ACPI
> > +     acpi_status status;
> > +     uint64_t suspend_addr = 0;
> > +
> > +     if (acpi_disabled || acpi_gbl_reduced_hardware)
> > +             return 0;
> > +
> > +     acpi_write_bit_register(ACPI_BITREG_SCI_ENABLE, 1);
> > +     status = acpi_evaluate_integer(NULL, "\\SADR", NULL, &suspend_addr);
> > +     if (ACPI_FAILURE(status) || !suspend_addr) {
> > +             pr_err("ACPI S3 is not support!\n");
> > +             return -1;
> > +     }
> > +     loongson_sysconf.suspend_addr = (u64)phys_to_virt(PHYSADDR(suspend_addr));
> > +#endif
> > +     return 0;
> > +}
> > +
> > +device_initcall(loongson3_acpi_suspend_init);
> > diff --git a/arch/loongarch/power/suspend.c b/arch/loongarch/power/suspend.c
> > new file mode 100644
> > index 000000000000..b9fa0f9a9277
> > --- /dev/null
> > +++ b/arch/loongarch/power/suspend.c
> > @@ -0,0 +1,73 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * loongson-specific suspend support
> > + *
> > + * Author: Huacai Chen <chenhuacai@loongson.cn>
> > + * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
> > + */
> > +#include <linux/acpi.h>
> > +#include <linux/pm.h>
> > +#include <linux/suspend.h>
> > +
> > +#include <asm/loongarch.h>
> > +#include <asm/loongson.h>
> > +#include <asm/setup.h>
> > +#include <asm/time.h>
> > +#include <asm/tlbflush.h>
> > +
> > +u64 loongarch_suspend_addr;
> > +
> > +struct saved_registers {
> > +     u32 ecfg;
> > +     u32 euen;
> > +     u64 pgd;
> > +     u64 kpgd;
> > +     u32 pwctl0;
> > +     u32 pwctl1;
> > +};
> > +static struct saved_registers saved_regs;
> > +
> > +static void arch_common_suspend(void)
> > +{
> > +     save_counter();
> > +     saved_regs.pgd = csr_read64(LOONGARCH_CSR_PGDL);
> > +     saved_regs.kpgd = csr_read64(LOONGARCH_CSR_PGDH);
> > +     saved_regs.pwctl0 = csr_read32(LOONGARCH_CSR_PWCTL0);
> > +     saved_regs.pwctl1 = csr_read32(LOONGARCH_CSR_PWCTL1);
> > +     saved_regs.ecfg = csr_read32(LOONGARCH_CSR_ECFG);
> > +     saved_regs.euen = csr_read32(LOONGARCH_CSR_EUEN);
> > +
> > +     loongarch_suspend_addr = loongson_sysconf.suspend_addr;
> > +}
> > +
> > +static void arch_common_resume(void)
> > +{
> > +     sync_counter();
> > +     local_flush_tlb_all();
> > +     csr_write64(per_cpu_offset(0), PERCPU_BASE_KS);
> > +     csr_write64(eentry, LOONGARCH_CSR_EENTRY);
> > +     csr_write64(eentry, LOONGARCH_CSR_MERRENTRY);
> > +     csr_write64(tlbrentry, LOONGARCH_CSR_TLBRENTRY);
> > +
> > +     csr_write64(saved_regs.pgd, LOONGARCH_CSR_PGDL);
> > +     csr_write64(saved_regs.kpgd, LOONGARCH_CSR_PGDH);
> > +     csr_write32(saved_regs.pwctl0, LOONGARCH_CSR_PWCTL0);
> > +     csr_write32(saved_regs.pwctl1, LOONGARCH_CSR_PWCTL1);
> > +     csr_write32(saved_regs.ecfg, LOONGARCH_CSR_ECFG);
> > +     csr_write32(saved_regs.euen, LOONGARCH_CSR_EUEN);
> > +}
> > +
> > +int loongarch_acpi_suspend(void)
> > +{
> > +     enable_gpe_wakeup();
> > +     enable_pci_wakeup();
> > +
> > +     arch_common_suspend();
> > +
> > +     /* processor specific suspend */
> > +     loongarch_suspend_enter();
> > +
> > +     arch_common_resume();
> > +
> > +     return 0;
> > +}
> > diff --git a/arch/loongarch/power/suspend_asm.S b/arch/loongarch/power/suspend_asm.S
> > new file mode 100644
> > index 000000000000..ff52c3aa09d9
> > --- /dev/null
> > +++ b/arch/loongarch/power/suspend_asm.S
> > @@ -0,0 +1,108 @@
> > +/* SPDX-License-Identifier: GPL-2.0 */
> > +/*
> > + * Sleep helper for Loongson-3 sleep mode.
> > + *
> > + * Author: Huacai Chen <chenhuacai@loongson.cn>
> > + * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
> > + */
> > +
> > +#include <asm/asm.h>
> > +#include <asm/asmmacro.h>
> > +#include <asm/addrspace.h>
> > +#include <asm/loongarch.h>
> > +#include <asm/stackframe.h>
> > +
> > +     .text
> > +     .align  5
> > +
> > +/* preparatory stuff */
> > +.macro       SETUP_SLEEP
> > +     addi.d          sp, sp, -PT_SIZE
> > +     st.d            $r1, sp, PT_R1
> > +     st.d            $r2, sp, PT_R2
> > +     st.d            $r3, sp, PT_R3
> > +     st.d            $r4, sp, PT_R4
> > +     st.d            $r5, sp, PT_R5
> > +     st.d            $r6, sp, PT_R6
> > +     st.d            $r7, sp, PT_R7
> > +     st.d            $r8, sp, PT_R8
> > +     st.d            $r9, sp, PT_R9
> > +     st.d            $r10, sp, PT_R10
> > +     st.d            $r11, sp, PT_R11
> > +     st.d            $r20, sp, PT_R20
> > +     st.d            $r21, sp, PT_R21
> > +     st.d            $r22, sp, PT_R22
> > +     st.d            $r23, sp, PT_R23
> > +     st.d            $r24, sp, PT_R24
> > +     st.d            $r25, sp, PT_R25
> > +     st.d            $r26, sp, PT_R26
> > +     st.d            $r27, sp, PT_R27
> > +     st.d            $r28, sp, PT_R28
> > +     st.d            $r29, sp, PT_R29
> > +     st.d            $r30, sp, PT_R30
> > +     st.d            $r31, sp, PT_R31
> > +
> > +     la.pcrel        t0, acpi_saved_sp
> > +     st.d            sp, t0, 0
> > +.endm
> > +
> > +/* Sleep code for Loongson-3 */
> > +SYM_CODE_START(loongarch_suspend_enter)
> > +     SETUP_SLEEP
> > +     bl              __flush_cache_all
> > +
> > +     /* Pass RA and SP to BIOS */
> > +     addi.d          a1, sp, 0
> > +     la.pcrel        a0, loongarch_wakeup_start
> > +     la.pcrel        t0, loongarch_suspend_addr
> > +     ld.d            t0, t0, 0 /* Call BIOS's STR sleep routine */
> > +     jr              t0
> > +     nop
> Hi, Huacai,
>
> For loongarch_suspend_enter() and loongarch_wakeup_start(), it is better to
> make them be more like C-style, that means it could obey LoongArch-psABI.
> Just alloc limited stack and store the ra, s* and fp registers.
> Additionally,
> the tp and the u0 should be saved, too. Combine
> loongarch_suspend_enter() and
> loongarch_suspend_enter() to one function and using 'jirl a0, t0, 0' to link
> them which indicate the control flow will return. These works make the
> control
> flow clarity. Finally use SYM_FUNC_START/END declare the new function.
Thank you for your comments, but you may misunderstand something about S3.
1,  S3 sleep means come from kernel to BIOS, and S3 wakeup means come
from BIOS to kernel (it has a POST progress, all register context
lost). This is very different from a function call. When exception
handling we need to save all and restore all, S3 wakeup should do even
more.
2, a0 (wakeup pc) and a1 (wakeup sp) are information passed to BIOS,
BIOS may store it in some place similar to NVRAM, it does not
naturally exist in the register after power up.
3, What means combine  loongarch_suspend_enter() and loongarch_suspend_enter()?

Huacai

>
> Thanks,
>
> Jinyang
>
>
> > +SYM_CODE_END(loongarch_suspend_enter)
> > +
> > +.macro SETUP_WAKEUP
> > +     ld.d            $r1, sp, PT_R1
> > +     ld.d            $r2, sp, PT_R2
> > +     ld.d            $r3, sp, PT_R3
> > +     ld.d            $r4, sp, PT_R4
> > +     ld.d            $r5, sp, PT_R5
> > +     ld.d            $r6, sp, PT_R6
> > +     ld.d            $r7, sp, PT_R7
> > +     ld.d            $r8, sp, PT_R8
> > +     ld.d            $r9, sp, PT_R9
> > +     ld.d            $r10, sp, PT_R10
> > +     ld.d            $r11, sp, PT_R11
> > +     ld.d            $r20, sp, PT_R20
> > +     ld.d            $r21, sp, PT_R21
> > +     ld.d            $r22, sp, PT_R22
> > +     ld.d            $r23, sp, PT_R23
> > +     ld.d            $r24, sp, PT_R24
> > +     ld.d            $r25, sp, PT_R25
> > +     ld.d            $r26, sp, PT_R26
> > +     ld.d            $r27, sp, PT_R27
> > +     ld.d            $r28, sp, PT_R28
> > +     ld.d            $r29, sp, PT_R29
> > +     ld.d            $r30, sp, PT_R30
> > +     ld.d            $r31, sp, PT_R31
> > +.endm
> > +
> > +     /* This is where we return upon wakeup.
> > +      * Reload all of the registers and return.
> > +      */
> > +     .align 12
> > +
> > +SYM_CODE_START(loongarch_wakeup_start)
> > +     li.d            t0, CSR_DMW0_INIT       # UC, PLV0
> > +     csrwr           t0, LOONGARCH_CSR_DMWIN0
> > +     li.d            t0, CSR_DMW1_INIT       # CA, PLV0
> > +     csrwr           t0, LOONGARCH_CSR_DMWIN1
> > +
> > +     la.abs          t0, 0f
> > +     jr              t0
> > +0:
> > +     la.pcrel        t0, acpi_saved_sp
> > +     ld.d            sp, t0, 0
> > +     SETUP_WAKEUP
> > +     addi.d          sp, sp, PT_SIZE
> > +     jr              ra
> > +SYM_CODE_END(loongarch_wakeup_start)
>
>

Re: [PATCH 1/2] LoongArch: Add suspend (ACPI S3) support

[Youling Tang]

Hi, Huacai

On 10/28/2022 10:38 AM, Huacai Chen wrote:
> Add suspend (Suspend To RAM, aka ACPI S3) support for LoongArch.
>
> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
> ---
>  arch/loongarch/Kconfig                |   5 ++
>  arch/loongarch/Makefile               |   3 +
>  arch/loongarch/include/asm/acpi.h     |  10 +++
>  arch/loongarch/include/asm/bootinfo.h |   1 +
>  arch/loongarch/include/asm/loongson.h |   3 +
>  arch/loongarch/include/asm/time.h     |   1 +
>  arch/loongarch/kernel/acpi.c          |   6 ++
>  arch/loongarch/kernel/smp.c           |   1 +
>  arch/loongarch/kernel/time.c          |  11 ++-
>  arch/loongarch/power/Makefile         |   3 +
>  arch/loongarch/power/platform.c       |  45 +++++++++++
>  arch/loongarch/power/suspend.c        |  73 +++++++++++++++++
>  arch/loongarch/power/suspend_asm.S    | 112 ++++++++++++++++++++++++++
>  13 files changed, 271 insertions(+), 3 deletions(-)
>  create mode 100644 arch/loongarch/power/Makefile
>  create mode 100644 arch/loongarch/power/platform.c
>  create mode 100644 arch/loongarch/power/suspend.c
>  create mode 100644 arch/loongarch/power/suspend_asm.S
>
> diff --git a/arch/loongarch/Kconfig b/arch/loongarch/Kconfig
> index a8dc58e8162a..0df102401d1d 100644
> --- a/arch/loongarch/Kconfig
> +++ b/arch/loongarch/Kconfig
> @@ -57,6 +57,7 @@ config LOONGARCH
>  	select ARCH_WANTS_NO_INSTR
>  	select BUILDTIME_TABLE_SORT
>  	select COMMON_CLK
> +	select CPU_PM
>  	select EFI
>  	select GENERIC_CLOCKEVENTS
>  	select GENERIC_CMOS_UPDATE
> @@ -517,6 +518,10 @@ config ARCH_MMAP_RND_BITS_MAX
>
>  menu "Power management options"
>
> +config ARCH_SUSPEND_POSSIBLE
> +	def_bool y
> +
> +source "kernel/power/Kconfig"
>  source "drivers/acpi/Kconfig"
>
>  endmenu
> diff --git a/arch/loongarch/Makefile b/arch/loongarch/Makefile
> index f4cb54d5afd6..a0fc1f9980e3 100644
> --- a/arch/loongarch/Makefile
> +++ b/arch/loongarch/Makefile
> @@ -104,6 +104,9 @@ endif
>  libs-y += arch/loongarch/lib/
>  libs-$(CONFIG_EFI_STUB) += $(objtree)/drivers/firmware/efi/libstub/lib.a
>
> +# suspend and hibernation support
> +drivers-$(CONFIG_PM)	+= arch/loongarch/power/
> +
>  ifeq ($(KBUILD_EXTMOD),)
>  prepare: vdso_prepare
>  vdso_prepare: prepare0
> diff --git a/arch/loongarch/include/asm/acpi.h b/arch/loongarch/include/asm/acpi.h
> index 825c2519b9d1..9664868b1260 100644
> --- a/arch/loongarch/include/asm/acpi.h
> +++ b/arch/loongarch/include/asm/acpi.h
> @@ -35,4 +35,14 @@ extern struct list_head acpi_wakeup_device_list;
>
>  #define ACPI_TABLE_UPGRADE_MAX_PHYS ARCH_LOW_ADDRESS_LIMIT
>
> +extern int loongarch_acpi_suspend(void);
> +extern int (*acpi_suspend_lowlevel)(void);
> +extern void loongarch_suspend_enter(void);
> +extern void loongarch_wakeup_start(void);
> +
> +static inline unsigned long acpi_get_wakeup_address(void)
> +{
> +	return (unsigned long)loongarch_wakeup_start;
> +}
> +
>  #endif /* _ASM_LOONGARCH_ACPI_H */
> diff --git a/arch/loongarch/include/asm/bootinfo.h b/arch/loongarch/include/asm/bootinfo.h
> index ed0910e8b856..0051b526ac6d 100644
> --- a/arch/loongarch/include/asm/bootinfo.h
> +++ b/arch/loongarch/include/asm/bootinfo.h
> @@ -32,6 +32,7 @@ struct loongson_system_configuration {
>  	int cores_per_node;
>  	int cores_per_package;
>  	unsigned long cores_io_master;
> +	unsigned long suspend_addr;
>  	const char *cpuname;
>  };
>
> diff --git a/arch/loongarch/include/asm/loongson.h b/arch/loongarch/include/asm/loongson.h
> index 00db93edae1b..12494cffffd1 100644
> --- a/arch/loongarch/include/asm/loongson.h
> +++ b/arch/loongarch/include/asm/loongson.h
> @@ -136,4 +136,7 @@ typedef enum {
>  #define ls7a_writel(val, addr)	*(volatile unsigned int   *)TO_UNCACHE(addr) = (val)
>  #define ls7a_writeq(val, addr)	*(volatile unsigned long  *)TO_UNCACHE(addr) = (val)
>
> +void enable_gpe_wakeup(void);
> +void enable_pci_wakeup(void);
> +
>  #endif /* __ASM_LOONGSON_H */
> diff --git a/arch/loongarch/include/asm/time.h b/arch/loongarch/include/asm/time.h
> index 2eae219301d0..037a2d1b8ff4 100644
> --- a/arch/loongarch/include/asm/time.h
> +++ b/arch/loongarch/include/asm/time.h
> @@ -12,6 +12,7 @@
>  extern u64 cpu_clock_freq;
>  extern u64 const_clock_freq;
>
> +extern void save_counter(void);
>  extern void sync_counter(void);
>
>  static inline unsigned int calc_const_freq(void)
> diff --git a/arch/loongarch/kernel/acpi.c b/arch/loongarch/kernel/acpi.c
> index 335398482038..982672caf753 100644
> --- a/arch/loongarch/kernel/acpi.c
> +++ b/arch/loongarch/kernel/acpi.c
> @@ -156,6 +156,12 @@ static void __init acpi_process_madt(void)
>  	loongson_sysconf.nr_cpus = num_processors;
>  }
>
> +#ifdef CONFIG_ACPI_SLEEP
> +int (*acpi_suspend_lowlevel)(void) = loongarch_acpi_suspend;
> +#else
> +int (*acpi_suspend_lowlevel)(void);
> +#endif
> +
>  int __init acpi_boot_init(void)
>  {
>  	/*
> diff --git a/arch/loongarch/kernel/smp.c b/arch/loongarch/kernel/smp.c
> index 781a4d4bdddc..6e192a25e134 100644
> --- a/arch/loongarch/kernel/smp.c
> +++ b/arch/loongarch/kernel/smp.c
> @@ -16,6 +16,7 @@
>  #include <linux/smp.h>
>  #include <linux/threads.h>
>  #include <linux/export.h>
> +#include <linux/syscore_ops.h>
>  #include <linux/time.h>
>  #include <linux/tracepoint.h>
>  #include <linux/sched/hotplug.h>
> diff --git a/arch/loongarch/kernel/time.c b/arch/loongarch/kernel/time.c
> index 786735dcc8d6..a6576dea590c 100644
> --- a/arch/loongarch/kernel/time.c
> +++ b/arch/loongarch/kernel/time.c
> @@ -115,12 +115,17 @@ static unsigned long __init get_loops_per_jiffy(void)
>  	return lpj;
>  }
>
> -static long init_timeval;
> +static long init_offset __nosavedata;
> +
> +void save_counter(void)
> +{
> +	init_offset = drdtime();
> +}
>
>  void sync_counter(void)
>  {
>  	/* Ensure counter begin at 0 */
> -	csr_write64(-init_timeval, LOONGARCH_CSR_CNTC);
> +	csr_write64(init_offset, LOONGARCH_CSR_CNTC);
>  }
>
>  static int get_timer_irq(void)
> @@ -219,7 +224,7 @@ void __init time_init(void)
>  	else
>  		const_clock_freq = calc_const_freq();
>
> -	init_timeval = drdtime() - csr_read64(LOONGARCH_CSR_CNTC);
> +	init_offset = -(drdtime() - csr_read64(LOONGARCH_CSR_CNTC));
>
>  	constant_clockevent_init();
>  	constant_clocksource_init();
> diff --git a/arch/loongarch/power/Makefile b/arch/loongarch/power/Makefile
> new file mode 100644
> index 000000000000..6740117decaa
> --- /dev/null
> +++ b/arch/loongarch/power/Makefile
> @@ -0,0 +1,3 @@
> +obj-y	+= platform.o
> +
> +obj-$(CONFIG_SUSPEND)		+= suspend.o suspend_asm.o
> diff --git a/arch/loongarch/power/platform.c b/arch/loongarch/power/platform.c
> new file mode 100644
> index 000000000000..675e8792afaf
> --- /dev/null
> +++ b/arch/loongarch/power/platform.c
> @@ -0,0 +1,45 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Author: Huacai Chen <chenhuacai@loongson.cn>
> + * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
> + */
> +#include <linux/acpi.h>
> +#include <linux/platform_device.h>
> +
> +#include <asm/bootinfo.h>
> +#include <asm/setup.h>
> +
> +void enable_gpe_wakeup(void)
> +{
> +	acpi_enable_all_wakeup_gpes();
> +}
> +
> +void enable_pci_wakeup(void)
> +{
> +	acpi_write_bit_register(ACPI_BITREG_PCIEXP_WAKE_STATUS, 1);
> +
> +	if (acpi_gbl_FADT.flags & ACPI_FADT_PCI_EXPRESS_WAKE)
> +		acpi_write_bit_register(ACPI_BITREG_PCIEXP_WAKE_DISABLE, 0);
> +}
> +
> +static int __init loongson3_acpi_suspend_init(void)
> +{
> +#ifdef CONFIG_ACPI
> +	acpi_status status;
> +	uint64_t suspend_addr = 0;
> +
> +	if (acpi_disabled || acpi_gbl_reduced_hardware)
> +		return 0;
> +
> +	acpi_write_bit_register(ACPI_BITREG_SCI_ENABLE, 1);
> +	status = acpi_evaluate_integer(NULL, "\\SADR", NULL, &suspend_addr);
> +	if (ACPI_FAILURE(status) || !suspend_addr) {
> +		pr_err("ACPI S3 is not support!\n");
> +		return -1;
> +	}
> +	loongson_sysconf.suspend_addr = (u64)phys_to_virt(PHYSADDR(suspend_addr));
> +#endif
> +	return 0;
> +}
> +
> +device_initcall(loongson3_acpi_suspend_init);
> diff --git a/arch/loongarch/power/suspend.c b/arch/loongarch/power/suspend.c
> new file mode 100644
> index 000000000000..b9fa0f9a9277
> --- /dev/null
> +++ b/arch/loongarch/power/suspend.c
> @@ -0,0 +1,73 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * loongson-specific suspend support
> + *
> + * Author: Huacai Chen <chenhuacai@loongson.cn>
> + * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
> + */
> +#include <linux/acpi.h>
> +#include <linux/pm.h>
> +#include <linux/suspend.h>
> +
> +#include <asm/loongarch.h>
> +#include <asm/loongson.h>
> +#include <asm/setup.h>
> +#include <asm/time.h>
> +#include <asm/tlbflush.h>
> +
> +u64 loongarch_suspend_addr;
> +
> +struct saved_registers {
> +	u32 ecfg;
> +	u32 euen;
> +	u64 pgd;
> +	u64 kpgd;
> +	u32 pwctl0;
> +	u32 pwctl1;
> +};
> +static struct saved_registers saved_regs;
> +
> +static void arch_common_suspend(void)
> +{
> +	save_counter();
> +	saved_regs.pgd = csr_read64(LOONGARCH_CSR_PGDL);
> +	saved_regs.kpgd = csr_read64(LOONGARCH_CSR_PGDH);
> +	saved_regs.pwctl0 = csr_read32(LOONGARCH_CSR_PWCTL0);
> +	saved_regs.pwctl1 = csr_read32(LOONGARCH_CSR_PWCTL1);
> +	saved_regs.ecfg = csr_read32(LOONGARCH_CSR_ECFG);
> +	saved_regs.euen = csr_read32(LOONGARCH_CSR_EUEN);
> +
> +	loongarch_suspend_addr = loongson_sysconf.suspend_addr;
> +}
> +
> +static void arch_common_resume(void)
> +{
> +	sync_counter();
> +	local_flush_tlb_all();
> +	csr_write64(per_cpu_offset(0), PERCPU_BASE_KS);
> +	csr_write64(eentry, LOONGARCH_CSR_EENTRY);
> +	csr_write64(eentry, LOONGARCH_CSR_MERRENTRY);
> +	csr_write64(tlbrentry, LOONGARCH_CSR_TLBRENTRY);
> +
> +	csr_write64(saved_regs.pgd, LOONGARCH_CSR_PGDL);
> +	csr_write64(saved_regs.kpgd, LOONGARCH_CSR_PGDH);
> +	csr_write32(saved_regs.pwctl0, LOONGARCH_CSR_PWCTL0);
> +	csr_write32(saved_regs.pwctl1, LOONGARCH_CSR_PWCTL1);
> +	csr_write32(saved_regs.ecfg, LOONGARCH_CSR_ECFG);
> +	csr_write32(saved_regs.euen, LOONGARCH_CSR_EUEN);
> +}
> +
> +int loongarch_acpi_suspend(void)
> +{
> +	enable_gpe_wakeup();
> +	enable_pci_wakeup();
> +
> +	arch_common_suspend();
> +
> +	/* processor specific suspend */
> +	loongarch_suspend_enter();
> +
> +	arch_common_resume();
> +
> +	return 0;
> +}
> diff --git a/arch/loongarch/power/suspend_asm.S b/arch/loongarch/power/suspend_asm.S
> new file mode 100644
> index 000000000000..ff52c3aa09d9
> --- /dev/null
> +++ b/arch/loongarch/power/suspend_asm.S
> @@ -0,0 +1,108 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/*
> + * Sleep helper for Loongson-3 sleep mode.
> + *
> + * Author: Huacai Chen <chenhuacai@loongson.cn>
> + * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
> + */
> +
> +#include <asm/asm.h>
> +#include <asm/asmmacro.h>
> +#include <asm/addrspace.h>
> +#include <asm/loongarch.h>
> +#include <asm/stackframe.h>
> +
> +	.text
> +	.align	5
> +
> +/* preparatory stuff */
> +.macro	SETUP_SLEEP
> +	addi.d		sp, sp, -PT_SIZE
> +	st.d		$r1, sp, PT_R1
> +	st.d		$r2, sp, PT_R2
> +	st.d		$r3, sp, PT_R3
> +	st.d		$r4, sp, PT_R4
> +	st.d		$r5, sp, PT_R5
> +	st.d		$r6, sp, PT_R6
> +	st.d		$r7, sp, PT_R7
> +	st.d		$r8, sp, PT_R8
> +	st.d		$r9, sp, PT_R9
> +	st.d		$r10, sp, PT_R10
> +	st.d		$r11, sp, PT_R11
> +	st.d		$r20, sp, PT_R20
> +	st.d		$r21, sp, PT_R21
> +	st.d		$r22, sp, PT_R22
> +	st.d		$r23, sp, PT_R23
> +	st.d		$r24, sp, PT_R24
> +	st.d		$r25, sp, PT_R25
> +	st.d		$r26, sp, PT_R26
> +	st.d		$r27, sp, PT_R27
> +	st.d		$r28, sp, PT_R28
> +	st.d		$r29, sp, PT_R29
> +	st.d		$r30, sp, PT_R30
> +	st.d		$r31, sp, PT_R31
> +
> +	la.pcrel	t0, acpi_saved_sp
> +	st.d		sp, t0, 0
> +.endm
> +
> +/* Sleep code for Loongson-3 */
> +SYM_CODE_START(loongarch_suspend_enter)
> +	SETUP_SLEEP
> +	bl		__flush_cache_all
> +
> +	/* Pass RA and SP to BIOS */
> +	addi.d		a1, sp, 0
> +	la.pcrel	a0, loongarch_wakeup_start
> +	la.pcrel	t0, loongarch_suspend_addr
> +	ld.d		t0, t0, 0 /* Call BIOS's STR sleep routine */
> +	jr		t0
> +	nop
> +SYM_CODE_END(loongarch_suspend_enter)
> +
> +.macro SETUP_WAKEUP
> +	ld.d		$r1, sp, PT_R1
> +	ld.d		$r2, sp, PT_R2
> +	ld.d		$r3, sp, PT_R3
> +	ld.d		$r4, sp, PT_R4
> +	ld.d		$r5, sp, PT_R5
> +	ld.d		$r6, sp, PT_R6
> +	ld.d		$r7, sp, PT_R7
> +	ld.d		$r8, sp, PT_R8
> +	ld.d		$r9, sp, PT_R9
> +	ld.d		$r10, sp, PT_R10
> +	ld.d		$r11, sp, PT_R11
> +	ld.d		$r20, sp, PT_R20
> +	ld.d		$r21, sp, PT_R21
> +	ld.d		$r22, sp, PT_R22
> +	ld.d		$r23, sp, PT_R23
> +	ld.d		$r24, sp, PT_R24
> +	ld.d		$r25, sp, PT_R25
> +	ld.d		$r26, sp, PT_R26
> +	ld.d		$r27, sp, PT_R27
> +	ld.d		$r28, sp, PT_R28
> +	ld.d		$r29, sp, PT_R29
> +	ld.d		$r30, sp, PT_R30
> +	ld.d		$r31, sp, PT_R31
> +.endm
> +
> +	/* This is where we return upon wakeup.
> +	 * Reload all of the registers and return.
> +	 */
> +	.align 12
> +
> +SYM_CODE_START(loongarch_wakeup_start)
> +	li.d		t0, CSR_DMW0_INIT	# UC, PLV0
> +	csrwr		t0, LOONGARCH_CSR_DMWIN0
> +	li.d		t0, CSR_DMW1_INIT	# CA, PLV0
> +	csrwr		t0, LOONGARCH_CSR_DMWIN1
> +
> +	la.abs		t0, 0f
> +	jr		t0

We should try to avoid using la.abs in order to make it easier to
implement KASLR feature in the future.
If the purpose here is just to get the link address of the current
location, we would like to use the following method (and remove the
"0:" label):

li.d	t0, CACHE_BASE
pcaddi	t0, 0
or	t0, t0, t1
jirl	zero, t0, 0xc

Thanks,
Youling

> +0:
> +	la.pcrel	t0, acpi_saved_sp
> +	ld.d		sp, t0, 0
> +	SETUP_WAKEUP
> +	addi.d		sp, sp, PT_SIZE
> +	jr		ra
> +SYM_CODE_END(loongarch_wakeup_start)
>

Re: [PATCH 1/2] LoongArch: Add suspend (ACPI S3) support

[Huacai Chen]

Hi, Youling,

On Fri, Oct 28, 2022 at 5:06 PM Youling Tang <tangyouling@loongson.cn> wrote:
>
> Hi, Huacai
>
> On 10/28/2022 10:38 AM, Huacai Chen wrote:
> > Add suspend (Suspend To RAM, aka ACPI S3) support for LoongArch.
> >
> > Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
> > ---
> >  arch/loongarch/Kconfig                |   5 ++
> >  arch/loongarch/Makefile               |   3 +
> >  arch/loongarch/include/asm/acpi.h     |  10 +++
> >  arch/loongarch/include/asm/bootinfo.h |   1 +
> >  arch/loongarch/include/asm/loongson.h |   3 +
> >  arch/loongarch/include/asm/time.h     |   1 +
> >  arch/loongarch/kernel/acpi.c          |   6 ++
> >  arch/loongarch/kernel/smp.c           |   1 +
> >  arch/loongarch/kernel/time.c          |  11 ++-
> >  arch/loongarch/power/Makefile         |   3 +
> >  arch/loongarch/power/platform.c       |  45 +++++++++++
> >  arch/loongarch/power/suspend.c        |  73 +++++++++++++++++
> >  arch/loongarch/power/suspend_asm.S    | 112 ++++++++++++++++++++++++++
> >  13 files changed, 271 insertions(+), 3 deletions(-)
> >  create mode 100644 arch/loongarch/power/Makefile
> >  create mode 100644 arch/loongarch/power/platform.c
> >  create mode 100644 arch/loongarch/power/suspend.c
> >  create mode 100644 arch/loongarch/power/suspend_asm.S
> >
> > diff --git a/arch/loongarch/Kconfig b/arch/loongarch/Kconfig
> > index a8dc58e8162a..0df102401d1d 100644
> > --- a/arch/loongarch/Kconfig
> > +++ b/arch/loongarch/Kconfig
> > @@ -57,6 +57,7 @@ config LOONGARCH
> >       select ARCH_WANTS_NO_INSTR
> >       select BUILDTIME_TABLE_SORT
> >       select COMMON_CLK
> > +     select CPU_PM
> >       select EFI
> >       select GENERIC_CLOCKEVENTS
> >       select GENERIC_CMOS_UPDATE
> > @@ -517,6 +518,10 @@ config ARCH_MMAP_RND_BITS_MAX
> >
> >  menu "Power management options"
> >
> > +config ARCH_SUSPEND_POSSIBLE
> > +     def_bool y
> > +
> > +source "kernel/power/Kconfig"
> >  source "drivers/acpi/Kconfig"
> >
> >  endmenu
> > diff --git a/arch/loongarch/Makefile b/arch/loongarch/Makefile
> > index f4cb54d5afd6..a0fc1f9980e3 100644
> > --- a/arch/loongarch/Makefile
> > +++ b/arch/loongarch/Makefile
> > @@ -104,6 +104,9 @@ endif
> >  libs-y += arch/loongarch/lib/
> >  libs-$(CONFIG_EFI_STUB) += $(objtree)/drivers/firmware/efi/libstub/lib.a
> >
> > +# suspend and hibernation support
> > +drivers-$(CONFIG_PM) += arch/loongarch/power/
> > +
> >  ifeq ($(KBUILD_EXTMOD),)
> >  prepare: vdso_prepare
> >  vdso_prepare: prepare0
> > diff --git a/arch/loongarch/include/asm/acpi.h b/arch/loongarch/include/asm/acpi.h
> > index 825c2519b9d1..9664868b1260 100644
> > --- a/arch/loongarch/include/asm/acpi.h
> > +++ b/arch/loongarch/include/asm/acpi.h
> > @@ -35,4 +35,14 @@ extern struct list_head acpi_wakeup_device_list;
> >
> >  #define ACPI_TABLE_UPGRADE_MAX_PHYS ARCH_LOW_ADDRESS_LIMIT
> >
> > +extern int loongarch_acpi_suspend(void);
> > +extern int (*acpi_suspend_lowlevel)(void);
> > +extern void loongarch_suspend_enter(void);
> > +extern void loongarch_wakeup_start(void);
> > +
> > +static inline unsigned long acpi_get_wakeup_address(void)
> > +{
> > +     return (unsigned long)loongarch_wakeup_start;
> > +}
> > +
> >  #endif /* _ASM_LOONGARCH_ACPI_H */
> > diff --git a/arch/loongarch/include/asm/bootinfo.h b/arch/loongarch/include/asm/bootinfo.h
> > index ed0910e8b856..0051b526ac6d 100644
> > --- a/arch/loongarch/include/asm/bootinfo.h
> > +++ b/arch/loongarch/include/asm/bootinfo.h
> > @@ -32,6 +32,7 @@ struct loongson_system_configuration {
> >       int cores_per_node;
> >       int cores_per_package;
> >       unsigned long cores_io_master;
> > +     unsigned long suspend_addr;
> >       const char *cpuname;
> >  };
> >
> > diff --git a/arch/loongarch/include/asm/loongson.h b/arch/loongarch/include/asm/loongson.h
> > index 00db93edae1b..12494cffffd1 100644
> > --- a/arch/loongarch/include/asm/loongson.h
> > +++ b/arch/loongarch/include/asm/loongson.h
> > @@ -136,4 +136,7 @@ typedef enum {
> >  #define ls7a_writel(val, addr)       *(volatile unsigned int   *)TO_UNCACHE(addr) = (val)
> >  #define ls7a_writeq(val, addr)       *(volatile unsigned long  *)TO_UNCACHE(addr) = (val)
> >
> > +void enable_gpe_wakeup(void);
> > +void enable_pci_wakeup(void);
> > +
> >  #endif /* __ASM_LOONGSON_H */
> > diff --git a/arch/loongarch/include/asm/time.h b/arch/loongarch/include/asm/time.h
> > index 2eae219301d0..037a2d1b8ff4 100644
> > --- a/arch/loongarch/include/asm/time.h
> > +++ b/arch/loongarch/include/asm/time.h
> > @@ -12,6 +12,7 @@
> >  extern u64 cpu_clock_freq;
> >  extern u64 const_clock_freq;
> >
> > +extern void save_counter(void);
> >  extern void sync_counter(void);
> >
> >  static inline unsigned int calc_const_freq(void)
> > diff --git a/arch/loongarch/kernel/acpi.c b/arch/loongarch/kernel/acpi.c
> > index 335398482038..982672caf753 100644
> > --- a/arch/loongarch/kernel/acpi.c
> > +++ b/arch/loongarch/kernel/acpi.c
> > @@ -156,6 +156,12 @@ static void __init acpi_process_madt(void)
> >       loongson_sysconf.nr_cpus = num_processors;
> >  }
> >
> > +#ifdef CONFIG_ACPI_SLEEP
> > +int (*acpi_suspend_lowlevel)(void) = loongarch_acpi_suspend;
> > +#else
> > +int (*acpi_suspend_lowlevel)(void);
> > +#endif
> > +
> >  int __init acpi_boot_init(void)
> >  {
> >       /*
> > diff --git a/arch/loongarch/kernel/smp.c b/arch/loongarch/kernel/smp.c
> > index 781a4d4bdddc..6e192a25e134 100644
> > --- a/arch/loongarch/kernel/smp.c
> > +++ b/arch/loongarch/kernel/smp.c
> > @@ -16,6 +16,7 @@
> >  #include <linux/smp.h>
> >  #include <linux/threads.h>
> >  #include <linux/export.h>
> > +#include <linux/syscore_ops.h>
> >  #include <linux/time.h>
> >  #include <linux/tracepoint.h>
> >  #include <linux/sched/hotplug.h>
> > diff --git a/arch/loongarch/kernel/time.c b/arch/loongarch/kernel/time.c
> > index 786735dcc8d6..a6576dea590c 100644
> > --- a/arch/loongarch/kernel/time.c
> > +++ b/arch/loongarch/kernel/time.c
> > @@ -115,12 +115,17 @@ static unsigned long __init get_loops_per_jiffy(void)
> >       return lpj;
> >  }
> >
> > -static long init_timeval;
> > +static long init_offset __nosavedata;
> > +
> > +void save_counter(void)
> > +{
> > +     init_offset = drdtime();
> > +}
> >
> >  void sync_counter(void)
> >  {
> >       /* Ensure counter begin at 0 */
> > -     csr_write64(-init_timeval, LOONGARCH_CSR_CNTC);
> > +     csr_write64(init_offset, LOONGARCH_CSR_CNTC);
> >  }
> >
> >  static int get_timer_irq(void)
> > @@ -219,7 +224,7 @@ void __init time_init(void)
> >       else
> >               const_clock_freq = calc_const_freq();
> >
> > -     init_timeval = drdtime() - csr_read64(LOONGARCH_CSR_CNTC);
> > +     init_offset = -(drdtime() - csr_read64(LOONGARCH_CSR_CNTC));
> >
> >       constant_clockevent_init();
> >       constant_clocksource_init();
> > diff --git a/arch/loongarch/power/Makefile b/arch/loongarch/power/Makefile
> > new file mode 100644
> > index 000000000000..6740117decaa
> > --- /dev/null
> > +++ b/arch/loongarch/power/Makefile
> > @@ -0,0 +1,3 @@
> > +obj-y        += platform.o
> > +
> > +obj-$(CONFIG_SUSPEND)                += suspend.o suspend_asm.o
> > diff --git a/arch/loongarch/power/platform.c b/arch/loongarch/power/platform.c
> > new file mode 100644
> > index 000000000000..675e8792afaf
> > --- /dev/null
> > +++ b/arch/loongarch/power/platform.c
> > @@ -0,0 +1,45 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * Author: Huacai Chen <chenhuacai@loongson.cn>
> > + * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
> > + */
> > +#include <linux/acpi.h>
> > +#include <linux/platform_device.h>
> > +
> > +#include <asm/bootinfo.h>
> > +#include <asm/setup.h>
> > +
> > +void enable_gpe_wakeup(void)
> > +{
> > +     acpi_enable_all_wakeup_gpes();
> > +}
> > +
> > +void enable_pci_wakeup(void)
> > +{
> > +     acpi_write_bit_register(ACPI_BITREG_PCIEXP_WAKE_STATUS, 1);
> > +
> > +     if (acpi_gbl_FADT.flags & ACPI_FADT_PCI_EXPRESS_WAKE)
> > +             acpi_write_bit_register(ACPI_BITREG_PCIEXP_WAKE_DISABLE, 0);
> > +}
> > +
> > +static int __init loongson3_acpi_suspend_init(void)
> > +{
> > +#ifdef CONFIG_ACPI
> > +     acpi_status status;
> > +     uint64_t suspend_addr = 0;
> > +
> > +     if (acpi_disabled || acpi_gbl_reduced_hardware)
> > +             return 0;
> > +
> > +     acpi_write_bit_register(ACPI_BITREG_SCI_ENABLE, 1);
> > +     status = acpi_evaluate_integer(NULL, "\\SADR", NULL, &suspend_addr);
> > +     if (ACPI_FAILURE(status) || !suspend_addr) {
> > +             pr_err("ACPI S3 is not support!\n");
> > +             return -1;
> > +     }
> > +     loongson_sysconf.suspend_addr = (u64)phys_to_virt(PHYSADDR(suspend_addr));
> > +#endif
> > +     return 0;
> > +}
> > +
> > +device_initcall(loongson3_acpi_suspend_init);
> > diff --git a/arch/loongarch/power/suspend.c b/arch/loongarch/power/suspend.c
> > new file mode 100644
> > index 000000000000..b9fa0f9a9277
> > --- /dev/null
> > +++ b/arch/loongarch/power/suspend.c
> > @@ -0,0 +1,73 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * loongson-specific suspend support
> > + *
> > + * Author: Huacai Chen <chenhuacai@loongson.cn>
> > + * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
> > + */
> > +#include <linux/acpi.h>
> > +#include <linux/pm.h>
> > +#include <linux/suspend.h>
> > +
> > +#include <asm/loongarch.h>
> > +#include <asm/loongson.h>
> > +#include <asm/setup.h>
> > +#include <asm/time.h>
> > +#include <asm/tlbflush.h>
> > +
> > +u64 loongarch_suspend_addr;
> > +
> > +struct saved_registers {
> > +     u32 ecfg;
> > +     u32 euen;
> > +     u64 pgd;
> > +     u64 kpgd;
> > +     u32 pwctl0;
> > +     u32 pwctl1;
> > +};
> > +static struct saved_registers saved_regs;
> > +
> > +static void arch_common_suspend(void)
> > +{
> > +     save_counter();
> > +     saved_regs.pgd = csr_read64(LOONGARCH_CSR_PGDL);
> > +     saved_regs.kpgd = csr_read64(LOONGARCH_CSR_PGDH);
> > +     saved_regs.pwctl0 = csr_read32(LOONGARCH_CSR_PWCTL0);
> > +     saved_regs.pwctl1 = csr_read32(LOONGARCH_CSR_PWCTL1);
> > +     saved_regs.ecfg = csr_read32(LOONGARCH_CSR_ECFG);
> > +     saved_regs.euen = csr_read32(LOONGARCH_CSR_EUEN);
> > +
> > +     loongarch_suspend_addr = loongson_sysconf.suspend_addr;
> > +}
> > +
> > +static void arch_common_resume(void)
> > +{
> > +     sync_counter();
> > +     local_flush_tlb_all();
> > +     csr_write64(per_cpu_offset(0), PERCPU_BASE_KS);
> > +     csr_write64(eentry, LOONGARCH_CSR_EENTRY);
> > +     csr_write64(eentry, LOONGARCH_CSR_MERRENTRY);
> > +     csr_write64(tlbrentry, LOONGARCH_CSR_TLBRENTRY);
> > +
> > +     csr_write64(saved_regs.pgd, LOONGARCH_CSR_PGDL);
> > +     csr_write64(saved_regs.kpgd, LOONGARCH_CSR_PGDH);
> > +     csr_write32(saved_regs.pwctl0, LOONGARCH_CSR_PWCTL0);
> > +     csr_write32(saved_regs.pwctl1, LOONGARCH_CSR_PWCTL1);
> > +     csr_write32(saved_regs.ecfg, LOONGARCH_CSR_ECFG);
> > +     csr_write32(saved_regs.euen, LOONGARCH_CSR_EUEN);
> > +}
> > +
> > +int loongarch_acpi_suspend(void)
> > +{
> > +     enable_gpe_wakeup();
> > +     enable_pci_wakeup();
> > +
> > +     arch_common_suspend();
> > +
> > +     /* processor specific suspend */
> > +     loongarch_suspend_enter();
> > +
> > +     arch_common_resume();
> > +
> > +     return 0;
> > +}
> > diff --git a/arch/loongarch/power/suspend_asm.S b/arch/loongarch/power/suspend_asm.S
> > new file mode 100644
> > index 000000000000..ff52c3aa09d9
> > --- /dev/null
> > +++ b/arch/loongarch/power/suspend_asm.S
> > @@ -0,0 +1,108 @@
> > +/* SPDX-License-Identifier: GPL-2.0 */
> > +/*
> > + * Sleep helper for Loongson-3 sleep mode.
> > + *
> > + * Author: Huacai Chen <chenhuacai@loongson.cn>
> > + * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
> > + */
> > +
> > +#include <asm/asm.h>
> > +#include <asm/asmmacro.h>
> > +#include <asm/addrspace.h>
> > +#include <asm/loongarch.h>
> > +#include <asm/stackframe.h>
> > +
> > +     .text
> > +     .align  5
> > +
> > +/* preparatory stuff */
> > +.macro       SETUP_SLEEP
> > +     addi.d          sp, sp, -PT_SIZE
> > +     st.d            $r1, sp, PT_R1
> > +     st.d            $r2, sp, PT_R2
> > +     st.d            $r3, sp, PT_R3
> > +     st.d            $r4, sp, PT_R4
> > +     st.d            $r5, sp, PT_R5
> > +     st.d            $r6, sp, PT_R6
> > +     st.d            $r7, sp, PT_R7
> > +     st.d            $r8, sp, PT_R8
> > +     st.d            $r9, sp, PT_R9
> > +     st.d            $r10, sp, PT_R10
> > +     st.d            $r11, sp, PT_R11
> > +     st.d            $r20, sp, PT_R20
> > +     st.d            $r21, sp, PT_R21
> > +     st.d            $r22, sp, PT_R22
> > +     st.d            $r23, sp, PT_R23
> > +     st.d            $r24, sp, PT_R24
> > +     st.d            $r25, sp, PT_R25
> > +     st.d            $r26, sp, PT_R26
> > +     st.d            $r27, sp, PT_R27
> > +     st.d            $r28, sp, PT_R28
> > +     st.d            $r29, sp, PT_R29
> > +     st.d            $r30, sp, PT_R30
> > +     st.d            $r31, sp, PT_R31
> > +
> > +     la.pcrel        t0, acpi_saved_sp
> > +     st.d            sp, t0, 0
> > +.endm
> > +
> > +/* Sleep code for Loongson-3 */
> > +SYM_CODE_START(loongarch_suspend_enter)
> > +     SETUP_SLEEP
> > +     bl              __flush_cache_all
> > +
> > +     /* Pass RA and SP to BIOS */
> > +     addi.d          a1, sp, 0
> > +     la.pcrel        a0, loongarch_wakeup_start
> > +     la.pcrel        t0, loongarch_suspend_addr
> > +     ld.d            t0, t0, 0 /* Call BIOS's STR sleep routine */
> > +     jr              t0
> > +     nop
> > +SYM_CODE_END(loongarch_suspend_enter)
> > +
> > +.macro SETUP_WAKEUP
> > +     ld.d            $r1, sp, PT_R1
> > +     ld.d            $r2, sp, PT_R2
> > +     ld.d            $r3, sp, PT_R3
> > +     ld.d            $r4, sp, PT_R4
> > +     ld.d            $r5, sp, PT_R5
> > +     ld.d            $r6, sp, PT_R6
> > +     ld.d            $r7, sp, PT_R7
> > +     ld.d            $r8, sp, PT_R8
> > +     ld.d            $r9, sp, PT_R9
> > +     ld.d            $r10, sp, PT_R10
> > +     ld.d            $r11, sp, PT_R11
> > +     ld.d            $r20, sp, PT_R20
> > +     ld.d            $r21, sp, PT_R21
> > +     ld.d            $r22, sp, PT_R22
> > +     ld.d            $r23, sp, PT_R23
> > +     ld.d            $r24, sp, PT_R24
> > +     ld.d            $r25, sp, PT_R25
> > +     ld.d            $r26, sp, PT_R26
> > +     ld.d            $r27, sp, PT_R27
> > +     ld.d            $r28, sp, PT_R28
> > +     ld.d            $r29, sp, PT_R29
> > +     ld.d            $r30, sp, PT_R30
> > +     ld.d            $r31, sp, PT_R31
> > +.endm
> > +
> > +     /* This is where we return upon wakeup.
> > +      * Reload all of the registers and return.
> > +      */
> > +     .align 12
> > +
> > +SYM_CODE_START(loongarch_wakeup_start)
> > +     li.d            t0, CSR_DMW0_INIT       # UC, PLV0
> > +     csrwr           t0, LOONGARCH_CSR_DMWIN0
> > +     li.d            t0, CSR_DMW1_INIT       # CA, PLV0
> > +     csrwr           t0, LOONGARCH_CSR_DMWIN1
> > +
> > +     la.abs          t0, 0f
> > +     jr              t0
>
> We should try to avoid using la.abs in order to make it easier to
> implement KASLR feature in the future.
> If the purpose here is just to get the link address of the current
> location, we would like to use the following method (and remove the
> "0:" label):
>
> li.d    t0, CACHE_BASE
> pcaddi  t0, 0
> or      t0, t0, t1
> jirl    zero, t0, 0xc
But this cannot work for the TLB-mapped kernel. :(

Huacai

>
> Thanks,
> Youling
>
> > +0:
> > +     la.pcrel        t0, acpi_saved_sp
> > +     ld.d            sp, t0, 0
> > +     SETUP_WAKEUP
> > +     addi.d          sp, sp, PT_SIZE
> > +     jr              ra
> > +SYM_CODE_END(loongarch_wakeup_start)
> >
>

Re: [PATCH 2/2] LoongArch: Add hibernation (ACPI S4) support

[Huacai Chen]

Hi, Jinyang,

On Fri, Oct 28, 2022 at 3:26 PM Jinyang He <hejinyang@loongson.cn> wrote:
>
> Hi, Huacai,
>
>
> On 2022/10/28 上午10:38, Huacai Chen wrote:
> > Add hibernation (Suspend to Disk, aka ACPI S4) support for LoongArch.
> >
> > Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
> > ---
> >   arch/loongarch/Kconfig               |  3 ++
> >   arch/loongarch/kernel/asm-offsets.c  | 12 +++++
> >   arch/loongarch/kernel/reset.c        |  2 +
> >   arch/loongarch/kernel/setup.c        |  5 ++
> >   arch/loongarch/power/Makefile        |  1 +
> >   arch/loongarch/power/hibernate.c     | 58 ++++++++++++++++++++++++
> >   arch/loongarch/power/hibernate_asm.S | 68 ++++++++++++++++++++++++++++
> >   7 files changed, 149 insertions(+)
> >   create mode 100644 arch/loongarch/power/hibernate.c
> >   create mode 100644 arch/loongarch/power/hibernate_asm.S
> >
> > diff --git a/arch/loongarch/Kconfig b/arch/loongarch/Kconfig
> > index 0df102401d1d..1943f840e494 100644
> > --- a/arch/loongarch/Kconfig
> > +++ b/arch/loongarch/Kconfig
> > @@ -521,6 +521,9 @@ menu "Power management options"
> >   config ARCH_SUSPEND_POSSIBLE
> >       def_bool y
> >
> > +config ARCH_HIBERNATION_POSSIBLE
> > +     def_bool y
> > +
> >   source "kernel/power/Kconfig"
> >   source "drivers/acpi/Kconfig"
> >
> > diff --git a/arch/loongarch/kernel/asm-offsets.c b/arch/loongarch/kernel/asm-offsets.c
> > index bdd88eda9513..4ef494577813 100644
> > --- a/arch/loongarch/kernel/asm-offsets.c
> > +++ b/arch/loongarch/kernel/asm-offsets.c
> > @@ -257,3 +257,15 @@ void output_smpboot_defines(void)
> >       BLANK();
> >   }
> >   #endif
> > +
> > +#ifdef CONFIG_HIBERNATION
> > +void output_pbe_defines(void)
> > +{
> > +     COMMENT(" Linux struct pbe offsets. ");
> > +     OFFSET(PBE_ADDRESS, pbe, address);
> > +     OFFSET(PBE_ORIG_ADDRESS, pbe, orig_address);
> > +     OFFSET(PBE_NEXT, pbe, next);
> > +     DEFINE(PBE_SIZE, sizeof(struct pbe));
> > +     BLANK();
> > +}
> > +#endif
> > diff --git a/arch/loongarch/kernel/reset.c b/arch/loongarch/kernel/reset.c
> > index 8c82021eb2f4..cdf021ff6214 100644
> > --- a/arch/loongarch/kernel/reset.c
> > +++ b/arch/loongarch/kernel/reset.c
> > @@ -15,6 +15,7 @@
> >   #include <acpi/reboot.h>
> >   #include <asm/idle.h>
> >   #include <asm/loongarch.h>
> > +#include <asm/loongson.h>
> >
> >   void (*pm_power_off)(void);
> >   EXPORT_SYMBOL(pm_power_off);
> > @@ -42,6 +43,7 @@ void machine_power_off(void)
> >       preempt_disable();
> >       smp_send_stop();
> >   #endif
> > +     enable_pci_wakeup();
> >       do_kernel_power_off();
> >   #ifdef CONFIG_EFI
> >       efi.reset_system(EFI_RESET_SHUTDOWN, EFI_SUCCESS, 0, NULL);
> > diff --git a/arch/loongarch/kernel/setup.c b/arch/loongarch/kernel/setup.c
> > index 96b6cb5db004..3c8bc250f4e2 100644
> > --- a/arch/loongarch/kernel/setup.c
> > +++ b/arch/loongarch/kernel/setup.c
> > @@ -28,6 +28,7 @@
> >   #include <linux/sizes.h>
> >   #include <linux/device.h>
> >   #include <linux/dma-map-ops.h>
> > +#include <linux/suspend.h>
> >   #include <linux/swiotlb.h>
> >
> >   #include <asm/addrspace.h>
> > @@ -312,6 +313,10 @@ static void __init arch_mem_init(char **cmdline_p)
> >
> >       dma_contiguous_reserve(PFN_PHYS(max_low_pfn));
> >
> > +     /* Reserve for hibernation. */
> > +     register_nosave_region(PFN_DOWN(__pa_symbol(&__nosave_begin)),
> > +                                PFN_UP(__pa_symbol(&__nosave_end)));
> > +
> >       memblock_dump_all();
> >
> >       early_memtest(PFN_PHYS(ARCH_PFN_OFFSET), PFN_PHYS(max_low_pfn));
> > diff --git a/arch/loongarch/power/Makefile b/arch/loongarch/power/Makefile
> > index 6740117decaa..58151d003e40 100644
> > --- a/arch/loongarch/power/Makefile
> > +++ b/arch/loongarch/power/Makefile
> > @@ -1,3 +1,4 @@
> >   obj-y       += platform.o
> >
> >   obj-$(CONFIG_SUSPEND)               += suspend.o suspend_asm.o
> > +obj-$(CONFIG_HIBERNATION)    += hibernate.o hibernate_asm.o
> > diff --git a/arch/loongarch/power/hibernate.c b/arch/loongarch/power/hibernate.c
> > new file mode 100644
> > index 000000000000..32dae9ef311a
> > --- /dev/null
> > +++ b/arch/loongarch/power/hibernate.c
> > @@ -0,0 +1,58 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +#include <asm/fpu.h>
> > +#include <asm/loongson.h>
> > +#include <asm/sections.h>
> > +#include <asm/tlbflush.h>
> > +
> > +static u64 saved_crmd;
> > +static u64 saved_prmd;
> > +static u64 saved_euen;
> > +static u64 saved_ecfg;
> > +struct pt_regs saved_regs;
> > +
> > +void save_processor_state(void)
> > +{
> > +     saved_crmd = csr_read32(LOONGARCH_CSR_CRMD);
> > +     saved_prmd = csr_read32(LOONGARCH_CSR_PRMD);
> > +     saved_euen = csr_read32(LOONGARCH_CSR_EUEN);
> > +     saved_ecfg = csr_read32(LOONGARCH_CSR_ECFG);
> > +
> > +     if (is_fpu_owner())
> > +             save_fp(current);
> > +}
> > +
> > +void restore_processor_state(void)
> > +{
> > +     csr_write32(saved_crmd, LOONGARCH_CSR_CRMD);
> > +     csr_write32(saved_prmd, LOONGARCH_CSR_PRMD);
> > +     csr_write32(saved_euen, LOONGARCH_CSR_EUEN);
> > +     csr_write32(saved_ecfg, LOONGARCH_CSR_ECFG);
> > +
> > +     if (is_fpu_owner())
> > +             restore_fp(current);
> > +}
> > +
> > +int pfn_is_nosave(unsigned long pfn)
> > +{
> I'm surprised that every arch has its own version of pfn_is_nosave().
>
> We can improve it. But it's beyond these patches, just ignore here.
>
>
> > +     unsigned long nosave_begin_pfn = PFN_DOWN(__pa(&__nosave_begin));
> > +     unsigned long nosave_end_pfn = PFN_UP(__pa(&__nosave_end));
> > +
> > +     return  (pfn >= nosave_begin_pfn) && (pfn < nosave_end_pfn);
> > +}
> > +
> > +extern int swsusp_asm_suspend(void);
> > +
> > +int swsusp_arch_suspend(void)
> > +{
> > +     enable_pci_wakeup();
> > +     return swsusp_asm_suspend();
> > +}
> > +
> > +extern int swsusp_asm_resume(void);
> > +
> > +int swsusp_arch_resume(void)
> > +{
> > +     /* Avoid TLB mismatch during and after kernel resume */
> > +     local_flush_tlb_all();
> > +     return swsusp_asm_resume();
> > +}
> > diff --git a/arch/loongarch/power/hibernate_asm.S b/arch/loongarch/power/hibernate_asm.S
> > new file mode 100644
> > index 000000000000..7894fbd56c85
> > --- /dev/null
> > +++ b/arch/loongarch/power/hibernate_asm.S
> > @@ -0,0 +1,64 @@
> > +/* SPDX-License-Identifier: GPL-2.0 */
> > +/*
> > + * Hibernation support specific for LoongArch
> > + *
> > + * Author: Huacai Chen <chenhuacai@loongson.cn>
> > + * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
> > + */
> > +#include <linux/linkage.h>
> > +#include <asm/asm.h>
> > +#include <asm/asm-offsets.h>
> > +#include <asm/regdef.h>
> > +
> > +.text
> > +SYM_FUNC_START(swsusp_asm_suspend)
> > +     la.pcrel        t0, saved_regs
> > +     PTR_S           ra, t0, PT_R1
> > +     PTR_S           sp, t0, PT_R3
> > +     PTR_S           fp, t0, PT_R22
> > +     PTR_S           tp, t0, PT_R2
> > +     PTR_S           s0, t0, PT_R23
> > +     PTR_S           s1, t0, PT_R24
> > +     PTR_S           s2, t0, PT_R25
> > +     PTR_S           s3, t0, PT_R26
> > +     PTR_S           s4, t0, PT_R27
> > +     PTR_S           s5, t0, PT_R28
> > +     PTR_S           s6, t0, PT_R29
> > +     PTR_S           s7, t0, PT_R30
> > +     PTR_S           s8, t0, PT_R31
> > +     b               swsusp_save
>
> Is needed save and restore PERCPU_BASE_KS, u0 or other KSave registers?
Saving/restoring PERCPU_BASE_KS and u0 seems needed, but I don't know
why it works well without them. :)

Huacai
>
>
> Thanks,
>
> Jinyang
>
>
> > +SYM_FUNC_END(swsusp_asm_suspend)
> > +
> > +SYM_FUNC_START(swsusp_asm_resume)
> > +     la.pcrel        t0, restore_pblist
> > +     PTR_L           t0, t0, 0
> > +0:
> > +     PTR_L           t1, t0, PBE_ADDRESS  /* source */
> > +     PTR_L           t2, t0, PBE_ORIG_ADDRESS /* destination */
> > +     PTR_LI          t3, _PAGE_SIZE
> > +     PTR_ADD         t3, t3, t1
> > +1:
> > +     REG_L           t8, t1, 0
> > +     REG_S           t8, t2, 0
> > +     PTR_ADDI        t1, t1, SZREG
> > +     PTR_ADDI        t2, t2, SZREG
> > +     bne             t1, t3, 1b
> > +     PTR_L           t0, t0, PBE_NEXT
> > +     bnez            t0, 0b
> > +     la.pcrel        t0, saved_regs
> > +     PTR_L           ra, t0, PT_R1
> > +     PTR_L           sp, t0, PT_R3
> > +     PTR_L           fp, t0, PT_R22
> > +     PTR_L           tp, t0, PT_R2
> > +     PTR_L           s0, t0, PT_R23
> > +     PTR_L           s1, t0, PT_R24
> > +     PTR_L           s2, t0, PT_R25
> > +     PTR_L           s3, t0, PT_R26
> > +     PTR_L           s4, t0, PT_R27
> > +     PTR_L           s5, t0, PT_R28
> > +     PTR_L           s6, t0, PT_R29
> > +     PTR_L           s7, t0, PT_R30
> > +     PTR_L           s8, t0, PT_R31
> > +     PTR_LI          a0, 0x0
> > +     jirl            zero, ra, 0
> > +SYM_FUNC_END(swsusp_asm_resume)
>

Re: [PATCH 1/2] LoongArch: Add suspend (ACPI S3) support

[Jinyang He]

Hi, Huacai,


On 2022/10/28 下午5:00, Huacai Chen wrote:

>   Hi, Jinyang,
>
> On Fri, Oct 28, 2022 at 3:23 PM Jinyang He <hejinyang@loongson.cn> wrote:
>> On 2022/10/28 上午10:38, Huacai Chen wrote:
>>
>>> Add suspend (Suspend To RAM, aka ACPI S3) support for LoongArch.
>>>
>>> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
>>> ---
>>>    arch/loongarch/Kconfig                |   5 ++
>>>    arch/loongarch/Makefile               |   3 +
>>>    arch/loongarch/include/asm/acpi.h     |  10 +++
>>>    arch/loongarch/include/asm/bootinfo.h |   1 +
>>>    arch/loongarch/include/asm/loongson.h |   3 +
>>>    arch/loongarch/include/asm/time.h     |   1 +
>>>    arch/loongarch/kernel/acpi.c          |   6 ++
>>>    arch/loongarch/kernel/smp.c           |   1 +
>>>    arch/loongarch/kernel/time.c          |  11 ++-
>>>    arch/loongarch/power/Makefile         |   3 +
>>>    arch/loongarch/power/platform.c       |  45 +++++++++++
>>>    arch/loongarch/power/suspend.c        |  73 +++++++++++++++++
>>>    arch/loongarch/power/suspend_asm.S    | 112 ++++++++++++++++++++++++++
>>>    13 files changed, 271 insertions(+), 3 deletions(-)
>>>    create mode 100644 arch/loongarch/power/Makefile
>>>    create mode 100644 arch/loongarch/power/platform.c
>>>    create mode 100644 arch/loongarch/power/suspend.c
>>>    create mode 100644 arch/loongarch/power/suspend_asm.S
>>>
>>> diff --git a/arch/loongarch/Kconfig b/arch/loongarch/Kconfig
>>> index a8dc58e8162a..0df102401d1d 100644
>>> --- a/arch/loongarch/Kconfig
>>> +++ b/arch/loongarch/Kconfig
>>> @@ -57,6 +57,7 @@ config LOONGARCH
>>>        select ARCH_WANTS_NO_INSTR
>>>        select BUILDTIME_TABLE_SORT
>>>        select COMMON_CLK
>>> +     select CPU_PM
>>>        select EFI
>>>        select GENERIC_CLOCKEVENTS
>>>        select GENERIC_CMOS_UPDATE
>>> @@ -517,6 +518,10 @@ config ARCH_MMAP_RND_BITS_MAX
>>>
>>>    menu "Power management options"
>>>
>>> +config ARCH_SUSPEND_POSSIBLE
>>> +     def_bool y
>>> +
>>> +source "kernel/power/Kconfig"
>>>    source "drivers/acpi/Kconfig"
>>>
>>>    endmenu
>>> diff --git a/arch/loongarch/Makefile b/arch/loongarch/Makefile
>>> index f4cb54d5afd6..a0fc1f9980e3 100644
>>> --- a/arch/loongarch/Makefile
>>> +++ b/arch/loongarch/Makefile
>>> @@ -104,6 +104,9 @@ endif
>>>    libs-y += arch/loongarch/lib/
>>>    libs-$(CONFIG_EFI_STUB) += $(objtree)/drivers/firmware/efi/libstub/lib.a
>>>
>>> +# suspend and hibernation support
>>> +drivers-$(CONFIG_PM) += arch/loongarch/power/
>>> +
>>>    ifeq ($(KBUILD_EXTMOD),)
>>>    prepare: vdso_prepare
>>>    vdso_prepare: prepare0
>>> diff --git a/arch/loongarch/include/asm/acpi.h b/arch/loongarch/include/asm/acpi.h
>>> index 825c2519b9d1..9664868b1260 100644
>>> --- a/arch/loongarch/include/asm/acpi.h
>>> +++ b/arch/loongarch/include/asm/acpi.h
>>> @@ -35,4 +35,14 @@ extern struct list_head acpi_wakeup_device_list;
>>>
>>>    #define ACPI_TABLE_UPGRADE_MAX_PHYS ARCH_LOW_ADDRESS_LIMIT
>>>
>>> +extern int loongarch_acpi_suspend(void);
>>> +extern int (*acpi_suspend_lowlevel)(void);
>>> +extern void loongarch_suspend_enter(void);
>>> +extern void loongarch_wakeup_start(void);
>>> +
>>> +static inline unsigned long acpi_get_wakeup_address(void)
>>> +{
>>> +     return (unsigned long)loongarch_wakeup_start;
>>> +}
>>> +
>>>    #endif /* _ASM_LOONGARCH_ACPI_H */
>>> diff --git a/arch/loongarch/include/asm/bootinfo.h b/arch/loongarch/include/asm/bootinfo.h
>>> index ed0910e8b856..0051b526ac6d 100644
>>> --- a/arch/loongarch/include/asm/bootinfo.h
>>> +++ b/arch/loongarch/include/asm/bootinfo.h
>>> @@ -32,6 +32,7 @@ struct loongson_system_configuration {
>>>        int cores_per_node;
>>>        int cores_per_package;
>>>        unsigned long cores_io_master;
>>> +     unsigned long suspend_addr;
>>>        const char *cpuname;
>>>    };
>>>
>>> diff --git a/arch/loongarch/include/asm/loongson.h b/arch/loongarch/include/asm/loongson.h
>>> index 00db93edae1b..12494cffffd1 100644
>>> --- a/arch/loongarch/include/asm/loongson.h
>>> +++ b/arch/loongarch/include/asm/loongson.h
>>> @@ -136,4 +136,7 @@ typedef enum {
>>>    #define ls7a_writel(val, addr)      *(volatile unsigned int   *)TO_UNCACHE(addr) = (val)
>>>    #define ls7a_writeq(val, addr)      *(volatile unsigned long  *)TO_UNCACHE(addr) = (val)
>>>
>>> +void enable_gpe_wakeup(void);
>>> +void enable_pci_wakeup(void);
>>> +
>>>    #endif /* __ASM_LOONGSON_H */
>>> diff --git a/arch/loongarch/include/asm/time.h b/arch/loongarch/include/asm/time.h
>>> index 2eae219301d0..037a2d1b8ff4 100644
>>> --- a/arch/loongarch/include/asm/time.h
>>> +++ b/arch/loongarch/include/asm/time.h
>>> @@ -12,6 +12,7 @@
>>>    extern u64 cpu_clock_freq;
>>>    extern u64 const_clock_freq;
>>>
>>> +extern void save_counter(void);
>>>    extern void sync_counter(void);
>>>
>>>    static inline unsigned int calc_const_freq(void)
>>> diff --git a/arch/loongarch/kernel/acpi.c b/arch/loongarch/kernel/acpi.c
>>> index 335398482038..982672caf753 100644
>>> --- a/arch/loongarch/kernel/acpi.c
>>> +++ b/arch/loongarch/kernel/acpi.c
>>> @@ -156,6 +156,12 @@ static void __init acpi_process_madt(void)
>>>        loongson_sysconf.nr_cpus = num_processors;
>>>    }
>>>
>>> +#ifdef CONFIG_ACPI_SLEEP
>>> +int (*acpi_suspend_lowlevel)(void) = loongarch_acpi_suspend;
>>> +#else
>>> +int (*acpi_suspend_lowlevel)(void);
>>> +#endif
>>> +
>>>    int __init acpi_boot_init(void)
>>>    {
>>>        /*
>>> diff --git a/arch/loongarch/kernel/smp.c b/arch/loongarch/kernel/smp.c
>>> index 781a4d4bdddc..6e192a25e134 100644
>>> --- a/arch/loongarch/kernel/smp.c
>>> +++ b/arch/loongarch/kernel/smp.c
>>> @@ -16,6 +16,7 @@
>>>    #include <linux/smp.h>
>>>    #include <linux/threads.h>
>>>    #include <linux/export.h>
>>> +#include <linux/syscore_ops.h>
>>>    #include <linux/time.h>
>>>    #include <linux/tracepoint.h>
>>>    #include <linux/sched/hotplug.h>
>>> diff --git a/arch/loongarch/kernel/time.c b/arch/loongarch/kernel/time.c
>>> index 786735dcc8d6..a6576dea590c 100644
>>> --- a/arch/loongarch/kernel/time.c
>>> +++ b/arch/loongarch/kernel/time.c
>>> @@ -115,12 +115,17 @@ static unsigned long __init get_loops_per_jiffy(void)
>>>        return lpj;
>>>    }
>>>
>>> -static long init_timeval;
>>> +static long init_offset __nosavedata;
>>> +
>>> +void save_counter(void)
>>> +{
>>> +     init_offset = drdtime();
>>> +}
>>>
>>>    void sync_counter(void)
>>>    {
>>>        /* Ensure counter begin at 0 */
>>> -     csr_write64(-init_timeval, LOONGARCH_CSR_CNTC);
>>> +     csr_write64(init_offset, LOONGARCH_CSR_CNTC);
>>>    }
>>>
>>>    static int get_timer_irq(void)
>>> @@ -219,7 +224,7 @@ void __init time_init(void)
>>>        else
>>>                const_clock_freq = calc_const_freq();
>>>
>>> -     init_timeval = drdtime() - csr_read64(LOONGARCH_CSR_CNTC);
>>> +     init_offset = -(drdtime() - csr_read64(LOONGARCH_CSR_CNTC));
>>>
>>>        constant_clockevent_init();
>>>        constant_clocksource_init();
>>> diff --git a/arch/loongarch/power/Makefile b/arch/loongarch/power/Makefile
>>> new file mode 100644
>>> index 000000000000..6740117decaa
>>> --- /dev/null
>>> +++ b/arch/loongarch/power/Makefile
>>> @@ -0,0 +1,3 @@
>>> +obj-y        += platform.o
>>> +
>>> +obj-$(CONFIG_SUSPEND)                += suspend.o suspend_asm.o
>>> diff --git a/arch/loongarch/power/platform.c b/arch/loongarch/power/platform.c
>>> new file mode 100644
>>> index 000000000000..675e8792afaf
>>> --- /dev/null
>>> +++ b/arch/loongarch/power/platform.c
>>> @@ -0,0 +1,45 @@
>>> +// SPDX-License-Identifier: GPL-2.0
>>> +/*
>>> + * Author: Huacai Chen <chenhuacai@loongson.cn>
>>> + * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
>>> + */
>>> +#include <linux/acpi.h>
>>> +#include <linux/platform_device.h>
>>> +
>>> +#include <asm/bootinfo.h>
>>> +#include <asm/setup.h>
>>> +
>>> +void enable_gpe_wakeup(void)
>>> +{
>>> +     acpi_enable_all_wakeup_gpes();
>>> +}
>>> +
>>> +void enable_pci_wakeup(void)
>>> +{
>>> +     acpi_write_bit_register(ACPI_BITREG_PCIEXP_WAKE_STATUS, 1);
>>> +
>>> +     if (acpi_gbl_FADT.flags & ACPI_FADT_PCI_EXPRESS_WAKE)
>>> +             acpi_write_bit_register(ACPI_BITREG_PCIEXP_WAKE_DISABLE, 0);
>>> +}
>>> +
>>> +static int __init loongson3_acpi_suspend_init(void)
>>> +{
>>> +#ifdef CONFIG_ACPI
>>> +     acpi_status status;
>>> +     uint64_t suspend_addr = 0;
>>> +
>>> +     if (acpi_disabled || acpi_gbl_reduced_hardware)
>>> +             return 0;
>>> +
>>> +     acpi_write_bit_register(ACPI_BITREG_SCI_ENABLE, 1);
>>> +     status = acpi_evaluate_integer(NULL, "\\SADR", NULL, &suspend_addr);
>>> +     if (ACPI_FAILURE(status) || !suspend_addr) {
>>> +             pr_err("ACPI S3 is not support!\n");
>>> +             return -1;
>>> +     }
>>> +     loongson_sysconf.suspend_addr = (u64)phys_to_virt(PHYSADDR(suspend_addr));
>>> +#endif
>>> +     return 0;
>>> +}
>>> +
>>> +device_initcall(loongson3_acpi_suspend_init);
>>> diff --git a/arch/loongarch/power/suspend.c b/arch/loongarch/power/suspend.c
>>> new file mode 100644
>>> index 000000000000..b9fa0f9a9277
>>> --- /dev/null
>>> +++ b/arch/loongarch/power/suspend.c
>>> @@ -0,0 +1,73 @@
>>> +// SPDX-License-Identifier: GPL-2.0
>>> +/*
>>> + * loongson-specific suspend support
>>> + *
>>> + * Author: Huacai Chen <chenhuacai@loongson.cn>
>>> + * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
>>> + */
>>> +#include <linux/acpi.h>
>>> +#include <linux/pm.h>
>>> +#include <linux/suspend.h>
>>> +
>>> +#include <asm/loongarch.h>
>>> +#include <asm/loongson.h>
>>> +#include <asm/setup.h>
>>> +#include <asm/time.h>
>>> +#include <asm/tlbflush.h>
>>> +
>>> +u64 loongarch_suspend_addr;
>>> +
>>> +struct saved_registers {
>>> +     u32 ecfg;
>>> +     u32 euen;
>>> +     u64 pgd;
>>> +     u64 kpgd;
>>> +     u32 pwctl0;
>>> +     u32 pwctl1;
>>> +};
>>> +static struct saved_registers saved_regs;
>>> +
>>> +static void arch_common_suspend(void)
>>> +{
>>> +     save_counter();
>>> +     saved_regs.pgd = csr_read64(LOONGARCH_CSR_PGDL);
>>> +     saved_regs.kpgd = csr_read64(LOONGARCH_CSR_PGDH);
>>> +     saved_regs.pwctl0 = csr_read32(LOONGARCH_CSR_PWCTL0);
>>> +     saved_regs.pwctl1 = csr_read32(LOONGARCH_CSR_PWCTL1);
>>> +     saved_regs.ecfg = csr_read32(LOONGARCH_CSR_ECFG);
>>> +     saved_regs.euen = csr_read32(LOONGARCH_CSR_EUEN);
>>> +
>>> +     loongarch_suspend_addr = loongson_sysconf.suspend_addr;
>>> +}
>>> +
>>> +static void arch_common_resume(void)
>>> +{
>>> +     sync_counter();
>>> +     local_flush_tlb_all();
>>> +     csr_write64(per_cpu_offset(0), PERCPU_BASE_KS);
>>> +     csr_write64(eentry, LOONGARCH_CSR_EENTRY);
>>> +     csr_write64(eentry, LOONGARCH_CSR_MERRENTRY);
>>> +     csr_write64(tlbrentry, LOONGARCH_CSR_TLBRENTRY);
>>> +
>>> +     csr_write64(saved_regs.pgd, LOONGARCH_CSR_PGDL);
>>> +     csr_write64(saved_regs.kpgd, LOONGARCH_CSR_PGDH);
>>> +     csr_write32(saved_regs.pwctl0, LOONGARCH_CSR_PWCTL0);
>>> +     csr_write32(saved_regs.pwctl1, LOONGARCH_CSR_PWCTL1);
>>> +     csr_write32(saved_regs.ecfg, LOONGARCH_CSR_ECFG);
>>> +     csr_write32(saved_regs.euen, LOONGARCH_CSR_EUEN);
>>> +}
>>> +
>>> +int loongarch_acpi_suspend(void)
>>> +{
>>> +     enable_gpe_wakeup();
>>> +     enable_pci_wakeup();
>>> +
>>> +     arch_common_suspend();
>>> +
>>> +     /* processor specific suspend */
>>> +     loongarch_suspend_enter();
>>> +
>>> +     arch_common_resume();
>>> +
>>> +     return 0;
>>> +}
>>> diff --git a/arch/loongarch/power/suspend_asm.S b/arch/loongarch/power/suspend_asm.S
>>> new file mode 100644
>>> index 000000000000..ff52c3aa09d9
>>> --- /dev/null
>>> +++ b/arch/loongarch/power/suspend_asm.S
>>> @@ -0,0 +1,108 @@
>>> +/* SPDX-License-Identifier: GPL-2.0 */
>>> +/*
>>> + * Sleep helper for Loongson-3 sleep mode.
>>> + *
>>> + * Author: Huacai Chen <chenhuacai@loongson.cn>
>>> + * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
>>> + */
>>> +
>>> +#include <asm/asm.h>
>>> +#include <asm/asmmacro.h>
>>> +#include <asm/addrspace.h>
>>> +#include <asm/loongarch.h>
>>> +#include <asm/stackframe.h>
>>> +
>>> +     .text
>>> +     .align  5
>>> +
>>> +/* preparatory stuff */
>>> +.macro       SETUP_SLEEP
>>> +     addi.d          sp, sp, -PT_SIZE
>>> +     st.d            $r1, sp, PT_R1
>>> +     st.d            $r2, sp, PT_R2
>>> +     st.d            $r3, sp, PT_R3
>>> +     st.d            $r4, sp, PT_R4
>>> +     st.d            $r5, sp, PT_R5
>>> +     st.d            $r6, sp, PT_R6
>>> +     st.d            $r7, sp, PT_R7
>>> +     st.d            $r8, sp, PT_R8
>>> +     st.d            $r9, sp, PT_R9
>>> +     st.d            $r10, sp, PT_R10
>>> +     st.d            $r11, sp, PT_R11
>>> +     st.d            $r20, sp, PT_R20
>>> +     st.d            $r21, sp, PT_R21
>>> +     st.d            $r22, sp, PT_R22
>>> +     st.d            $r23, sp, PT_R23
>>> +     st.d            $r24, sp, PT_R24
>>> +     st.d            $r25, sp, PT_R25
>>> +     st.d            $r26, sp, PT_R26
>>> +     st.d            $r27, sp, PT_R27
>>> +     st.d            $r28, sp, PT_R28
>>> +     st.d            $r29, sp, PT_R29
>>> +     st.d            $r30, sp, PT_R30
>>> +     st.d            $r31, sp, PT_R31
>>> +
>>> +     la.pcrel        t0, acpi_saved_sp
>>> +     st.d            sp, t0, 0
>>> +.endm
>>> +
>>> +/* Sleep code for Loongson-3 */
>>> +SYM_CODE_START(loongarch_suspend_enter)
>>> +     SETUP_SLEEP
>>> +     bl              __flush_cache_all
>>> +
>>> +     /* Pass RA and SP to BIOS */
>>> +     addi.d          a1, sp, 0
>>> +     la.pcrel        a0, loongarch_wakeup_start
>>> +     la.pcrel        t0, loongarch_suspend_addr
>>> +     ld.d            t0, t0, 0 /* Call BIOS's STR sleep routine */
>>> +     jr              t0
>>> +     nop
>> Hi, Huacai,
>>
>> For loongarch_suspend_enter() and loongarch_wakeup_start(), it is better to
>> make them be more like C-style, that means it could obey LoongArch-psABI.
>> Just alloc limited stack and store the ra, s* and fp registers.
>> Additionally,
>> the tp and the u0 should be saved, too. Combine
>> loongarch_suspend_enter() and
>> loongarch_suspend_enter() to one function and using 'jirl a0, t0, 0' to link
>> them which indicate the control flow will return. These works make the
>> control
>> flow clarity. Finally use SYM_FUNC_START/END declare the new function.
> Thank you for your comments, but you may misunderstand something about S3.
> 1,  S3 sleep means come from kernel to BIOS, and S3 wakeup means come
> from BIOS to kernel (it has a POST progress, all register context
> lost). This is very different from a function call. When exception
> handling we need to save all and restore all, S3 wakeup should do even
> more.

It's true I'm not familiar with S3 (almost the hardware working). It is
special code control that S3 sleep from kernel to BIOS and wakeup
from BIOS to kernel. But loongarch_acpi_suspend() calls 
loongarch_suspend_enter()
and the latter returns by loongarch_wakeup_start().
(If there is other way to restore it, I'm seriously wrong.) The key
point is the position after calling loongarch_suspend_enter() and
before calling arch_common_resume(). We just keep this control flow
is normally at this point. So, due to LoongArch-psABI, after calling
loongarch_suspend_enter(), t* and a* can be changed. Actually, we
just should take care of tp and u0.


> 2, a0 (wakeup pc) and a1 (wakeup sp) are information passed to BIOS,
> BIOS may store it in some place similar to NVRAM, it does not
> naturally exist in the register after power up.
> 3, What means combine  loongarch_suspend_enter() and loongarch_suspend_enter()?

Just mistake, combine loongarch_suspend_enter and loongarch_wakeup_start,

like follows,

+     /* Pass RA and SP to BIOS */
+     addi.d          a1, sp, 0
+     la.pcrel        a0, loongarch_wakeup_start
+     la.pcrel        t0, loongarch_suspend_addr
+     ld.d            t0, t0, 0 /* Call BIOS's STR sleep routine */
+     jr              t0
+     nop
+SYM_CODE_END(loongarch_suspend_enter)
+
+     .align 12
+
+SYM_CODE_START(loongarch_wakeup_start)
+     li.d            t0, CSR_DMW0_INIT       # UC, PLV0
+     csrwr           t0, LOONGARCH_CSR_DMWIN0
+     li.d            t0, CSR_DMW1_INIT       # CA, PLV0
+     csrwr           t0, LOONGARCH_CSR_DMWIN1

--------change it to-------------->

.align 12
SYM_FUNC_START(loongarch_suspend_enter)
...
+     /* Pass RA and SP to BIOS */
+     addi.d          a1, sp, 0
+     la.pcrel        t0, loongarch_suspend_addr
+     ld.d            t0, t0, 0 /* Call BIOS's STR sleep routine */
*jirl a0, t0, 0*
+     li.d            t0, CSR_DMW0_INIT       # UC, PLV0
+     csrwr           t0, LOONGARCH_CSR_DMWIN0
+     li.d            t0, CSR_DMW1_INIT       # CA, PLV0
+     csrwr           t0, LOONGARCH_CSR_DMWIN1
...

> Huacai
>
>> Thanks,
>>
>> Jinyang
>>
>>
>>> +SYM_CODE_END(loongarch_suspend_enter)
>>> +
>>> +.macro SETUP_WAKEUP
>>> +     ld.d            $r1, sp, PT_R1
>>> +     ld.d            $r2, sp, PT_R2
>>> +     ld.d            $r3, sp, PT_R3
>>> +     ld.d            $r4, sp, PT_R4
>>> +     ld.d            $r5, sp, PT_R5
>>> +     ld.d            $r6, sp, PT_R6
>>> +     ld.d            $r7, sp, PT_R7
>>> +     ld.d            $r8, sp, PT_R8
>>> +     ld.d            $r9, sp, PT_R9
>>> +     ld.d            $r10, sp, PT_R10
>>> +     ld.d            $r11, sp, PT_R11
>>> +     ld.d            $r20, sp, PT_R20
>>> +     ld.d            $r21, sp, PT_R21
>>> +     ld.d            $r22, sp, PT_R22
>>> +     ld.d            $r23, sp, PT_R23
>>> +     ld.d            $r24, sp, PT_R24
>>> +     ld.d            $r25, sp, PT_R25
>>> +     ld.d            $r26, sp, PT_R26
>>> +     ld.d            $r27, sp, PT_R27
>>> +     ld.d            $r28, sp, PT_R28
>>> +     ld.d            $r29, sp, PT_R29
>>> +     ld.d            $r30, sp, PT_R30
>>> +     ld.d            $r31, sp, PT_R31
>>> +.endm
>>> +
>>> +     /* This is where we return upon wakeup.
>>> +      * Reload all of the registers and return.
>>> +      */
>>> +     .align 12
>>> +
>>> +SYM_CODE_START(loongarch_wakeup_start)
>>> +     li.d            t0, CSR_DMW0_INIT       # UC, PLV0
>>> +     csrwr           t0, LOONGARCH_CSR_DMWIN0
>>> +     li.d            t0, CSR_DMW1_INIT       # CA, PLV0
>>> +     csrwr           t0, LOONGARCH_CSR_DMWIN1
>>> +
>>> +     la.abs          t0, 0f
>>> +     jr              t0
>>> +0:
>>> +     la.pcrel        t0, acpi_saved_sp
>>> +     ld.d            sp, t0, 0
>>> +     SETUP_WAKEUP
>>> +     addi.d          sp, sp, PT_SIZE
>>> +     jr              ra
>>> +SYM_CODE_END(loongarch_wakeup_start)
>>

Re: [PATCH 1/2] LoongArch: Add suspend (ACPI S3) support

[Youling Tang]

On 10/28/2022 05:13 PM, Huacai Chen wrote:
> Hi, Youling,
>
> On Fri, Oct 28, 2022 at 5:06 PM Youling Tang <tangyouling@loongson.cn> wrote:
>>
>> Hi, Huacai
>>
>> On 10/28/2022 10:38 AM, Huacai Chen wrote:
>>> Add suspend (Suspend To RAM, aka ACPI S3) support for LoongArch.
>>>
>>> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
>>> ---
>>>  arch/loongarch/Kconfig                |   5 ++
>>>  arch/loongarch/Makefile               |   3 +
>>>  arch/loongarch/include/asm/acpi.h     |  10 +++
>>>  arch/loongarch/include/asm/bootinfo.h |   1 +
>>>  arch/loongarch/include/asm/loongson.h |   3 +
>>>  arch/loongarch/include/asm/time.h     |   1 +
>>>  arch/loongarch/kernel/acpi.c          |   6 ++
>>>  arch/loongarch/kernel/smp.c           |   1 +
>>>  arch/loongarch/kernel/time.c          |  11 ++-
>>>  arch/loongarch/power/Makefile         |   3 +
>>>  arch/loongarch/power/platform.c       |  45 +++++++++++
>>>  arch/loongarch/power/suspend.c        |  73 +++++++++++++++++
>>>  arch/loongarch/power/suspend_asm.S    | 112 ++++++++++++++++++++++++++
>>>  13 files changed, 271 insertions(+), 3 deletions(-)
>>>  create mode 100644 arch/loongarch/power/Makefile
>>>  create mode 100644 arch/loongarch/power/platform.c
>>>  create mode 100644 arch/loongarch/power/suspend.c
>>>  create mode 100644 arch/loongarch/power/suspend_asm.S
>>>
>>> diff --git a/arch/loongarch/Kconfig b/arch/loongarch/Kconfig
>>> index a8dc58e8162a..0df102401d1d 100644
>>> --- a/arch/loongarch/Kconfig
>>> +++ b/arch/loongarch/Kconfig
>>> @@ -57,6 +57,7 @@ config LOONGARCH
>>>       select ARCH_WANTS_NO_INSTR
>>>       select BUILDTIME_TABLE_SORT
>>>       select COMMON_CLK
>>> +     select CPU_PM
>>>       select EFI
>>>       select GENERIC_CLOCKEVENTS
>>>       select GENERIC_CMOS_UPDATE
>>> @@ -517,6 +518,10 @@ config ARCH_MMAP_RND_BITS_MAX
>>>
>>>  menu "Power management options"
>>>
>>> +config ARCH_SUSPEND_POSSIBLE
>>> +     def_bool y
>>> +
>>> +source "kernel/power/Kconfig"
>>>  source "drivers/acpi/Kconfig"
>>>
>>>  endmenu
>>> diff --git a/arch/loongarch/Makefile b/arch/loongarch/Makefile
>>> index f4cb54d5afd6..a0fc1f9980e3 100644
>>> --- a/arch/loongarch/Makefile
>>> +++ b/arch/loongarch/Makefile
>>> @@ -104,6 +104,9 @@ endif
>>>  libs-y += arch/loongarch/lib/
>>>  libs-$(CONFIG_EFI_STUB) += $(objtree)/drivers/firmware/efi/libstub/lib.a
>>>
>>> +# suspend and hibernation support
>>> +drivers-$(CONFIG_PM) += arch/loongarch/power/
>>> +
>>>  ifeq ($(KBUILD_EXTMOD),)
>>>  prepare: vdso_prepare
>>>  vdso_prepare: prepare0
>>> diff --git a/arch/loongarch/include/asm/acpi.h b/arch/loongarch/include/asm/acpi.h
>>> index 825c2519b9d1..9664868b1260 100644
>>> --- a/arch/loongarch/include/asm/acpi.h
>>> +++ b/arch/loongarch/include/asm/acpi.h
>>> @@ -35,4 +35,14 @@ extern struct list_head acpi_wakeup_device_list;
>>>
>>>  #define ACPI_TABLE_UPGRADE_MAX_PHYS ARCH_LOW_ADDRESS_LIMIT
>>>
>>> +extern int loongarch_acpi_suspend(void);
>>> +extern int (*acpi_suspend_lowlevel)(void);
>>> +extern void loongarch_suspend_enter(void);
>>> +extern void loongarch_wakeup_start(void);
>>> +
>>> +static inline unsigned long acpi_get_wakeup_address(void)
>>> +{
>>> +     return (unsigned long)loongarch_wakeup_start;
>>> +}
>>> +
>>>  #endif /* _ASM_LOONGARCH_ACPI_H */
>>> diff --git a/arch/loongarch/include/asm/bootinfo.h b/arch/loongarch/include/asm/bootinfo.h
>>> index ed0910e8b856..0051b526ac6d 100644
>>> --- a/arch/loongarch/include/asm/bootinfo.h
>>> +++ b/arch/loongarch/include/asm/bootinfo.h
>>> @@ -32,6 +32,7 @@ struct loongson_system_configuration {
>>>       int cores_per_node;
>>>       int cores_per_package;
>>>       unsigned long cores_io_master;
>>> +     unsigned long suspend_addr;
>>>       const char *cpuname;
>>>  };
>>>
>>> diff --git a/arch/loongarch/include/asm/loongson.h b/arch/loongarch/include/asm/loongson.h
>>> index 00db93edae1b..12494cffffd1 100644
>>> --- a/arch/loongarch/include/asm/loongson.h
>>> +++ b/arch/loongarch/include/asm/loongson.h
>>> @@ -136,4 +136,7 @@ typedef enum {
>>>  #define ls7a_writel(val, addr)       *(volatile unsigned int   *)TO_UNCACHE(addr) = (val)
>>>  #define ls7a_writeq(val, addr)       *(volatile unsigned long  *)TO_UNCACHE(addr) = (val)
>>>
>>> +void enable_gpe_wakeup(void);
>>> +void enable_pci_wakeup(void);
>>> +
>>>  #endif /* __ASM_LOONGSON_H */
>>> diff --git a/arch/loongarch/include/asm/time.h b/arch/loongarch/include/asm/time.h
>>> index 2eae219301d0..037a2d1b8ff4 100644
>>> --- a/arch/loongarch/include/asm/time.h
>>> +++ b/arch/loongarch/include/asm/time.h
>>> @@ -12,6 +12,7 @@
>>>  extern u64 cpu_clock_freq;
>>>  extern u64 const_clock_freq;
>>>
>>> +extern void save_counter(void);
>>>  extern void sync_counter(void);
>>>
>>>  static inline unsigned int calc_const_freq(void)
>>> diff --git a/arch/loongarch/kernel/acpi.c b/arch/loongarch/kernel/acpi.c
>>> index 335398482038..982672caf753 100644
>>> --- a/arch/loongarch/kernel/acpi.c
>>> +++ b/arch/loongarch/kernel/acpi.c
>>> @@ -156,6 +156,12 @@ static void __init acpi_process_madt(void)
>>>       loongson_sysconf.nr_cpus = num_processors;
>>>  }
>>>
>>> +#ifdef CONFIG_ACPI_SLEEP
>>> +int (*acpi_suspend_lowlevel)(void) = loongarch_acpi_suspend;
>>> +#else
>>> +int (*acpi_suspend_lowlevel)(void);
>>> +#endif
>>> +
>>>  int __init acpi_boot_init(void)
>>>  {
>>>       /*
>>> diff --git a/arch/loongarch/kernel/smp.c b/arch/loongarch/kernel/smp.c
>>> index 781a4d4bdddc..6e192a25e134 100644
>>> --- a/arch/loongarch/kernel/smp.c
>>> +++ b/arch/loongarch/kernel/smp.c
>>> @@ -16,6 +16,7 @@
>>>  #include <linux/smp.h>
>>>  #include <linux/threads.h>
>>>  #include <linux/export.h>
>>> +#include <linux/syscore_ops.h>
>>>  #include <linux/time.h>
>>>  #include <linux/tracepoint.h>
>>>  #include <linux/sched/hotplug.h>
>>> diff --git a/arch/loongarch/kernel/time.c b/arch/loongarch/kernel/time.c
>>> index 786735dcc8d6..a6576dea590c 100644
>>> --- a/arch/loongarch/kernel/time.c
>>> +++ b/arch/loongarch/kernel/time.c
>>> @@ -115,12 +115,17 @@ static unsigned long __init get_loops_per_jiffy(void)
>>>       return lpj;
>>>  }
>>>
>>> -static long init_timeval;
>>> +static long init_offset __nosavedata;
>>> +
>>> +void save_counter(void)
>>> +{
>>> +     init_offset = drdtime();
>>> +}
>>>
>>>  void sync_counter(void)
>>>  {
>>>       /* Ensure counter begin at 0 */
>>> -     csr_write64(-init_timeval, LOONGARCH_CSR_CNTC);
>>> +     csr_write64(init_offset, LOONGARCH_CSR_CNTC);
>>>  }
>>>
>>>  static int get_timer_irq(void)
>>> @@ -219,7 +224,7 @@ void __init time_init(void)
>>>       else
>>>               const_clock_freq = calc_const_freq();
>>>
>>> -     init_timeval = drdtime() - csr_read64(LOONGARCH_CSR_CNTC);
>>> +     init_offset = -(drdtime() - csr_read64(LOONGARCH_CSR_CNTC));
>>>
>>>       constant_clockevent_init();
>>>       constant_clocksource_init();
>>> diff --git a/arch/loongarch/power/Makefile b/arch/loongarch/power/Makefile
>>> new file mode 100644
>>> index 000000000000..6740117decaa
>>> --- /dev/null
>>> +++ b/arch/loongarch/power/Makefile
>>> @@ -0,0 +1,3 @@
>>> +obj-y        += platform.o
>>> +
>>> +obj-$(CONFIG_SUSPEND)                += suspend.o suspend_asm.o
>>> diff --git a/arch/loongarch/power/platform.c b/arch/loongarch/power/platform.c
>>> new file mode 100644
>>> index 000000000000..675e8792afaf
>>> --- /dev/null
>>> +++ b/arch/loongarch/power/platform.c
>>> @@ -0,0 +1,45 @@
>>> +// SPDX-License-Identifier: GPL-2.0
>>> +/*
>>> + * Author: Huacai Chen <chenhuacai@loongson.cn>
>>> + * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
>>> + */
>>> +#include <linux/acpi.h>
>>> +#include <linux/platform_device.h>
>>> +
>>> +#include <asm/bootinfo.h>
>>> +#include <asm/setup.h>
>>> +
>>> +void enable_gpe_wakeup(void)
>>> +{
>>> +     acpi_enable_all_wakeup_gpes();
>>> +}
>>> +
>>> +void enable_pci_wakeup(void)
>>> +{
>>> +     acpi_write_bit_register(ACPI_BITREG_PCIEXP_WAKE_STATUS, 1);
>>> +
>>> +     if (acpi_gbl_FADT.flags & ACPI_FADT_PCI_EXPRESS_WAKE)
>>> +             acpi_write_bit_register(ACPI_BITREG_PCIEXP_WAKE_DISABLE, 0);
>>> +}
>>> +
>>> +static int __init loongson3_acpi_suspend_init(void)
>>> +{
>>> +#ifdef CONFIG_ACPI
>>> +     acpi_status status;
>>> +     uint64_t suspend_addr = 0;
>>> +
>>> +     if (acpi_disabled || acpi_gbl_reduced_hardware)
>>> +             return 0;
>>> +
>>> +     acpi_write_bit_register(ACPI_BITREG_SCI_ENABLE, 1);
>>> +     status = acpi_evaluate_integer(NULL, "\\SADR", NULL, &suspend_addr);
>>> +     if (ACPI_FAILURE(status) || !suspend_addr) {
>>> +             pr_err("ACPI S3 is not support!\n");
>>> +             return -1;
>>> +     }
>>> +     loongson_sysconf.suspend_addr = (u64)phys_to_virt(PHYSADDR(suspend_addr));
>>> +#endif
>>> +     return 0;
>>> +}
>>> +
>>> +device_initcall(loongson3_acpi_suspend_init);
>>> diff --git a/arch/loongarch/power/suspend.c b/arch/loongarch/power/suspend.c
>>> new file mode 100644
>>> index 000000000000..b9fa0f9a9277
>>> --- /dev/null
>>> +++ b/arch/loongarch/power/suspend.c
>>> @@ -0,0 +1,73 @@
>>> +// SPDX-License-Identifier: GPL-2.0
>>> +/*
>>> + * loongson-specific suspend support
>>> + *
>>> + * Author: Huacai Chen <chenhuacai@loongson.cn>
>>> + * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
>>> + */
>>> +#include <linux/acpi.h>
>>> +#include <linux/pm.h>
>>> +#include <linux/suspend.h>
>>> +
>>> +#include <asm/loongarch.h>
>>> +#include <asm/loongson.h>
>>> +#include <asm/setup.h>
>>> +#include <asm/time.h>
>>> +#include <asm/tlbflush.h>
>>> +
>>> +u64 loongarch_suspend_addr;
>>> +
>>> +struct saved_registers {
>>> +     u32 ecfg;
>>> +     u32 euen;
>>> +     u64 pgd;
>>> +     u64 kpgd;
>>> +     u32 pwctl0;
>>> +     u32 pwctl1;
>>> +};
>>> +static struct saved_registers saved_regs;
>>> +
>>> +static void arch_common_suspend(void)
>>> +{
>>> +     save_counter();
>>> +     saved_regs.pgd = csr_read64(LOONGARCH_CSR_PGDL);
>>> +     saved_regs.kpgd = csr_read64(LOONGARCH_CSR_PGDH);
>>> +     saved_regs.pwctl0 = csr_read32(LOONGARCH_CSR_PWCTL0);
>>> +     saved_regs.pwctl1 = csr_read32(LOONGARCH_CSR_PWCTL1);
>>> +     saved_regs.ecfg = csr_read32(LOONGARCH_CSR_ECFG);
>>> +     saved_regs.euen = csr_read32(LOONGARCH_CSR_EUEN);
>>> +
>>> +     loongarch_suspend_addr = loongson_sysconf.suspend_addr;
>>> +}
>>> +
>>> +static void arch_common_resume(void)
>>> +{
>>> +     sync_counter();
>>> +     local_flush_tlb_all();
>>> +     csr_write64(per_cpu_offset(0), PERCPU_BASE_KS);
>>> +     csr_write64(eentry, LOONGARCH_CSR_EENTRY);
>>> +     csr_write64(eentry, LOONGARCH_CSR_MERRENTRY);
>>> +     csr_write64(tlbrentry, LOONGARCH_CSR_TLBRENTRY);
>>> +
>>> +     csr_write64(saved_regs.pgd, LOONGARCH_CSR_PGDL);
>>> +     csr_write64(saved_regs.kpgd, LOONGARCH_CSR_PGDH);
>>> +     csr_write32(saved_regs.pwctl0, LOONGARCH_CSR_PWCTL0);
>>> +     csr_write32(saved_regs.pwctl1, LOONGARCH_CSR_PWCTL1);
>>> +     csr_write32(saved_regs.ecfg, LOONGARCH_CSR_ECFG);
>>> +     csr_write32(saved_regs.euen, LOONGARCH_CSR_EUEN);
>>> +}
>>> +
>>> +int loongarch_acpi_suspend(void)
>>> +{
>>> +     enable_gpe_wakeup();
>>> +     enable_pci_wakeup();
>>> +
>>> +     arch_common_suspend();
>>> +
>>> +     /* processor specific suspend */
>>> +     loongarch_suspend_enter();
>>> +
>>> +     arch_common_resume();
>>> +
>>> +     return 0;
>>> +}
>>> diff --git a/arch/loongarch/power/suspend_asm.S b/arch/loongarch/power/suspend_asm.S
>>> new file mode 100644
>>> index 000000000000..ff52c3aa09d9
>>> --- /dev/null
>>> +++ b/arch/loongarch/power/suspend_asm.S
>>> @@ -0,0 +1,108 @@
>>> +/* SPDX-License-Identifier: GPL-2.0 */
>>> +/*
>>> + * Sleep helper for Loongson-3 sleep mode.
>>> + *
>>> + * Author: Huacai Chen <chenhuacai@loongson.cn>
>>> + * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
>>> + */
>>> +
>>> +#include <asm/asm.h>
>>> +#include <asm/asmmacro.h>
>>> +#include <asm/addrspace.h>
>>> +#include <asm/loongarch.h>
>>> +#include <asm/stackframe.h>
>>> +
>>> +     .text
>>> +     .align  5
>>> +
>>> +/* preparatory stuff */
>>> +.macro       SETUP_SLEEP
>>> +     addi.d          sp, sp, -PT_SIZE
>>> +     st.d            $r1, sp, PT_R1
>>> +     st.d            $r2, sp, PT_R2
>>> +     st.d            $r3, sp, PT_R3
>>> +     st.d            $r4, sp, PT_R4
>>> +     st.d            $r5, sp, PT_R5
>>> +     st.d            $r6, sp, PT_R6
>>> +     st.d            $r7, sp, PT_R7
>>> +     st.d            $r8, sp, PT_R8
>>> +     st.d            $r9, sp, PT_R9
>>> +     st.d            $r10, sp, PT_R10
>>> +     st.d            $r11, sp, PT_R11
>>> +     st.d            $r20, sp, PT_R20
>>> +     st.d            $r21, sp, PT_R21
>>> +     st.d            $r22, sp, PT_R22
>>> +     st.d            $r23, sp, PT_R23
>>> +     st.d            $r24, sp, PT_R24
>>> +     st.d            $r25, sp, PT_R25
>>> +     st.d            $r26, sp, PT_R26
>>> +     st.d            $r27, sp, PT_R27
>>> +     st.d            $r28, sp, PT_R28
>>> +     st.d            $r29, sp, PT_R29
>>> +     st.d            $r30, sp, PT_R30
>>> +     st.d            $r31, sp, PT_R31
>>> +
>>> +     la.pcrel        t0, acpi_saved_sp
>>> +     st.d            sp, t0, 0
>>> +.endm
>>> +
>>> +/* Sleep code for Loongson-3 */
>>> +SYM_CODE_START(loongarch_suspend_enter)
>>> +     SETUP_SLEEP
>>> +     bl              __flush_cache_all
>>> +
>>> +     /* Pass RA and SP to BIOS */
>>> +     addi.d          a1, sp, 0
>>> +     la.pcrel        a0, loongarch_wakeup_start
>>> +     la.pcrel        t0, loongarch_suspend_addr
>>> +     ld.d            t0, t0, 0 /* Call BIOS's STR sleep routine */
>>> +     jr              t0
>>> +     nop
>>> +SYM_CODE_END(loongarch_suspend_enter)
>>> +
>>> +.macro SETUP_WAKEUP
>>> +     ld.d            $r1, sp, PT_R1
>>> +     ld.d            $r2, sp, PT_R2
>>> +     ld.d            $r3, sp, PT_R3
>>> +     ld.d            $r4, sp, PT_R4
>>> +     ld.d            $r5, sp, PT_R5
>>> +     ld.d            $r6, sp, PT_R6
>>> +     ld.d            $r7, sp, PT_R7
>>> +     ld.d            $r8, sp, PT_R8
>>> +     ld.d            $r9, sp, PT_R9
>>> +     ld.d            $r10, sp, PT_R10
>>> +     ld.d            $r11, sp, PT_R11
>>> +     ld.d            $r20, sp, PT_R20
>>> +     ld.d            $r21, sp, PT_R21
>>> +     ld.d            $r22, sp, PT_R22
>>> +     ld.d            $r23, sp, PT_R23
>>> +     ld.d            $r24, sp, PT_R24
>>> +     ld.d            $r25, sp, PT_R25
>>> +     ld.d            $r26, sp, PT_R26
>>> +     ld.d            $r27, sp, PT_R27
>>> +     ld.d            $r28, sp, PT_R28
>>> +     ld.d            $r29, sp, PT_R29
>>> +     ld.d            $r30, sp, PT_R30
>>> +     ld.d            $r31, sp, PT_R31
>>> +.endm
>>> +
>>> +     /* This is where we return upon wakeup.
>>> +      * Reload all of the registers and return.
>>> +      */
>>> +     .align 12
>>> +
>>> +SYM_CODE_START(loongarch_wakeup_start)
>>> +     li.d            t0, CSR_DMW0_INIT       # UC, PLV0
>>> +     csrwr           t0, LOONGARCH_CSR_DMWIN0
>>> +     li.d            t0, CSR_DMW1_INIT       # CA, PLV0
>>> +     csrwr           t0, LOONGARCH_CSR_DMWIN1
>>> +
>>> +     la.abs          t0, 0f
>>> +     jr              t0
>>
>> We should try to avoid using la.abs in order to make it easier to
>> implement KASLR feature in the future.
>> If the purpose here is just to get the link address of the current
>> location, we would like to use the following method (and remove the
>> "0:" label):
>>
>> li.d    t0, CACHE_BASE
>> pcaddi  t0, 0
>> or      t0, t0, t1
>> jirl    zero, t0, 0xc
> But this cannot work for the TLB-mapped kernel. :(

This is just an equivalent replacement, at least it does not break the
current kernel.

Of course, this can be changed later together with the contents of
head.S (For better understanding, I intend to define a macro to
encapsulate these four instructions, do you have a good macro name to
recommend :))

Youling.
>
> Huacai
>
>>
>> Thanks,
>> Youling
>>
>>> +0:
>>> +     la.pcrel        t0, acpi_saved_sp
>>> +     ld.d            sp, t0, 0
>>> +     SETUP_WAKEUP
>>> +     addi.d          sp, sp, PT_SIZE
>>> +     jr              ra
>>> +SYM_CODE_END(loongarch_wakeup_start)
>>>
>>

Re: [PATCH 1/2] LoongArch: Add suspend (ACPI S3) support

[Huacai Chen]

Hi, Jinyang,

On Fri, Oct 28, 2022 at 5:37 PM Jinyang He <hejinyang@loongson.cn> wrote:
>
> Hi, Huacai,
>
>
> On 2022/10/28 下午5:00, Huacai Chen wrote:
>
> >   Hi, Jinyang,
> >
> > On Fri, Oct 28, 2022 at 3:23 PM Jinyang He <hejinyang@loongson.cn> wrote:
> >> On 2022/10/28 上午10:38, Huacai Chen wrote:
> >>
> >>> Add suspend (Suspend To RAM, aka ACPI S3) support for LoongArch.
> >>>
> >>> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
> >>> ---
> >>>    arch/loongarch/Kconfig                |   5 ++
> >>>    arch/loongarch/Makefile               |   3 +
> >>>    arch/loongarch/include/asm/acpi.h     |  10 +++
> >>>    arch/loongarch/include/asm/bootinfo.h |   1 +
> >>>    arch/loongarch/include/asm/loongson.h |   3 +
> >>>    arch/loongarch/include/asm/time.h     |   1 +
> >>>    arch/loongarch/kernel/acpi.c          |   6 ++
> >>>    arch/loongarch/kernel/smp.c           |   1 +
> >>>    arch/loongarch/kernel/time.c          |  11 ++-
> >>>    arch/loongarch/power/Makefile         |   3 +
> >>>    arch/loongarch/power/platform.c       |  45 +++++++++++
> >>>    arch/loongarch/power/suspend.c        |  73 +++++++++++++++++
> >>>    arch/loongarch/power/suspend_asm.S    | 112 ++++++++++++++++++++++++++
> >>>    13 files changed, 271 insertions(+), 3 deletions(-)
> >>>    create mode 100644 arch/loongarch/power/Makefile
> >>>    create mode 100644 arch/loongarch/power/platform.c
> >>>    create mode 100644 arch/loongarch/power/suspend.c
> >>>    create mode 100644 arch/loongarch/power/suspend_asm.S
> >>>
> >>> diff --git a/arch/loongarch/Kconfig b/arch/loongarch/Kconfig
> >>> index a8dc58e8162a..0df102401d1d 100644
> >>> --- a/arch/loongarch/Kconfig
> >>> +++ b/arch/loongarch/Kconfig
> >>> @@ -57,6 +57,7 @@ config LOONGARCH
> >>>        select ARCH_WANTS_NO_INSTR
> >>>        select BUILDTIME_TABLE_SORT
> >>>        select COMMON_CLK
> >>> +     select CPU_PM
> >>>        select EFI
> >>>        select GENERIC_CLOCKEVENTS
> >>>        select GENERIC_CMOS_UPDATE
> >>> @@ -517,6 +518,10 @@ config ARCH_MMAP_RND_BITS_MAX
> >>>
> >>>    menu "Power management options"
> >>>
> >>> +config ARCH_SUSPEND_POSSIBLE
> >>> +     def_bool y
> >>> +
> >>> +source "kernel/power/Kconfig"
> >>>    source "drivers/acpi/Kconfig"
> >>>
> >>>    endmenu
> >>> diff --git a/arch/loongarch/Makefile b/arch/loongarch/Makefile
> >>> index f4cb54d5afd6..a0fc1f9980e3 100644
> >>> --- a/arch/loongarch/Makefile
> >>> +++ b/arch/loongarch/Makefile
> >>> @@ -104,6 +104,9 @@ endif
> >>>    libs-y += arch/loongarch/lib/
> >>>    libs-$(CONFIG_EFI_STUB) += $(objtree)/drivers/firmware/efi/libstub/lib.a
> >>>
> >>> +# suspend and hibernation support
> >>> +drivers-$(CONFIG_PM) += arch/loongarch/power/
> >>> +
> >>>    ifeq ($(KBUILD_EXTMOD),)
> >>>    prepare: vdso_prepare
> >>>    vdso_prepare: prepare0
> >>> diff --git a/arch/loongarch/include/asm/acpi.h b/arch/loongarch/include/asm/acpi.h
> >>> index 825c2519b9d1..9664868b1260 100644
> >>> --- a/arch/loongarch/include/asm/acpi.h
> >>> +++ b/arch/loongarch/include/asm/acpi.h
> >>> @@ -35,4 +35,14 @@ extern struct list_head acpi_wakeup_device_list;
> >>>
> >>>    #define ACPI_TABLE_UPGRADE_MAX_PHYS ARCH_LOW_ADDRESS_LIMIT
> >>>
> >>> +extern int loongarch_acpi_suspend(void);
> >>> +extern int (*acpi_suspend_lowlevel)(void);
> >>> +extern void loongarch_suspend_enter(void);
> >>> +extern void loongarch_wakeup_start(void);
> >>> +
> >>> +static inline unsigned long acpi_get_wakeup_address(void)
> >>> +{
> >>> +     return (unsigned long)loongarch_wakeup_start;
> >>> +}
> >>> +
> >>>    #endif /* _ASM_LOONGARCH_ACPI_H */
> >>> diff --git a/arch/loongarch/include/asm/bootinfo.h b/arch/loongarch/include/asm/bootinfo.h
> >>> index ed0910e8b856..0051b526ac6d 100644
> >>> --- a/arch/loongarch/include/asm/bootinfo.h
> >>> +++ b/arch/loongarch/include/asm/bootinfo.h
> >>> @@ -32,6 +32,7 @@ struct loongson_system_configuration {
> >>>        int cores_per_node;
> >>>        int cores_per_package;
> >>>        unsigned long cores_io_master;
> >>> +     unsigned long suspend_addr;
> >>>        const char *cpuname;
> >>>    };
> >>>
> >>> diff --git a/arch/loongarch/include/asm/loongson.h b/arch/loongarch/include/asm/loongson.h
> >>> index 00db93edae1b..12494cffffd1 100644
> >>> --- a/arch/loongarch/include/asm/loongson.h
> >>> +++ b/arch/loongarch/include/asm/loongson.h
> >>> @@ -136,4 +136,7 @@ typedef enum {
> >>>    #define ls7a_writel(val, addr)      *(volatile unsigned int   *)TO_UNCACHE(addr) = (val)
> >>>    #define ls7a_writeq(val, addr)      *(volatile unsigned long  *)TO_UNCACHE(addr) = (val)
> >>>
> >>> +void enable_gpe_wakeup(void);
> >>> +void enable_pci_wakeup(void);
> >>> +
> >>>    #endif /* __ASM_LOONGSON_H */
> >>> diff --git a/arch/loongarch/include/asm/time.h b/arch/loongarch/include/asm/time.h
> >>> index 2eae219301d0..037a2d1b8ff4 100644
> >>> --- a/arch/loongarch/include/asm/time.h
> >>> +++ b/arch/loongarch/include/asm/time.h
> >>> @@ -12,6 +12,7 @@
> >>>    extern u64 cpu_clock_freq;
> >>>    extern u64 const_clock_freq;
> >>>
> >>> +extern void save_counter(void);
> >>>    extern void sync_counter(void);
> >>>
> >>>    static inline unsigned int calc_const_freq(void)
> >>> diff --git a/arch/loongarch/kernel/acpi.c b/arch/loongarch/kernel/acpi.c
> >>> index 335398482038..982672caf753 100644
> >>> --- a/arch/loongarch/kernel/acpi.c
> >>> +++ b/arch/loongarch/kernel/acpi.c
> >>> @@ -156,6 +156,12 @@ static void __init acpi_process_madt(void)
> >>>        loongson_sysconf.nr_cpus = num_processors;
> >>>    }
> >>>
> >>> +#ifdef CONFIG_ACPI_SLEEP
> >>> +int (*acpi_suspend_lowlevel)(void) = loongarch_acpi_suspend;
> >>> +#else
> >>> +int (*acpi_suspend_lowlevel)(void);
> >>> +#endif
> >>> +
> >>>    int __init acpi_boot_init(void)
> >>>    {
> >>>        /*
> >>> diff --git a/arch/loongarch/kernel/smp.c b/arch/loongarch/kernel/smp.c
> >>> index 781a4d4bdddc..6e192a25e134 100644
> >>> --- a/arch/loongarch/kernel/smp.c
> >>> +++ b/arch/loongarch/kernel/smp.c
> >>> @@ -16,6 +16,7 @@
> >>>    #include <linux/smp.h>
> >>>    #include <linux/threads.h>
> >>>    #include <linux/export.h>
> >>> +#include <linux/syscore_ops.h>
> >>>    #include <linux/time.h>
> >>>    #include <linux/tracepoint.h>
> >>>    #include <linux/sched/hotplug.h>
> >>> diff --git a/arch/loongarch/kernel/time.c b/arch/loongarch/kernel/time.c
> >>> index 786735dcc8d6..a6576dea590c 100644
> >>> --- a/arch/loongarch/kernel/time.c
> >>> +++ b/arch/loongarch/kernel/time.c
> >>> @@ -115,12 +115,17 @@ static unsigned long __init get_loops_per_jiffy(void)
> >>>        return lpj;
> >>>    }
> >>>
> >>> -static long init_timeval;
> >>> +static long init_offset __nosavedata;
> >>> +
> >>> +void save_counter(void)
> >>> +{
> >>> +     init_offset = drdtime();
> >>> +}
> >>>
> >>>    void sync_counter(void)
> >>>    {
> >>>        /* Ensure counter begin at 0 */
> >>> -     csr_write64(-init_timeval, LOONGARCH_CSR_CNTC);
> >>> +     csr_write64(init_offset, LOONGARCH_CSR_CNTC);
> >>>    }
> >>>
> >>>    static int get_timer_irq(void)
> >>> @@ -219,7 +224,7 @@ void __init time_init(void)
> >>>        else
> >>>                const_clock_freq = calc_const_freq();
> >>>
> >>> -     init_timeval = drdtime() - csr_read64(LOONGARCH_CSR_CNTC);
> >>> +     init_offset = -(drdtime() - csr_read64(LOONGARCH_CSR_CNTC));
> >>>
> >>>        constant_clockevent_init();
> >>>        constant_clocksource_init();
> >>> diff --git a/arch/loongarch/power/Makefile b/arch/loongarch/power/Makefile
> >>> new file mode 100644
> >>> index 000000000000..6740117decaa
> >>> --- /dev/null
> >>> +++ b/arch/loongarch/power/Makefile
> >>> @@ -0,0 +1,3 @@
> >>> +obj-y        += platform.o
> >>> +
> >>> +obj-$(CONFIG_SUSPEND)                += suspend.o suspend_asm.o
> >>> diff --git a/arch/loongarch/power/platform.c b/arch/loongarch/power/platform.c
> >>> new file mode 100644
> >>> index 000000000000..675e8792afaf
> >>> --- /dev/null
> >>> +++ b/arch/loongarch/power/platform.c
> >>> @@ -0,0 +1,45 @@
> >>> +// SPDX-License-Identifier: GPL-2.0
> >>> +/*
> >>> + * Author: Huacai Chen <chenhuacai@loongson.cn>
> >>> + * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
> >>> + */
> >>> +#include <linux/acpi.h>
> >>> +#include <linux/platform_device.h>
> >>> +
> >>> +#include <asm/bootinfo.h>
> >>> +#include <asm/setup.h>
> >>> +
> >>> +void enable_gpe_wakeup(void)
> >>> +{
> >>> +     acpi_enable_all_wakeup_gpes();
> >>> +}
> >>> +
> >>> +void enable_pci_wakeup(void)
> >>> +{
> >>> +     acpi_write_bit_register(ACPI_BITREG_PCIEXP_WAKE_STATUS, 1);
> >>> +
> >>> +     if (acpi_gbl_FADT.flags & ACPI_FADT_PCI_EXPRESS_WAKE)
> >>> +             acpi_write_bit_register(ACPI_BITREG_PCIEXP_WAKE_DISABLE, 0);
> >>> +}
> >>> +
> >>> +static int __init loongson3_acpi_suspend_init(void)
> >>> +{
> >>> +#ifdef CONFIG_ACPI
> >>> +     acpi_status status;
> >>> +     uint64_t suspend_addr = 0;
> >>> +
> >>> +     if (acpi_disabled || acpi_gbl_reduced_hardware)
> >>> +             return 0;
> >>> +
> >>> +     acpi_write_bit_register(ACPI_BITREG_SCI_ENABLE, 1);
> >>> +     status = acpi_evaluate_integer(NULL, "\\SADR", NULL, &suspend_addr);
> >>> +     if (ACPI_FAILURE(status) || !suspend_addr) {
> >>> +             pr_err("ACPI S3 is not support!\n");
> >>> +             return -1;
> >>> +     }
> >>> +     loongson_sysconf.suspend_addr = (u64)phys_to_virt(PHYSADDR(suspend_addr));
> >>> +#endif
> >>> +     return 0;
> >>> +}
> >>> +
> >>> +device_initcall(loongson3_acpi_suspend_init);
> >>> diff --git a/arch/loongarch/power/suspend.c b/arch/loongarch/power/suspend.c
> >>> new file mode 100644
> >>> index 000000000000..b9fa0f9a9277
> >>> --- /dev/null
> >>> +++ b/arch/loongarch/power/suspend.c
> >>> @@ -0,0 +1,73 @@
> >>> +// SPDX-License-Identifier: GPL-2.0
> >>> +/*
> >>> + * loongson-specific suspend support
> >>> + *
> >>> + * Author: Huacai Chen <chenhuacai@loongson.cn>
> >>> + * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
> >>> + */
> >>> +#include <linux/acpi.h>
> >>> +#include <linux/pm.h>
> >>> +#include <linux/suspend.h>
> >>> +
> >>> +#include <asm/loongarch.h>
> >>> +#include <asm/loongson.h>
> >>> +#include <asm/setup.h>
> >>> +#include <asm/time.h>
> >>> +#include <asm/tlbflush.h>
> >>> +
> >>> +u64 loongarch_suspend_addr;
> >>> +
> >>> +struct saved_registers {
> >>> +     u32 ecfg;
> >>> +     u32 euen;
> >>> +     u64 pgd;
> >>> +     u64 kpgd;
> >>> +     u32 pwctl0;
> >>> +     u32 pwctl1;
> >>> +};
> >>> +static struct saved_registers saved_regs;
> >>> +
> >>> +static void arch_common_suspend(void)
> >>> +{
> >>> +     save_counter();
> >>> +     saved_regs.pgd = csr_read64(LOONGARCH_CSR_PGDL);
> >>> +     saved_regs.kpgd = csr_read64(LOONGARCH_CSR_PGDH);
> >>> +     saved_regs.pwctl0 = csr_read32(LOONGARCH_CSR_PWCTL0);
> >>> +     saved_regs.pwctl1 = csr_read32(LOONGARCH_CSR_PWCTL1);
> >>> +     saved_regs.ecfg = csr_read32(LOONGARCH_CSR_ECFG);
> >>> +     saved_regs.euen = csr_read32(LOONGARCH_CSR_EUEN);
> >>> +
> >>> +     loongarch_suspend_addr = loongson_sysconf.suspend_addr;
> >>> +}
> >>> +
> >>> +static void arch_common_resume(void)
> >>> +{
> >>> +     sync_counter();
> >>> +     local_flush_tlb_all();
> >>> +     csr_write64(per_cpu_offset(0), PERCPU_BASE_KS);
> >>> +     csr_write64(eentry, LOONGARCH_CSR_EENTRY);
> >>> +     csr_write64(eentry, LOONGARCH_CSR_MERRENTRY);
> >>> +     csr_write64(tlbrentry, LOONGARCH_CSR_TLBRENTRY);
> >>> +
> >>> +     csr_write64(saved_regs.pgd, LOONGARCH_CSR_PGDL);
> >>> +     csr_write64(saved_regs.kpgd, LOONGARCH_CSR_PGDH);
> >>> +     csr_write32(saved_regs.pwctl0, LOONGARCH_CSR_PWCTL0);
> >>> +     csr_write32(saved_regs.pwctl1, LOONGARCH_CSR_PWCTL1);
> >>> +     csr_write32(saved_regs.ecfg, LOONGARCH_CSR_ECFG);
> >>> +     csr_write32(saved_regs.euen, LOONGARCH_CSR_EUEN);
> >>> +}
> >>> +
> >>> +int loongarch_acpi_suspend(void)
> >>> +{
> >>> +     enable_gpe_wakeup();
> >>> +     enable_pci_wakeup();
> >>> +
> >>> +     arch_common_suspend();
> >>> +
> >>> +     /* processor specific suspend */
> >>> +     loongarch_suspend_enter();
> >>> +
> >>> +     arch_common_resume();
> >>> +
> >>> +     return 0;
> >>> +}
> >>> diff --git a/arch/loongarch/power/suspend_asm.S b/arch/loongarch/power/suspend_asm.S
> >>> new file mode 100644
> >>> index 000000000000..ff52c3aa09d9
> >>> --- /dev/null
> >>> +++ b/arch/loongarch/power/suspend_asm.S
> >>> @@ -0,0 +1,108 @@
> >>> +/* SPDX-License-Identifier: GPL-2.0 */
> >>> +/*
> >>> + * Sleep helper for Loongson-3 sleep mode.
> >>> + *
> >>> + * Author: Huacai Chen <chenhuacai@loongson.cn>
> >>> + * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
> >>> + */
> >>> +
> >>> +#include <asm/asm.h>
> >>> +#include <asm/asmmacro.h>
> >>> +#include <asm/addrspace.h>
> >>> +#include <asm/loongarch.h>
> >>> +#include <asm/stackframe.h>
> >>> +
> >>> +     .text
> >>> +     .align  5
> >>> +
> >>> +/* preparatory stuff */
> >>> +.macro       SETUP_SLEEP
> >>> +     addi.d          sp, sp, -PT_SIZE
> >>> +     st.d            $r1, sp, PT_R1
> >>> +     st.d            $r2, sp, PT_R2
> >>> +     st.d            $r3, sp, PT_R3
> >>> +     st.d            $r4, sp, PT_R4
> >>> +     st.d            $r5, sp, PT_R5
> >>> +     st.d            $r6, sp, PT_R6
> >>> +     st.d            $r7, sp, PT_R7
> >>> +     st.d            $r8, sp, PT_R8
> >>> +     st.d            $r9, sp, PT_R9
> >>> +     st.d            $r10, sp, PT_R10
> >>> +     st.d            $r11, sp, PT_R11
> >>> +     st.d            $r20, sp, PT_R20
> >>> +     st.d            $r21, sp, PT_R21
> >>> +     st.d            $r22, sp, PT_R22
> >>> +     st.d            $r23, sp, PT_R23
> >>> +     st.d            $r24, sp, PT_R24
> >>> +     st.d            $r25, sp, PT_R25
> >>> +     st.d            $r26, sp, PT_R26
> >>> +     st.d            $r27, sp, PT_R27
> >>> +     st.d            $r28, sp, PT_R28
> >>> +     st.d            $r29, sp, PT_R29
> >>> +     st.d            $r30, sp, PT_R30
> >>> +     st.d            $r31, sp, PT_R31
> >>> +
> >>> +     la.pcrel        t0, acpi_saved_sp
> >>> +     st.d            sp, t0, 0
> >>> +.endm
> >>> +
> >>> +/* Sleep code for Loongson-3 */
> >>> +SYM_CODE_START(loongarch_suspend_enter)
> >>> +     SETUP_SLEEP
> >>> +     bl              __flush_cache_all
> >>> +
> >>> +     /* Pass RA and SP to BIOS */
> >>> +     addi.d          a1, sp, 0
> >>> +     la.pcrel        a0, loongarch_wakeup_start
> >>> +     la.pcrel        t0, loongarch_suspend_addr
> >>> +     ld.d            t0, t0, 0 /* Call BIOS's STR sleep routine */
> >>> +     jr              t0
> >>> +     nop
> >> Hi, Huacai,
> >>
> >> For loongarch_suspend_enter() and loongarch_wakeup_start(), it is better to
> >> make them be more like C-style, that means it could obey LoongArch-psABI.
> >> Just alloc limited stack and store the ra, s* and fp registers.
> >> Additionally,
> >> the tp and the u0 should be saved, too. Combine
> >> loongarch_suspend_enter() and
> >> loongarch_suspend_enter() to one function and using 'jirl a0, t0, 0' to link
> >> them which indicate the control flow will return. These works make the
> >> control
> >> flow clarity. Finally use SYM_FUNC_START/END declare the new function.
> > Thank you for your comments, but you may misunderstand something about S3.
> > 1,  S3 sleep means come from kernel to BIOS, and S3 wakeup means come
> > from BIOS to kernel (it has a POST progress, all register context
> > lost). This is very different from a function call. When exception
> > handling we need to save all and restore all, S3 wakeup should do even
> > more.
>
> It's true I'm not familiar with S3 (almost the hardware working). It is
> special code control that S3 sleep from kernel to BIOS and wakeup
> from BIOS to kernel. But loongarch_acpi_suspend() calls
> loongarch_suspend_enter()
> and the latter returns by loongarch_wakeup_start().
> (If there is other way to restore it, I'm seriously wrong.) The key
> point is the position after calling loongarch_suspend_enter() and
> before calling arch_common_resume(). We just keep this control flow
> is normally at this point. So, due to LoongArch-psABI, after calling
> loongarch_suspend_enter(), t* and a* can be changed. Actually, we
> just should take care of tp and u0.
Obey psABI needs caller and callee to know each other, this is not the
case for S3, kernel doesn't assume anything about BIOS.

>
>
> > 2, a0 (wakeup pc) and a1 (wakeup sp) are information passed to BIOS,
> > BIOS may store it in some place similar to NVRAM, it does not
> > naturally exist in the register after power up.
> > 3, What means combine  loongarch_suspend_enter() and loongarch_suspend_enter()?
>
> Just mistake, combine loongarch_suspend_enter and loongarch_wakeup_start,
They cannot be combined, you also cannot combine swsusp_asm_suspend
and swsusp_asm_resume for S4, right?

Huacai
>
> like follows,
>
> +     /* Pass RA and SP to BIOS */
> +     addi.d          a1, sp, 0
> +     la.pcrel        a0, loongarch_wakeup_start
> +     la.pcrel        t0, loongarch_suspend_addr
> +     ld.d            t0, t0, 0 /* Call BIOS's STR sleep routine */
> +     jr              t0
> +     nop
> +SYM_CODE_END(loongarch_suspend_enter)
> +
> +     .align 12
> +
> +SYM_CODE_START(loongarch_wakeup_start)
> +     li.d            t0, CSR_DMW0_INIT       # UC, PLV0
> +     csrwr           t0, LOONGARCH_CSR_DMWIN0
> +     li.d            t0, CSR_DMW1_INIT       # CA, PLV0
> +     csrwr           t0, LOONGARCH_CSR_DMWIN1
>
> --------change it to-------------->
>
> .align 12
> SYM_FUNC_START(loongarch_suspend_enter)
> ...
> +     /* Pass RA and SP to BIOS */
> +     addi.d          a1, sp, 0
> +     la.pcrel        t0, loongarch_suspend_addr
> +     ld.d            t0, t0, 0 /* Call BIOS's STR sleep routine */
> *jirl a0, t0, 0*
> +     li.d            t0, CSR_DMW0_INIT       # UC, PLV0
> +     csrwr           t0, LOONGARCH_CSR_DMWIN0
> +     li.d            t0, CSR_DMW1_INIT       # CA, PLV0
> +     csrwr           t0, LOONGARCH_CSR_DMWIN1
> ...
>
> > Huacai
> >
> >> Thanks,
> >>
> >> Jinyang
> >>
> >>
> >>> +SYM_CODE_END(loongarch_suspend_enter)
> >>> +
> >>> +.macro SETUP_WAKEUP
> >>> +     ld.d            $r1, sp, PT_R1
> >>> +     ld.d            $r2, sp, PT_R2
> >>> +     ld.d            $r3, sp, PT_R3
> >>> +     ld.d            $r4, sp, PT_R4
> >>> +     ld.d            $r5, sp, PT_R5
> >>> +     ld.d            $r6, sp, PT_R6
> >>> +     ld.d            $r7, sp, PT_R7
> >>> +     ld.d            $r8, sp, PT_R8
> >>> +     ld.d            $r9, sp, PT_R9
> >>> +     ld.d            $r10, sp, PT_R10
> >>> +     ld.d            $r11, sp, PT_R11
> >>> +     ld.d            $r20, sp, PT_R20
> >>> +     ld.d            $r21, sp, PT_R21
> >>> +     ld.d            $r22, sp, PT_R22
> >>> +     ld.d            $r23, sp, PT_R23
> >>> +     ld.d            $r24, sp, PT_R24
> >>> +     ld.d            $r25, sp, PT_R25
> >>> +     ld.d            $r26, sp, PT_R26
> >>> +     ld.d            $r27, sp, PT_R27
> >>> +     ld.d            $r28, sp, PT_R28
> >>> +     ld.d            $r29, sp, PT_R29
> >>> +     ld.d            $r30, sp, PT_R30
> >>> +     ld.d            $r31, sp, PT_R31
> >>> +.endm
> >>> +
> >>> +     /* This is where we return upon wakeup.
> >>> +      * Reload all of the registers and return.
> >>> +      */
> >>> +     .align 12
> >>> +
> >>> +SYM_CODE_START(loongarch_wakeup_start)
> >>> +     li.d            t0, CSR_DMW0_INIT       # UC, PLV0
> >>> +     csrwr           t0, LOONGARCH_CSR_DMWIN0
> >>> +     li.d            t0, CSR_DMW1_INIT       # CA, PLV0
> >>> +     csrwr           t0, LOONGARCH_CSR_DMWIN1
> >>> +
> >>> +     la.abs          t0, 0f
> >>> +     jr              t0
> >>> +0:
> >>> +     la.pcrel        t0, acpi_saved_sp
> >>> +     ld.d            sp, t0, 0
> >>> +     SETUP_WAKEUP
> >>> +     addi.d          sp, sp, PT_SIZE
> >>> +     jr              ra
> >>> +SYM_CODE_END(loongarch_wakeup_start)
> >>
>
>

Re: [PATCH 1/2] LoongArch: Add suspend (ACPI S3) support

[Jinyang He]

On 2022/10/28 下午5:44, Huacai Chen wrote:

> Hi, Jinyang,
>
> On Fri, Oct 28, 2022 at 5:37 PM Jinyang He <hejinyang@loongson.cn> wrote:
>> Hi, Huacai,
>>
>>
>> On 2022/10/28 下午5:00, Huacai Chen wrote:
>>
>>>    Hi, Jinyang,
>>>
>>> On Fri, Oct 28, 2022 at 3:23 PM Jinyang He <hejinyang@loongson.cn> wrote:
>>>> On 2022/10/28 上午10:38, Huacai Chen wrote:
>>>>
>>>>> Add suspend (Suspend To RAM, aka ACPI S3) support for LoongArch.
>>>>>
>>>>> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
>>>>> ---
>>>>>     arch/loongarch/Kconfig                |   5 ++
>>>>>     arch/loongarch/Makefile               |   3 +
>>>>>     arch/loongarch/include/asm/acpi.h     |  10 +++
>>>>>     arch/loongarch/include/asm/bootinfo.h |   1 +
>>>>>     arch/loongarch/include/asm/loongson.h |   3 +
>>>>>     arch/loongarch/include/asm/time.h     |   1 +
>>>>>     arch/loongarch/kernel/acpi.c          |   6 ++
>>>>>     arch/loongarch/kernel/smp.c           |   1 +
>>>>>     arch/loongarch/kernel/time.c          |  11 ++-
>>>>>     arch/loongarch/power/Makefile         |   3 +
>>>>>     arch/loongarch/power/platform.c       |  45 +++++++++++
>>>>>     arch/loongarch/power/suspend.c        |  73 +++++++++++++++++
>>>>>     arch/loongarch/power/suspend_asm.S    | 112 ++++++++++++++++++++++++++
>>>>>     13 files changed, 271 insertions(+), 3 deletions(-)
>>>>>     create mode 100644 arch/loongarch/power/Makefile
>>>>>     create mode 100644 arch/loongarch/power/platform.c
>>>>>     create mode 100644 arch/loongarch/power/suspend.c
>>>>>     create mode 100644 arch/loongarch/power/suspend_asm.S
>>>>>
>>>>> diff --git a/arch/loongarch/Kconfig b/arch/loongarch/Kconfig
>>>>> index a8dc58e8162a..0df102401d1d 100644
>>>>> --- a/arch/loongarch/Kconfig
>>>>> +++ b/arch/loongarch/Kconfig
>>>>> @@ -57,6 +57,7 @@ config LOONGARCH
>>>>>         select ARCH_WANTS_NO_INSTR
>>>>>         select BUILDTIME_TABLE_SORT
>>>>>         select COMMON_CLK
>>>>> +     select CPU_PM
>>>>>         select EFI
>>>>>         select GENERIC_CLOCKEVENTS
>>>>>         select GENERIC_CMOS_UPDATE
>>>>> @@ -517,6 +518,10 @@ config ARCH_MMAP_RND_BITS_MAX
>>>>>
>>>>>     menu "Power management options"
>>>>>
>>>>> +config ARCH_SUSPEND_POSSIBLE
>>>>> +     def_bool y
>>>>> +
>>>>> +source "kernel/power/Kconfig"
>>>>>     source "drivers/acpi/Kconfig"
>>>>>
>>>>>     endmenu
>>>>> diff --git a/arch/loongarch/Makefile b/arch/loongarch/Makefile
>>>>> index f4cb54d5afd6..a0fc1f9980e3 100644
>>>>> --- a/arch/loongarch/Makefile
>>>>> +++ b/arch/loongarch/Makefile
>>>>> @@ -104,6 +104,9 @@ endif
>>>>>     libs-y += arch/loongarch/lib/
>>>>>     libs-$(CONFIG_EFI_STUB) += $(objtree)/drivers/firmware/efi/libstub/lib.a
>>>>>
>>>>> +# suspend and hibernation support
>>>>> +drivers-$(CONFIG_PM) += arch/loongarch/power/
>>>>> +
>>>>>     ifeq ($(KBUILD_EXTMOD),)
>>>>>     prepare: vdso_prepare
>>>>>     vdso_prepare: prepare0
>>>>> diff --git a/arch/loongarch/include/asm/acpi.h b/arch/loongarch/include/asm/acpi.h
>>>>> index 825c2519b9d1..9664868b1260 100644
>>>>> --- a/arch/loongarch/include/asm/acpi.h
>>>>> +++ b/arch/loongarch/include/asm/acpi.h
>>>>> @@ -35,4 +35,14 @@ extern struct list_head acpi_wakeup_device_list;
>>>>>
>>>>>     #define ACPI_TABLE_UPGRADE_MAX_PHYS ARCH_LOW_ADDRESS_LIMIT
>>>>>
>>>>> +extern int loongarch_acpi_suspend(void);
>>>>> +extern int (*acpi_suspend_lowlevel)(void);
>>>>> +extern void loongarch_suspend_enter(void);
>>>>> +extern void loongarch_wakeup_start(void);
>>>>> +
>>>>> +static inline unsigned long acpi_get_wakeup_address(void)
>>>>> +{
>>>>> +     return (unsigned long)loongarch_wakeup_start;
>>>>> +}
>>>>> +
>>>>>     #endif /* _ASM_LOONGARCH_ACPI_H */
>>>>> diff --git a/arch/loongarch/include/asm/bootinfo.h b/arch/loongarch/include/asm/bootinfo.h
>>>>> index ed0910e8b856..0051b526ac6d 100644
>>>>> --- a/arch/loongarch/include/asm/bootinfo.h
>>>>> +++ b/arch/loongarch/include/asm/bootinfo.h
>>>>> @@ -32,6 +32,7 @@ struct loongson_system_configuration {
>>>>>         int cores_per_node;
>>>>>         int cores_per_package;
>>>>>         unsigned long cores_io_master;
>>>>> +     unsigned long suspend_addr;
>>>>>         const char *cpuname;
>>>>>     };
>>>>>
>>>>> diff --git a/arch/loongarch/include/asm/loongson.h b/arch/loongarch/include/asm/loongson.h
>>>>> index 00db93edae1b..12494cffffd1 100644
>>>>> --- a/arch/loongarch/include/asm/loongson.h
>>>>> +++ b/arch/loongarch/include/asm/loongson.h
>>>>> @@ -136,4 +136,7 @@ typedef enum {
>>>>>     #define ls7a_writel(val, addr)      *(volatile unsigned int   *)TO_UNCACHE(addr) = (val)
>>>>>     #define ls7a_writeq(val, addr)      *(volatile unsigned long  *)TO_UNCACHE(addr) = (val)
>>>>>
>>>>> +void enable_gpe_wakeup(void);
>>>>> +void enable_pci_wakeup(void);
>>>>> +
>>>>>     #endif /* __ASM_LOONGSON_H */
>>>>> diff --git a/arch/loongarch/include/asm/time.h b/arch/loongarch/include/asm/time.h
>>>>> index 2eae219301d0..037a2d1b8ff4 100644
>>>>> --- a/arch/loongarch/include/asm/time.h
>>>>> +++ b/arch/loongarch/include/asm/time.h
>>>>> @@ -12,6 +12,7 @@
>>>>>     extern u64 cpu_clock_freq;
>>>>>     extern u64 const_clock_freq;
>>>>>
>>>>> +extern void save_counter(void);
>>>>>     extern void sync_counter(void);
>>>>>
>>>>>     static inline unsigned int calc_const_freq(void)
>>>>> diff --git a/arch/loongarch/kernel/acpi.c b/arch/loongarch/kernel/acpi.c
>>>>> index 335398482038..982672caf753 100644
>>>>> --- a/arch/loongarch/kernel/acpi.c
>>>>> +++ b/arch/loongarch/kernel/acpi.c
>>>>> @@ -156,6 +156,12 @@ static void __init acpi_process_madt(void)
>>>>>         loongson_sysconf.nr_cpus = num_processors;
>>>>>     }
>>>>>
>>>>> +#ifdef CONFIG_ACPI_SLEEP
>>>>> +int (*acpi_suspend_lowlevel)(void) = loongarch_acpi_suspend;
>>>>> +#else
>>>>> +int (*acpi_suspend_lowlevel)(void);
>>>>> +#endif
>>>>> +
>>>>>     int __init acpi_boot_init(void)
>>>>>     {
>>>>>         /*
>>>>> diff --git a/arch/loongarch/kernel/smp.c b/arch/loongarch/kernel/smp.c
>>>>> index 781a4d4bdddc..6e192a25e134 100644
>>>>> --- a/arch/loongarch/kernel/smp.c
>>>>> +++ b/arch/loongarch/kernel/smp.c
>>>>> @@ -16,6 +16,7 @@
>>>>>     #include <linux/smp.h>
>>>>>     #include <linux/threads.h>
>>>>>     #include <linux/export.h>
>>>>> +#include <linux/syscore_ops.h>
>>>>>     #include <linux/time.h>
>>>>>     #include <linux/tracepoint.h>
>>>>>     #include <linux/sched/hotplug.h>
>>>>> diff --git a/arch/loongarch/kernel/time.c b/arch/loongarch/kernel/time.c
>>>>> index 786735dcc8d6..a6576dea590c 100644
>>>>> --- a/arch/loongarch/kernel/time.c
>>>>> +++ b/arch/loongarch/kernel/time.c
>>>>> @@ -115,12 +115,17 @@ static unsigned long __init get_loops_per_jiffy(void)
>>>>>         return lpj;
>>>>>     }
>>>>>
>>>>> -static long init_timeval;
>>>>> +static long init_offset __nosavedata;
>>>>> +
>>>>> +void save_counter(void)
>>>>> +{
>>>>> +     init_offset = drdtime();
>>>>> +}
>>>>>
>>>>>     void sync_counter(void)
>>>>>     {
>>>>>         /* Ensure counter begin at 0 */
>>>>> -     csr_write64(-init_timeval, LOONGARCH_CSR_CNTC);
>>>>> +     csr_write64(init_offset, LOONGARCH_CSR_CNTC);
>>>>>     }
>>>>>
>>>>>     static int get_timer_irq(void)
>>>>> @@ -219,7 +224,7 @@ void __init time_init(void)
>>>>>         else
>>>>>                 const_clock_freq = calc_const_freq();
>>>>>
>>>>> -     init_timeval = drdtime() - csr_read64(LOONGARCH_CSR_CNTC);
>>>>> +     init_offset = -(drdtime() - csr_read64(LOONGARCH_CSR_CNTC));
>>>>>
>>>>>         constant_clockevent_init();
>>>>>         constant_clocksource_init();
>>>>> diff --git a/arch/loongarch/power/Makefile b/arch/loongarch/power/Makefile
>>>>> new file mode 100644
>>>>> index 000000000000..6740117decaa
>>>>> --- /dev/null
>>>>> +++ b/arch/loongarch/power/Makefile
>>>>> @@ -0,0 +1,3 @@
>>>>> +obj-y        += platform.o
>>>>> +
>>>>> +obj-$(CONFIG_SUSPEND)                += suspend.o suspend_asm.o
>>>>> diff --git a/arch/loongarch/power/platform.c b/arch/loongarch/power/platform.c
>>>>> new file mode 100644
>>>>> index 000000000000..675e8792afaf
>>>>> --- /dev/null
>>>>> +++ b/arch/loongarch/power/platform.c
>>>>> @@ -0,0 +1,45 @@
>>>>> +// SPDX-License-Identifier: GPL-2.0
>>>>> +/*
>>>>> + * Author: Huacai Chen <chenhuacai@loongson.cn>
>>>>> + * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
>>>>> + */
>>>>> +#include <linux/acpi.h>
>>>>> +#include <linux/platform_device.h>
>>>>> +
>>>>> +#include <asm/bootinfo.h>
>>>>> +#include <asm/setup.h>
>>>>> +
>>>>> +void enable_gpe_wakeup(void)
>>>>> +{
>>>>> +     acpi_enable_all_wakeup_gpes();
>>>>> +}
>>>>> +
>>>>> +void enable_pci_wakeup(void)
>>>>> +{
>>>>> +     acpi_write_bit_register(ACPI_BITREG_PCIEXP_WAKE_STATUS, 1);
>>>>> +
>>>>> +     if (acpi_gbl_FADT.flags & ACPI_FADT_PCI_EXPRESS_WAKE)
>>>>> +             acpi_write_bit_register(ACPI_BITREG_PCIEXP_WAKE_DISABLE, 0);
>>>>> +}
>>>>> +
>>>>> +static int __init loongson3_acpi_suspend_init(void)
>>>>> +{
>>>>> +#ifdef CONFIG_ACPI
>>>>> +     acpi_status status;
>>>>> +     uint64_t suspend_addr = 0;
>>>>> +
>>>>> +     if (acpi_disabled || acpi_gbl_reduced_hardware)
>>>>> +             return 0;
>>>>> +
>>>>> +     acpi_write_bit_register(ACPI_BITREG_SCI_ENABLE, 1);
>>>>> +     status = acpi_evaluate_integer(NULL, "\\SADR", NULL, &suspend_addr);
>>>>> +     if (ACPI_FAILURE(status) || !suspend_addr) {
>>>>> +             pr_err("ACPI S3 is not support!\n");
>>>>> +             return -1;
>>>>> +     }
>>>>> +     loongson_sysconf.suspend_addr = (u64)phys_to_virt(PHYSADDR(suspend_addr));
>>>>> +#endif
>>>>> +     return 0;
>>>>> +}
>>>>> +
>>>>> +device_initcall(loongson3_acpi_suspend_init);
>>>>> diff --git a/arch/loongarch/power/suspend.c b/arch/loongarch/power/suspend.c
>>>>> new file mode 100644
>>>>> index 000000000000..b9fa0f9a9277
>>>>> --- /dev/null
>>>>> +++ b/arch/loongarch/power/suspend.c
>>>>> @@ -0,0 +1,73 @@
>>>>> +// SPDX-License-Identifier: GPL-2.0
>>>>> +/*
>>>>> + * loongson-specific suspend support
>>>>> + *
>>>>> + * Author: Huacai Chen <chenhuacai@loongson.cn>
>>>>> + * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
>>>>> + */
>>>>> +#include <linux/acpi.h>
>>>>> +#include <linux/pm.h>
>>>>> +#include <linux/suspend.h>
>>>>> +
>>>>> +#include <asm/loongarch.h>
>>>>> +#include <asm/loongson.h>
>>>>> +#include <asm/setup.h>
>>>>> +#include <asm/time.h>
>>>>> +#include <asm/tlbflush.h>
>>>>> +
>>>>> +u64 loongarch_suspend_addr;
>>>>> +
>>>>> +struct saved_registers {
>>>>> +     u32 ecfg;
>>>>> +     u32 euen;
>>>>> +     u64 pgd;
>>>>> +     u64 kpgd;
>>>>> +     u32 pwctl0;
>>>>> +     u32 pwctl1;
>>>>> +};
>>>>> +static struct saved_registers saved_regs;
>>>>> +
>>>>> +static void arch_common_suspend(void)
>>>>> +{
>>>>> +     save_counter();
>>>>> +     saved_regs.pgd = csr_read64(LOONGARCH_CSR_PGDL);
>>>>> +     saved_regs.kpgd = csr_read64(LOONGARCH_CSR_PGDH);
>>>>> +     saved_regs.pwctl0 = csr_read32(LOONGARCH_CSR_PWCTL0);
>>>>> +     saved_regs.pwctl1 = csr_read32(LOONGARCH_CSR_PWCTL1);
>>>>> +     saved_regs.ecfg = csr_read32(LOONGARCH_CSR_ECFG);
>>>>> +     saved_regs.euen = csr_read32(LOONGARCH_CSR_EUEN);
>>>>> +
>>>>> +     loongarch_suspend_addr = loongson_sysconf.suspend_addr;
>>>>> +}
>>>>> +
>>>>> +static void arch_common_resume(void)
>>>>> +{
>>>>> +     sync_counter();
>>>>> +     local_flush_tlb_all();
>>>>> +     csr_write64(per_cpu_offset(0), PERCPU_BASE_KS);
>>>>> +     csr_write64(eentry, LOONGARCH_CSR_EENTRY);
>>>>> +     csr_write64(eentry, LOONGARCH_CSR_MERRENTRY);
>>>>> +     csr_write64(tlbrentry, LOONGARCH_CSR_TLBRENTRY);
>>>>> +
>>>>> +     csr_write64(saved_regs.pgd, LOONGARCH_CSR_PGDL);
>>>>> +     csr_write64(saved_regs.kpgd, LOONGARCH_CSR_PGDH);
>>>>> +     csr_write32(saved_regs.pwctl0, LOONGARCH_CSR_PWCTL0);
>>>>> +     csr_write32(saved_regs.pwctl1, LOONGARCH_CSR_PWCTL1);
>>>>> +     csr_write32(saved_regs.ecfg, LOONGARCH_CSR_ECFG);
>>>>> +     csr_write32(saved_regs.euen, LOONGARCH_CSR_EUEN);
>>>>> +}
>>>>> +
>>>>> +int loongarch_acpi_suspend(void)
>>>>> +{
>>>>> +     enable_gpe_wakeup();
>>>>> +     enable_pci_wakeup();
>>>>> +
>>>>> +     arch_common_suspend();
>>>>> +
>>>>> +     /* processor specific suspend */
>>>>> +     loongarch_suspend_enter();
>>>>> +
>>>>> +     arch_common_resume();
>>>>> +
>>>>> +     return 0;
>>>>> +}
>>>>> diff --git a/arch/loongarch/power/suspend_asm.S b/arch/loongarch/power/suspend_asm.S
>>>>> new file mode 100644
>>>>> index 000000000000..ff52c3aa09d9
>>>>> --- /dev/null
>>>>> +++ b/arch/loongarch/power/suspend_asm.S
>>>>> @@ -0,0 +1,108 @@
>>>>> +/* SPDX-License-Identifier: GPL-2.0 */
>>>>> +/*
>>>>> + * Sleep helper for Loongson-3 sleep mode.
>>>>> + *
>>>>> + * Author: Huacai Chen <chenhuacai@loongson.cn>
>>>>> + * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
>>>>> + */
>>>>> +
>>>>> +#include <asm/asm.h>
>>>>> +#include <asm/asmmacro.h>
>>>>> +#include <asm/addrspace.h>
>>>>> +#include <asm/loongarch.h>
>>>>> +#include <asm/stackframe.h>
>>>>> +
>>>>> +     .text
>>>>> +     .align  5
>>>>> +
>>>>> +/* preparatory stuff */
>>>>> +.macro       SETUP_SLEEP
>>>>> +     addi.d          sp, sp, -PT_SIZE
>>>>> +     st.d            $r1, sp, PT_R1
>>>>> +     st.d            $r2, sp, PT_R2
>>>>> +     st.d            $r3, sp, PT_R3
>>>>> +     st.d            $r4, sp, PT_R4
>>>>> +     st.d            $r5, sp, PT_R5
>>>>> +     st.d            $r6, sp, PT_R6
>>>>> +     st.d            $r7, sp, PT_R7
>>>>> +     st.d            $r8, sp, PT_R8
>>>>> +     st.d            $r9, sp, PT_R9
>>>>> +     st.d            $r10, sp, PT_R10
>>>>> +     st.d            $r11, sp, PT_R11
>>>>> +     st.d            $r20, sp, PT_R20
>>>>> +     st.d            $r21, sp, PT_R21
>>>>> +     st.d            $r22, sp, PT_R22
>>>>> +     st.d            $r23, sp, PT_R23
>>>>> +     st.d            $r24, sp, PT_R24
>>>>> +     st.d            $r25, sp, PT_R25
>>>>> +     st.d            $r26, sp, PT_R26
>>>>> +     st.d            $r27, sp, PT_R27
>>>>> +     st.d            $r28, sp, PT_R28
>>>>> +     st.d            $r29, sp, PT_R29
>>>>> +     st.d            $r30, sp, PT_R30
>>>>> +     st.d            $r31, sp, PT_R31
>>>>> +
>>>>> +     la.pcrel        t0, acpi_saved_sp
>>>>> +     st.d            sp, t0, 0
>>>>> +.endm
>>>>> +
>>>>> +/* Sleep code for Loongson-3 */
>>>>> +SYM_CODE_START(loongarch_suspend_enter)
>>>>> +     SETUP_SLEEP
>>>>> +     bl              __flush_cache_all
>>>>> +
>>>>> +     /* Pass RA and SP to BIOS */
>>>>> +     addi.d          a1, sp, 0
>>>>> +     la.pcrel        a0, loongarch_wakeup_start
>>>>> +     la.pcrel        t0, loongarch_suspend_addr
>>>>> +     ld.d            t0, t0, 0 /* Call BIOS's STR sleep routine */
>>>>> +     jr              t0
>>>>> +     nop
>>>> Hi, Huacai,
>>>>
>>>> For loongarch_suspend_enter() and loongarch_wakeup_start(), it is better to
>>>> make them be more like C-style, that means it could obey LoongArch-psABI.
>>>> Just alloc limited stack and store the ra, s* and fp registers.
>>>> Additionally,
>>>> the tp and the u0 should be saved, too. Combine
>>>> loongarch_suspend_enter() and
>>>> loongarch_suspend_enter() to one function and using 'jirl a0, t0, 0' to link
>>>> them which indicate the control flow will return. These works make the
>>>> control
>>>> flow clarity. Finally use SYM_FUNC_START/END declare the new function.
>>> Thank you for your comments, but you may misunderstand something about S3.
>>> 1,  S3 sleep means come from kernel to BIOS, and S3 wakeup means come
>>> from BIOS to kernel (it has a POST progress, all register context
>>> lost). This is very different from a function call. When exception
>>> handling we need to save all and restore all, S3 wakeup should do even
>>> more.
>> It's true I'm not familiar with S3 (almost the hardware working). It is
>> special code control that S3 sleep from kernel to BIOS and wakeup
>> from BIOS to kernel. But loongarch_acpi_suspend() calls
>> loongarch_suspend_enter()
>> and the latter returns by loongarch_wakeup_start().
>> (If there is other way to restore it, I'm seriously wrong.) The key
>> point is the position after calling loongarch_suspend_enter() and
>> before calling arch_common_resume(). We just keep this control flow
>> is normally at this point. So, due to LoongArch-psABI, after calling
>> loongarch_suspend_enter(), t* and a* can be changed. Actually, we
>> just should take care of tp and u0.
> Obey psABI needs caller and callee to know each other, this is not the
> case for S3, kernel doesn't assume anything about BIOS.

+int loongarch_acpi_suspend(void)
+{
+     enable_gpe_wakeup();
+     enable_pci_wakeup();
+
+     arch_common_suspend();
+
+     /* processor specific suspend */
+     loongarch_suspend_enter();
+

I'm not sure what register state is broken will cause error here.
While there may be ipa-ra optimizations, they are not in the same
compilation unit. It obey Procedure Calling Convention. t* and a*
is free, and others regs should be restored before here.

+     arch_common_resume();
+
+     return 0;
+}

>>
>>> 2, a0 (wakeup pc) and a1 (wakeup sp) are information passed to BIOS,
>>> BIOS may store it in some place similar to NVRAM, it does not
>>> naturally exist in the register after power up.
>>> 3, What means combine  loongarch_suspend_enter() and loongarch_suspend_enter()?
>> Just mistake, combine loongarch_suspend_enter and loongarch_wakeup_start,
> They cannot be combined, you also cannot combine swsusp_asm_suspend
> and swsusp_asm_resume for S4, right?

S4 is not needed. IMO S4 is like try catch, while S3 is like syscall. 
User use syscall and known a* and t* will be destoryed, and kernel is 
not needed save all regs unless like process copy.

S4 is like try catch, we save state like setjmp, and the control flow 
will still go until do leave(). And then restart kernel like get signal, 
the time when initcall call restore like longjmp.


>> like follows,
>>
>> +     /* Pass RA and SP to BIOS */
>> +     addi.d          a1, sp, 0
>> +     la.pcrel        a0, loongarch_wakeup_start
>> +     la.pcrel        t0, loongarch_suspend_addr
>> +     ld.d            t0, t0, 0 /* Call BIOS's STR sleep routine */
>> +     jr              t0
>> +     nop
>> +SYM_CODE_END(loongarch_suspend_enter)
>> +
>> +     .align 12
>> +
>> +SYM_CODE_START(loongarch_wakeup_start)
>> +     li.d            t0, CSR_DMW0_INIT       # UC, PLV0
>> +     csrwr           t0, LOONGARCH_CSR_DMWIN0
>> +     li.d            t0, CSR_DMW1_INIT       # CA, PLV0
>> +     csrwr           t0, LOONGARCH_CSR_DMWIN1
>>
>> --------change it to-------------->
>>
>> .align 12
>> SYM_FUNC_START(loongarch_suspend_enter)
>> ...
>> +     /* Pass RA and SP to BIOS */
>> +     addi.d          a1, sp, 0
>> +     la.pcrel        t0, loongarch_suspend_addr
>> +     ld.d            t0, t0, 0 /* Call BIOS's STR sleep routine */
>> *jirl a0, t0, 0*
>> +     li.d            t0, CSR_DMW0_INIT       # UC, PLV0
>> +     csrwr           t0, LOONGARCH_CSR_DMWIN0
>> +     li.d            t0, CSR_DMW1_INIT       # CA, PLV0
>> +     csrwr           t0, LOONGARCH_CSR_DMWIN1
>> ...
>>
>>> Huacai
>>>
>>>> Thanks,
>>>>
>>>> Jinyang
>>>>
>>>>
>>>>> +SYM_CODE_END(loongarch_suspend_enter)
>>>>> +
>>>>> +.macro SETUP_WAKEUP
>>>>> +     ld.d            $r1, sp, PT_R1
>>>>> +     ld.d            $r2, sp, PT_R2
>>>>> +     ld.d            $r3, sp, PT_R3
>>>>> +     ld.d            $r4, sp, PT_R4
>>>>> +     ld.d            $r5, sp, PT_R5
>>>>> +     ld.d            $r6, sp, PT_R6
>>>>> +     ld.d            $r7, sp, PT_R7
>>>>> +     ld.d            $r8, sp, PT_R8
>>>>> +     ld.d            $r9, sp, PT_R9
>>>>> +     ld.d            $r10, sp, PT_R10
>>>>> +     ld.d            $r11, sp, PT_R11
>>>>> +     ld.d            $r20, sp, PT_R20
>>>>> +     ld.d            $r21, sp, PT_R21
>>>>> +     ld.d            $r22, sp, PT_R22
>>>>> +     ld.d            $r23, sp, PT_R23
>>>>> +     ld.d            $r24, sp, PT_R24
>>>>> +     ld.d            $r25, sp, PT_R25
>>>>> +     ld.d            $r26, sp, PT_R26
>>>>> +     ld.d            $r27, sp, PT_R27
>>>>> +     ld.d            $r28, sp, PT_R28
>>>>> +     ld.d            $r29, sp, PT_R29
>>>>> +     ld.d            $r30, sp, PT_R30
>>>>> +     ld.d            $r31, sp, PT_R31
>>>>> +.endm
>>>>> +
>>>>> +     /* This is where we return upon wakeup.
>>>>> +      * Reload all of the registers and return.
>>>>> +      */
>>>>> +     .align 12
>>>>> +
>>>>> +SYM_CODE_START(loongarch_wakeup_start)
>>>>> +     li.d            t0, CSR_DMW0_INIT       # UC, PLV0
>>>>> +     csrwr           t0, LOONGARCH_CSR_DMWIN0
>>>>> +     li.d            t0, CSR_DMW1_INIT       # CA, PLV0
>>>>> +     csrwr           t0, LOONGARCH_CSR_DMWIN1
>>>>> +
>>>>> +     la.abs          t0, 0f
>>>>> +     jr              t0
>>>>> +0:
>>>>> +     la.pcrel        t0, acpi_saved_sp
>>>>> +     ld.d            sp, t0, 0
>>>>> +     SETUP_WAKEUP
>>>>> +     addi.d          sp, sp, PT_SIZE
>>>>> +     jr              ra
>>>>> +SYM_CODE_END(loongarch_wakeup_start)
>>

Re: [PATCH 2/2] LoongArch: Add hibernation (ACPI S4) support

[kernel test robot]

[-- Attachment #1: Type: text/plain, Size: 1904 bytes --]

Hi Huacai,

I love your patch! Yet something to improve:

[auto build test ERROR on pavel-leds/for-next]
[also build test ERROR on linus/master v6.1-rc2 next-20221028]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Huacai-Chen/LoongArch-Add-suspend-ACPI-S3-support/20221028-104234
base:   git://git.kernel.org/pub/scm/linux/kernel/git/pavel/linux-leds.git for-next
patch link:    https://lore.kernel.org/r/20221028023829.4030984-2-chenhuacai%40loongson.cn
patch subject: [PATCH 2/2] LoongArch: Add hibernation (ACPI S4) support
config: loongarch-allnoconfig
compiler: loongarch64-linux-gcc (GCC) 12.1.0
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # https://github.com/intel-lab-lkp/linux/commit/49ada2ab12c9a56d08865ddfc91413242369c1b8
        git remote add linux-review https://github.com/intel-lab-lkp/linux
        git fetch --no-tags linux-review Huacai-Chen/LoongArch-Add-suspend-ACPI-S3-support/20221028-104234
        git checkout 49ada2ab12c9a56d08865ddfc91413242369c1b8
        # save the config file
        mkdir build_dir && cp config build_dir/.config
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=loongarch SHELL=/bin/bash

If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp@intel.com>

All errors (new ones prefixed by >>):

   loongarch64-linux-ld: arch/loongarch/kernel/reset.o: in function `machine_power_off':
>> reset.c:(.text+0x54): undefined reference to `enable_pci_wakeup'

-- 
0-DAY CI Kernel Test Service
https://01.org/lkp

[-- Attachment #2: config --]
[-- Type: text/plain, Size: 32856 bytes --]

#
# Automatically generated file; DO NOT EDIT.
# Linux/loongarch 6.1.0-rc1 Kernel Configuration
#
CONFIG_CC_VERSION_TEXT="loongarch64-linux-gcc (GCC) 12.1.0"
CONFIG_CC_IS_GCC=y
CONFIG_GCC_VERSION=120100
CONFIG_CLANG_VERSION=0
CONFIG_AS_IS_GNU=y
CONFIG_AS_VERSION=23800
CONFIG_LD_IS_BFD=y
CONFIG_LD_VERSION=23800
CONFIG_LLD_VERSION=0
CONFIG_CC_HAS_ASM_GOTO_OUTPUT=y
CONFIG_CC_HAS_ASM_INLINE=y
CONFIG_CC_HAS_NO_PROFILE_FN_ATTR=y
CONFIG_PAHOLE_VERSION=123
CONFIG_IRQ_WORK=y
CONFIG_BUILDTIME_TABLE_SORT=y

#
# General setup
#
CONFIG_INIT_ENV_ARG_LIMIT=32
# CONFIG_COMPILE_TEST is not set
# CONFIG_WERROR is not set
CONFIG_LOCALVERSION=""
# CONFIG_LOCALVERSION_AUTO is not set
CONFIG_BUILD_SALT=""
CONFIG_DEFAULT_INIT=""
CONFIG_DEFAULT_HOSTNAME="(none)"
# CONFIG_SYSVIPC is not set
# CONFIG_WATCH_QUEUE is not set
# CONFIG_CROSS_MEMORY_ATTACH is not set
# CONFIG_USELIB is not set
CONFIG_HAVE_ARCH_AUDITSYSCALL=y

#
# IRQ subsystem
#
CONFIG_GENERIC_IRQ_PROBE=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
CONFIG_GENERIC_IRQ_CHIP=y
CONFIG_IRQ_DOMAIN=y
CONFIG_IRQ_DOMAIN_HIERARCHY=y
CONFIG_IRQ_FASTEOI_HIERARCHY_HANDLERS=y
CONFIG_GENERIC_MSI_IRQ=y
CONFIG_GENERIC_MSI_IRQ_DOMAIN=y
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_SPARSE_IRQ=y
# end of IRQ subsystem

CONFIG_GENERIC_IRQ_MULTI_HANDLER=y
CONFIG_GENERIC_TIME_VSYSCALL=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CMOS_UPDATE=y
CONFIG_CONTEXT_TRACKING=y
CONFIG_CONTEXT_TRACKING_IDLE=y

#
# Timers subsystem
#
CONFIG_HZ_PERIODIC=y
# CONFIG_NO_HZ_IDLE is not set
# CONFIG_NO_HZ_FULL is not set
# CONFIG_NO_HZ is not set
# CONFIG_HIGH_RES_TIMERS is not set
# end of Timers subsystem

CONFIG_HAVE_EBPF_JIT=y

#
# BPF subsystem
#
# CONFIG_BPF_SYSCALL is not set
# end of BPF subsystem

CONFIG_PREEMPT_NONE_BUILD=y
CONFIG_PREEMPT_NONE=y
# CONFIG_PREEMPT_VOLUNTARY is not set
# CONFIG_PREEMPT is not set

#
# CPU/Task time and stats accounting
#
CONFIG_TICK_CPU_ACCOUNTING=y
# CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set
# CONFIG_IRQ_TIME_ACCOUNTING is not set
# CONFIG_BSD_PROCESS_ACCT is not set
# CONFIG_PSI is not set
# end of CPU/Task time and stats accounting

# CONFIG_CPU_ISOLATION is not set

#
# RCU Subsystem
#
CONFIG_TREE_RCU=y
# CONFIG_RCU_EXPERT is not set
CONFIG_SRCU=y
CONFIG_TREE_SRCU=y
CONFIG_RCU_STALL_COMMON=y
CONFIG_RCU_NEED_SEGCBLIST=y
# end of RCU Subsystem

# CONFIG_IKCONFIG is not set
# CONFIG_IKHEADERS is not set
CONFIG_LOG_BUF_SHIFT=17
CONFIG_LOG_CPU_MAX_BUF_SHIFT=12
CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=13
CONFIG_GENERIC_SCHED_CLOCK=y

#
# Scheduler features
#
# end of Scheduler features

CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y
CONFIG_CC_HAS_INT128=y
CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5"
CONFIG_GCC12_NO_ARRAY_BOUNDS=y
CONFIG_CC_NO_ARRAY_BOUNDS=y
# CONFIG_CGROUPS is not set
CONFIG_NAMESPACES=y
# CONFIG_UTS_NS is not set
# CONFIG_USER_NS is not set
# CONFIG_PID_NS is not set
# CONFIG_CHECKPOINT_RESTORE is not set
# CONFIG_SCHED_AUTOGROUP is not set
# CONFIG_SYSFS_DEPRECATED is not set
# CONFIG_RELAY is not set
# CONFIG_BLK_DEV_INITRD is not set
# CONFIG_BOOT_CONFIG is not set
# CONFIG_INITRAMFS_PRESERVE_MTIME is not set
CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
CONFIG_LD_ORPHAN_WARN=y
CONFIG_SYSCTL=y
CONFIG_SYSCTL_EXCEPTION_TRACE=y
# CONFIG_EXPERT is not set
CONFIG_MULTIUSER=y
CONFIG_SYSFS_SYSCALL=y
CONFIG_FHANDLE=y
CONFIG_POSIX_TIMERS=y
CONFIG_PRINTK=y
CONFIG_BUG=y
CONFIG_ELF_CORE=y
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_FUTEX_PI=y
CONFIG_EPOLL=y
CONFIG_SIGNALFD=y
CONFIG_TIMERFD=y
CONFIG_EVENTFD=y
CONFIG_SHMEM=y
CONFIG_AIO=y
CONFIG_IO_URING=y
CONFIG_ADVISE_SYSCALLS=y
CONFIG_MEMBARRIER=y
CONFIG_KALLSYMS=y
CONFIG_KALLSYMS_BASE_RELATIVE=y
CONFIG_RSEQ=y
# CONFIG_EMBEDDED is not set
CONFIG_HAVE_PERF_EVENTS=y
CONFIG_PERF_USE_VMALLOC=y

#
# Kernel Performance Events And Counters
#
# CONFIG_PERF_EVENTS is not set
# end of Kernel Performance Events And Counters

# CONFIG_PROFILING is not set
# end of General setup

CONFIG_LOONGARCH=y
CONFIG_64BIT=y
CONFIG_CPU_HAS_FPU=y
CONFIG_CPU_HAS_PREFETCH=y
CONFIG_GENERIC_BUG=y
CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y
CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_GENERIC_CSUM=y
CONFIG_GENERIC_HWEIGHT=y
CONFIG_L1_CACHE_SHIFT=6
CONFIG_LOCKDEP_SUPPORT=y
CONFIG_STACKTRACE_SUPPORT=y
CONFIG_MACH_LOONGSON64=y
CONFIG_FIX_EARLYCON_MEM=y
CONFIG_PAGE_SIZE_16KB=y
CONFIG_PGTABLE_3LEVEL=y
CONFIG_PGTABLE_LEVELS=3
CONFIG_SCHED_OMIT_FRAME_POINTER=y

#
# Kernel type and options
#
# CONFIG_HZ_100 is not set
CONFIG_HZ_250=y
# CONFIG_HZ_300 is not set
# CONFIG_HZ_1000 is not set
CONFIG_HZ=250
# CONFIG_4KB_3LEVEL is not set
# CONFIG_4KB_4LEVEL is not set
# CONFIG_16KB_2LEVEL is not set
CONFIG_16KB_3LEVEL=y
# CONFIG_64KB_2LEVEL is not set
# CONFIG_64KB_3LEVEL is not set
CONFIG_CMDLINE=""
CONFIG_CMDLINE_BOOTLOADER=y
# CONFIG_CMDLINE_EXTEND is not set
# CONFIG_CMDLINE_FORCE is not set
# CONFIG_DMI is not set
CONFIG_EFI=y
# CONFIG_EFI_STUB is not set
CONFIG_SMP=y
# CONFIG_HOTPLUG_CPU is not set
CONFIG_NR_CPUS=64
# CONFIG_NUMA is not set
CONFIG_ARCH_FORCE_MAX_ORDER=12
# CONFIG_ARCH_IOREMAP is not set
# CONFIG_KEXEC is not set
# CONFIG_CRASH_DUMP is not set
# CONFIG_SECCOMP is not set
# end of Kernel type and options

CONFIG_ARCH_SELECT_MEMORY_MODEL=y
CONFIG_ARCH_FLATMEM_ENABLE=y
CONFIG_ARCH_SPARSEMEM_ENABLE=y
CONFIG_MMU=y
CONFIG_ARCH_MMAP_RND_BITS_MIN=12
CONFIG_ARCH_MMAP_RND_BITS_MAX=18

#
# Power management options
#
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
# CONFIG_SUSPEND is not set
# CONFIG_PM is not set
CONFIG_CPU_PM=y
CONFIG_ARCH_SUPPORTS_ACPI=y
CONFIG_ACPI=y
CONFIG_ACPI_GENERIC_GSI=y
CONFIG_ACPI_SYSTEM_POWER_STATES_SUPPORT=y
# CONFIG_ACPI_DEBUGGER is not set
# CONFIG_ACPI_SPCR_TABLE is not set
# CONFIG_ACPI_EC_DEBUGFS is not set
# CONFIG_ACPI_AC is not set
# CONFIG_ACPI_BATTERY is not set
# CONFIG_ACPI_BUTTON is not set
# CONFIG_ACPI_TINY_POWER_BUTTON is not set
# CONFIG_ACPI_DOCK is not set
CONFIG_ACPI_MCFG=y
# CONFIG_ACPI_PROCESSOR is not set
CONFIG_ACPI_CUSTOM_DSDT_FILE=""
CONFIG_ARCH_HAS_ACPI_TABLE_UPGRADE=y
# CONFIG_ACPI_DEBUG is not set
# CONFIG_ACPI_PCI_SLOT is not set
# CONFIG_ACPI_CONTAINER is not set
# CONFIG_ACPI_HED is not set
# CONFIG_ACPI_CONFIGFS is not set
# CONFIG_ACPI_PFRUT is not set
# CONFIG_PMIC_OPREGION is not set
# end of Power management options

#
# Firmware Drivers
#

#
# ARM System Control and Management Interface Protocol
#
# end of ARM System Control and Management Interface Protocol

# CONFIG_SYSFB_SIMPLEFB is not set
# CONFIG_GOOGLE_FIRMWARE is not set

#
# EFI (Extensible Firmware Interface) Support
#
CONFIG_EFI_ESRT=y
CONFIG_EFI_RUNTIME_WRAPPERS=y
# CONFIG_EFI_BOOTLOADER_CONTROL is not set
# CONFIG_EFI_CAPSULE_LOADER is not set
# CONFIG_EFI_TEST is not set
# CONFIG_EFI_DISABLE_PCI_DMA is not set
# CONFIG_EFI_CUSTOM_SSDT_OVERLAYS is not set
# CONFIG_EFI_DISABLE_RUNTIME is not set
# CONFIG_EFI_COCO_SECRET is not set
# end of EFI (Extensible Firmware Interface) Support

#
# Tegra firmware driver
#
# end of Tegra firmware driver
# end of Firmware Drivers

#
# General architecture-dependent options
#
CONFIG_GENERIC_ENTRY=y
CONFIG_HAVE_64BIT_ALIGNED_ACCESS=y
CONFIG_ARCH_USE_BUILTIN_BSWAP=y
CONFIG_HAVE_IOREMAP_PROT=y
CONFIG_HAVE_NMI=y
CONFIG_TRACE_IRQFLAGS_SUPPORT=y
CONFIG_HAVE_ARCH_TRACEHOOK=y
CONFIG_HAVE_DMA_CONTIGUOUS=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y
CONFIG_ARCH_WANTS_NO_INSTR=y
CONFIG_HAVE_ASM_MODVERSIONS=y
CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
CONFIG_HAVE_RSEQ=y
CONFIG_HAVE_PERF_REGS=y
CONFIG_HAVE_PERF_USER_STACK_DUMP=y
CONFIG_MMU_GATHER_MERGE_VMAS=y
CONFIG_HAVE_ARCH_SECCOMP=y
CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
CONFIG_LTO_NONE=y
CONFIG_HAVE_CONTEXT_TRACKING_USER=y
CONFIG_HAVE_TIF_NOHZ=y
CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y
CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
CONFIG_HAVE_IRQ_EXIT_ON_IRQ_STACK=y
CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
CONFIG_HAVE_ARCH_MMAP_RND_BITS=y
CONFIG_HAVE_EXIT_THREAD=y
CONFIG_ARCH_MMAP_RND_BITS=12
CONFIG_PAGE_SIZE_LESS_THAN_64KB=y
CONFIG_PAGE_SIZE_LESS_THAN_256KB=y
CONFIG_ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT=y
# CONFIG_COMPAT_32BIT_TIME is not set
CONFIG_ARCH_WANT_LD_ORPHAN_WARN=y

#
# GCOV-based kernel profiling
#
# end of GCOV-based kernel profiling
# end of General architecture-dependent options

CONFIG_RT_MUTEXES=y
CONFIG_BASE_SMALL=0
# CONFIG_MODULES is not set
CONFIG_BLOCK=y
# CONFIG_BLOCK_LEGACY_AUTOLOAD is not set
# CONFIG_BLK_DEV_BSGLIB is not set
# CONFIG_BLK_DEV_INTEGRITY is not set
# CONFIG_BLK_DEV_ZONED is not set
# CONFIG_BLK_WBT is not set
# CONFIG_BLK_SED_OPAL is not set
# CONFIG_BLK_INLINE_ENCRYPTION is not set

#
# Partition Types
#
# CONFIG_PARTITION_ADVANCED is not set
CONFIG_MSDOS_PARTITION=y
CONFIG_EFI_PARTITION=y
# end of Partition Types

CONFIG_BLK_MQ_PCI=y

#
# IO Schedulers
#
# CONFIG_MQ_IOSCHED_DEADLINE is not set
# CONFIG_MQ_IOSCHED_KYBER is not set
# CONFIG_IOSCHED_BFQ is not set
# end of IO Schedulers

CONFIG_ARCH_INLINE_SPIN_TRYLOCK=y
CONFIG_ARCH_INLINE_SPIN_TRYLOCK_BH=y
CONFIG_ARCH_INLINE_SPIN_LOCK=y
CONFIG_ARCH_INLINE_SPIN_LOCK_BH=y
CONFIG_ARCH_INLINE_SPIN_LOCK_IRQ=y
CONFIG_ARCH_INLINE_SPIN_LOCK_IRQSAVE=y
CONFIG_ARCH_INLINE_SPIN_UNLOCK=y
CONFIG_ARCH_INLINE_SPIN_UNLOCK_BH=y
CONFIG_ARCH_INLINE_SPIN_UNLOCK_IRQ=y
CONFIG_ARCH_INLINE_SPIN_UNLOCK_IRQRESTORE=y
CONFIG_ARCH_INLINE_READ_LOCK=y
CONFIG_ARCH_INLINE_READ_LOCK_BH=y
CONFIG_ARCH_INLINE_READ_LOCK_IRQ=y
CONFIG_ARCH_INLINE_READ_LOCK_IRQSAVE=y
CONFIG_ARCH_INLINE_READ_UNLOCK=y
CONFIG_ARCH_INLINE_READ_UNLOCK_BH=y
CONFIG_ARCH_INLINE_READ_UNLOCK_IRQ=y
CONFIG_ARCH_INLINE_READ_UNLOCK_IRQRESTORE=y
CONFIG_ARCH_INLINE_WRITE_LOCK=y
CONFIG_ARCH_INLINE_WRITE_LOCK_BH=y
CONFIG_ARCH_INLINE_WRITE_LOCK_IRQ=y
CONFIG_ARCH_INLINE_WRITE_LOCK_IRQSAVE=y
CONFIG_ARCH_INLINE_WRITE_UNLOCK=y
CONFIG_ARCH_INLINE_WRITE_UNLOCK_BH=y
CONFIG_ARCH_INLINE_WRITE_UNLOCK_IRQ=y
CONFIG_ARCH_INLINE_WRITE_UNLOCK_IRQRESTORE=y
CONFIG_INLINE_SPIN_TRYLOCK=y
CONFIG_INLINE_SPIN_TRYLOCK_BH=y
CONFIG_INLINE_SPIN_LOCK=y
CONFIG_INLINE_SPIN_LOCK_BH=y
CONFIG_INLINE_SPIN_LOCK_IRQ=y
CONFIG_INLINE_SPIN_LOCK_IRQSAVE=y
CONFIG_INLINE_SPIN_UNLOCK_BH=y
CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE=y
CONFIG_INLINE_READ_LOCK=y
CONFIG_INLINE_READ_LOCK_BH=y
CONFIG_INLINE_READ_LOCK_IRQ=y
CONFIG_INLINE_READ_LOCK_IRQSAVE=y
CONFIG_INLINE_READ_UNLOCK=y
CONFIG_INLINE_READ_UNLOCK_BH=y
CONFIG_INLINE_READ_UNLOCK_IRQ=y
CONFIG_INLINE_READ_UNLOCK_IRQRESTORE=y
CONFIG_INLINE_WRITE_LOCK=y
CONFIG_INLINE_WRITE_LOCK_BH=y
CONFIG_INLINE_WRITE_LOCK_IRQ=y
CONFIG_INLINE_WRITE_LOCK_IRQSAVE=y
CONFIG_INLINE_WRITE_UNLOCK=y
CONFIG_INLINE_WRITE_UNLOCK_BH=y
CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE=y
CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y
CONFIG_MUTEX_SPIN_ON_OWNER=y
CONFIG_RWSEM_SPIN_ON_OWNER=y
CONFIG_LOCK_SPIN_ON_OWNER=y
CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y
CONFIG_QUEUED_SPINLOCKS=y
CONFIG_ARCH_USE_QUEUED_RWLOCKS=y
CONFIG_QUEUED_RWLOCKS=y

#
# Executable file formats
#
# CONFIG_BINFMT_ELF is not set
CONFIG_ARCH_BINFMT_ELF_STATE=y
# CONFIG_BINFMT_SCRIPT is not set
# CONFIG_BINFMT_MISC is not set
CONFIG_COREDUMP=y
# end of Executable file formats

#
# Memory Management options
#
# CONFIG_SWAP is not set

#
# SLAB allocator options
#
# CONFIG_SLAB is not set
CONFIG_SLUB=y
# CONFIG_SLAB_MERGE_DEFAULT is not set
# CONFIG_SLAB_FREELIST_RANDOM is not set
# CONFIG_SLAB_FREELIST_HARDENED is not set
# CONFIG_SLUB_STATS is not set
# CONFIG_SLUB_CPU_PARTIAL is not set
# end of SLAB allocator options

# CONFIG_SHUFFLE_PAGE_ALLOCATOR is not set
# CONFIG_COMPAT_BRK is not set
CONFIG_SELECT_MEMORY_MODEL=y
CONFIG_FLATMEM_MANUAL=y
# CONFIG_SPARSEMEM_MANUAL is not set
CONFIG_FLATMEM=y
CONFIG_HAVE_FAST_GUP=y
CONFIG_ARCH_KEEP_MEMBLOCK=y
CONFIG_EXCLUSIVE_SYSTEM_RAM=y
CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
CONFIG_SPLIT_PTLOCK_CPUS=4
# CONFIG_COMPACTION is not set
# CONFIG_PAGE_REPORTING is not set
# CONFIG_MIGRATION is not set
CONFIG_PHYS_ADDR_T_64BIT=y
# CONFIG_KSM is not set
CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
# CONFIG_TRANSPARENT_HUGEPAGE is not set
CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y
CONFIG_NEED_PER_CPU_PAGE_FIRST_CHUNK=y
CONFIG_USE_PERCPU_NUMA_NODE_ID=y
# CONFIG_CMA is not set
# CONFIG_IDLE_PAGE_TRACKING is not set
CONFIG_ZONE_DMA32=y
CONFIG_VM_EVENT_COUNTERS=y
# CONFIG_PERCPU_STATS is not set

#
# GUP_TEST needs to have DEBUG_FS enabled
#
CONFIG_ARCH_HAS_PTE_SPECIAL=y
# CONFIG_ANON_VMA_NAME is not set
# CONFIG_USERFAULTFD is not set
# CONFIG_LRU_GEN is not set

#
# Data Access Monitoring
#
# CONFIG_DAMON is not set
# end of Data Access Monitoring
# end of Memory Management options

# CONFIG_NET is not set

#
# Device Drivers
#
CONFIG_HAVE_PCI=y
CONFIG_PCI=y
CONFIG_PCI_DOMAINS=y
CONFIG_PCI_DOMAINS_GENERIC=y
# CONFIG_PCIEPORTBUS is not set
CONFIG_PCIEASPM=y
CONFIG_PCIEASPM_DEFAULT=y
# CONFIG_PCIEASPM_POWERSAVE is not set
# CONFIG_PCIEASPM_POWER_SUPERSAVE is not set
# CONFIG_PCIEASPM_PERFORMANCE is not set
# CONFIG_PCIE_PTM is not set
CONFIG_PCI_MSI=y
CONFIG_PCI_MSI_IRQ_DOMAIN=y
CONFIG_PCI_MSI_ARCH_FALLBACKS=y
CONFIG_PCI_QUIRKS=y
# CONFIG_PCI_STUB is not set
CONFIG_PCI_ECAM=y
# CONFIG_PCI_IOV is not set
# CONFIG_PCI_PRI is not set
# CONFIG_PCI_PASID is not set
CONFIG_PCI_LABEL=y
CONFIG_VGA_ARB=y
CONFIG_VGA_ARB_MAX_GPUS=16
# CONFIG_HOTPLUG_PCI is not set

#
# PCI controller drivers
#
CONFIG_PCI_LOONGSON=y

#
# DesignWare PCI Core Support
#
# CONFIG_PCIE_DW_PLAT_HOST is not set
# CONFIG_PCI_MESON is not set
# end of DesignWare PCI Core Support

#
# Mobiveil PCIe Core Support
#
# end of Mobiveil PCIe Core Support

#
# Cadence PCIe controllers support
#
# end of Cadence PCIe controllers support
# end of PCI controller drivers

#
# PCI Endpoint
#
# CONFIG_PCI_ENDPOINT is not set
# end of PCI Endpoint

#
# PCI switch controller drivers
#
# CONFIG_PCI_SW_SWITCHTEC is not set
# end of PCI switch controller drivers

# CONFIG_CXL_BUS is not set
# CONFIG_PCCARD is not set
# CONFIG_RAPIDIO is not set

#
# Generic Driver Options
#
# CONFIG_UEVENT_HELPER is not set
# CONFIG_DEVTMPFS is not set
# CONFIG_STANDALONE is not set
# CONFIG_PREVENT_FIRMWARE_BUILD is not set

#
# Firmware loader
#
CONFIG_FW_LOADER=y
CONFIG_EXTRA_FIRMWARE=""
# CONFIG_FW_LOADER_USER_HELPER is not set
# CONFIG_FW_LOADER_COMPRESS is not set
# CONFIG_FW_UPLOAD is not set
# end of Firmware loader

CONFIG_ALLOW_DEV_COREDUMP=y
CONFIG_GENERIC_CPU_AUTOPROBE=y
# end of Generic Driver Options

#
# Bus devices
#
# CONFIG_MHI_BUS is not set
# CONFIG_MHI_BUS_EP is not set
# end of Bus devices

#
# Firmware Drivers
#

#
# ARM System Control and Management Interface Protocol
#
# end of ARM System Control and Management Interface Protocol

#
# EFI (Extensible Firmware Interface) Support
#
# end of EFI (Extensible Firmware Interface) Support

#
# Tegra firmware driver
#
# end of Tegra firmware driver
# end of Firmware Drivers

# CONFIG_GNSS is not set
# CONFIG_MTD is not set
# CONFIG_OF is not set
CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
# CONFIG_PARPORT is not set
CONFIG_PNP=y
# CONFIG_PNP_DEBUG_MESSAGES is not set

#
# Protocols
#
CONFIG_PNPACPI=y
# CONFIG_BLK_DEV is not set

#
# NVME Support
#
# CONFIG_BLK_DEV_NVME is not set
# CONFIG_NVME_FC is not set
# end of NVME Support

#
# Misc devices
#
# CONFIG_DUMMY_IRQ is not set
# CONFIG_PHANTOM is not set
# CONFIG_TIFM_CORE is not set
# CONFIG_ENCLOSURE_SERVICES is not set
# CONFIG_HP_ILO is not set
# CONFIG_SRAM is not set
# CONFIG_DW_XDATA_PCIE is not set
# CONFIG_PCI_ENDPOINT_TEST is not set
# CONFIG_XILINX_SDFEC is not set
# CONFIG_C2PORT is not set

#
# EEPROM support
#
# CONFIG_EEPROM_93CX6 is not set
# end of EEPROM support

# CONFIG_CB710_CORE is not set

#
# Texas Instruments shared transport line discipline
#
# end of Texas Instruments shared transport line discipline

#
# Altera FPGA firmware download module (requires I2C)
#
# CONFIG_GENWQE is not set
# CONFIG_ECHO is not set
# CONFIG_BCM_VK is not set
# CONFIG_MISC_ALCOR_PCI is not set
# CONFIG_MISC_RTSX_PCI is not set
# CONFIG_HABANA_AI is not set
# CONFIG_PVPANIC is not set
# CONFIG_GP_PCI1XXXX is not set
# end of Misc devices

#
# SCSI device support
#
CONFIG_SCSI_MOD=y
# CONFIG_RAID_ATTRS is not set
# CONFIG_SCSI is not set
# end of SCSI device support

# CONFIG_ATA is not set
# CONFIG_MD is not set
# CONFIG_TARGET_CORE is not set
# CONFIG_FUSION is not set

#
# IEEE 1394 (FireWire) support
#
# CONFIG_FIREWIRE is not set
# CONFIG_FIREWIRE_NOSY is not set
# end of IEEE 1394 (FireWire) support

#
# Input device support
#
CONFIG_INPUT=y
# CONFIG_INPUT_FF_MEMLESS is not set
# CONFIG_INPUT_SPARSEKMAP is not set
# CONFIG_INPUT_MATRIXKMAP is not set

#
# Userland interfaces
#
# CONFIG_INPUT_MOUSEDEV is not set
# CONFIG_INPUT_JOYDEV is not set
# CONFIG_INPUT_EVDEV is not set
# CONFIG_INPUT_EVBUG is not set

#
# Input Device Drivers
#
# CONFIG_INPUT_KEYBOARD is not set
# CONFIG_INPUT_MOUSE is not set
# CONFIG_INPUT_JOYSTICK is not set
# CONFIG_INPUT_TABLET is not set
# CONFIG_INPUT_TOUCHSCREEN is not set
# CONFIG_INPUT_MISC is not set
# CONFIG_RMI4_CORE is not set

#
# Hardware I/O ports
#
# CONFIG_SERIO is not set
CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y
# CONFIG_GAMEPORT is not set
# end of Hardware I/O ports
# end of Input device support

#
# Character devices
#
CONFIG_TTY=y
CONFIG_VT=y
CONFIG_CONSOLE_TRANSLATIONS=y
CONFIG_VT_CONSOLE=y
CONFIG_HW_CONSOLE=y
# CONFIG_VT_HW_CONSOLE_BINDING is not set
CONFIG_UNIX98_PTYS=y
# CONFIG_LEGACY_PTYS is not set
# CONFIG_LDISC_AUTOLOAD is not set

#
# Serial drivers
#
# CONFIG_SERIAL_8250 is not set

#
# Non-8250 serial port support
#
# CONFIG_SERIAL_UARTLITE is not set
# CONFIG_SERIAL_JSM is not set
# CONFIG_SERIAL_SCCNXP is not set
# CONFIG_SERIAL_ALTERA_JTAGUART is not set
# CONFIG_SERIAL_ALTERA_UART is not set
# CONFIG_SERIAL_ARC is not set
# CONFIG_SERIAL_RP2 is not set
# CONFIG_SERIAL_FSL_LPUART is not set
# CONFIG_SERIAL_FSL_LINFLEXUART is not set
# CONFIG_SERIAL_SPRD is not set
# end of Serial drivers

# CONFIG_SERIAL_NONSTANDARD is not set
# CONFIG_NOZOMI is not set
# CONFIG_NULL_TTY is not set
# CONFIG_SERIAL_DEV_BUS is not set
# CONFIG_VIRTIO_CONSOLE is not set
# CONFIG_IPMI_HANDLER is not set
# CONFIG_HW_RANDOM is not set
# CONFIG_APPLICOM is not set
# CONFIG_DEVMEM is not set
# CONFIG_DEVPORT is not set
# CONFIG_TCG_TPM is not set
# CONFIG_XILLYBUS is not set
# CONFIG_RANDOM_TRUST_CPU is not set
# CONFIG_RANDOM_TRUST_BOOTLOADER is not set
# end of Character devices

#
# I2C support
#
# CONFIG_I2C is not set
# end of I2C support

# CONFIG_I3C is not set
# CONFIG_SPI is not set
# CONFIG_SPMI is not set
# CONFIG_HSI is not set
# CONFIG_PPS is not set

#
# PTP clock support
#
CONFIG_PTP_1588_CLOCK_OPTIONAL=y

#
# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks.
#
# end of PTP clock support

# CONFIG_PINCTRL is not set
CONFIG_GPIOLIB=y
CONFIG_GPIOLIB_FASTPATH_LIMIT=512
CONFIG_GPIO_ACPI=y
CONFIG_GPIO_CDEV=y
# CONFIG_GPIO_CDEV_V1 is not set

#
# Memory mapped GPIO drivers
#
# CONFIG_GPIO_AMDPT is not set
# CONFIG_GPIO_DWAPB is not set
# CONFIG_GPIO_GENERIC_PLATFORM is not set
# CONFIG_GPIO_MB86S7X is not set
# CONFIG_GPIO_AMD_FCH is not set
# end of Memory mapped GPIO drivers

#
# MFD GPIO expanders
#
# end of MFD GPIO expanders

#
# PCI GPIO expanders
#
# CONFIG_GPIO_BT8XX is not set
# CONFIG_GPIO_PCI_IDIO_16 is not set
# CONFIG_GPIO_PCIE_IDIO_24 is not set
# CONFIG_GPIO_RDC321X is not set
# end of PCI GPIO expanders

#
# Virtual GPIO drivers
#
# CONFIG_GPIO_AGGREGATOR is not set
# CONFIG_GPIO_MOCKUP is not set
# CONFIG_GPIO_SIM is not set
# end of Virtual GPIO drivers

# CONFIG_W1 is not set
# CONFIG_POWER_RESET is not set
# CONFIG_POWER_SUPPLY is not set
# CONFIG_HWMON is not set
# CONFIG_THERMAL is not set
# CONFIG_WATCHDOG is not set
CONFIG_SSB_POSSIBLE=y
# CONFIG_SSB is not set
CONFIG_BCMA_POSSIBLE=y
# CONFIG_BCMA is not set

#
# Multifunction device drivers
#
# CONFIG_MFD_MADERA is not set
# CONFIG_HTC_PASIC3 is not set
# CONFIG_LPC_ICH is not set
# CONFIG_LPC_SCH is not set
# CONFIG_MFD_JANZ_CMODIO is not set
# CONFIG_MFD_KEMPLD is not set
# CONFIG_MFD_MT6397 is not set
# CONFIG_MFD_RDC321X is not set
# CONFIG_MFD_SM501 is not set
# CONFIG_MFD_SYSCON is not set
# CONFIG_MFD_TI_AM335X_TSCADC is not set
# CONFIG_MFD_TQMX86 is not set
# CONFIG_MFD_VX855 is not set
# end of Multifunction device drivers

# CONFIG_REGULATOR is not set
# CONFIG_RC_CORE is not set

#
# CEC support
#
# CONFIG_MEDIA_CEC_SUPPORT is not set
# end of CEC support

# CONFIG_MEDIA_SUPPORT is not set

#
# Graphics support
#
# CONFIG_DRM is not set

#
# ARM devices
#
# end of ARM devices

#
# Frame buffer Devices
#
# CONFIG_FB is not set
# end of Frame buffer Devices

#
# Backlight & LCD device support
#
# CONFIG_LCD_CLASS_DEVICE is not set
# CONFIG_BACKLIGHT_CLASS_DEVICE is not set
# end of Backlight & LCD device support

#
# Console display driver support
#
# CONFIG_VGA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
CONFIG_DUMMY_CONSOLE_COLUMNS=80
CONFIG_DUMMY_CONSOLE_ROWS=25
# end of Console display driver support
# end of Graphics support

# CONFIG_SOUND is not set

#
# HID support
#
# CONFIG_HID is not set
# end of HID support

CONFIG_USB_OHCI_LITTLE_ENDIAN=y
# CONFIG_USB_SUPPORT is not set
# CONFIG_MMC is not set
# CONFIG_MEMSTICK is not set
# CONFIG_NEW_LEDS is not set
# CONFIG_ACCESSIBILITY is not set
CONFIG_RTC_LIB=y
# CONFIG_RTC_CLASS is not set
# CONFIG_DMADEVICES is not set

#
# DMABUF options
#
# CONFIG_SYNC_FILE is not set
# CONFIG_DMABUF_HEAPS is not set
# end of DMABUF options

# CONFIG_AUXDISPLAY is not set
# CONFIG_UIO is not set
# CONFIG_VFIO is not set
# CONFIG_VIRT_DRIVERS is not set
# CONFIG_VIRTIO_MENU is not set
# CONFIG_VHOST_MENU is not set

#
# Microsoft Hyper-V guest support
#
# end of Microsoft Hyper-V guest support

# CONFIG_GREYBUS is not set
# CONFIG_COMEDI is not set
# CONFIG_STAGING is not set
# CONFIG_LOONGARCH_PLATFORM_DEVICES is not set
# CONFIG_GOLDFISH is not set
CONFIG_HAVE_CLK=y
CONFIG_HAVE_CLK_PREPARE=y
CONFIG_COMMON_CLK=y
# CONFIG_XILINX_VCU is not set
# CONFIG_HWSPINLOCK is not set

#
# Clock Source drivers
#
# end of Clock Source drivers

# CONFIG_MAILBOX is not set
# CONFIG_IOMMU_SUPPORT is not set

#
# Remoteproc drivers
#
# CONFIG_REMOTEPROC is not set
# end of Remoteproc drivers

#
# Rpmsg drivers
#
# CONFIG_RPMSG_VIRTIO is not set
# end of Rpmsg drivers

# CONFIG_SOUNDWIRE is not set

#
# SOC (System On Chip) specific Drivers
#

#
# Amlogic SoC drivers
#
# end of Amlogic SoC drivers

#
# Broadcom SoC drivers
#
# end of Broadcom SoC drivers

#
# NXP/Freescale QorIQ SoC drivers
#
# end of NXP/Freescale QorIQ SoC drivers

#
# fujitsu SoC drivers
#
# end of fujitsu SoC drivers

#
# i.MX SoC drivers
#
# end of i.MX SoC drivers

#
# Enable LiteX SoC Builder specific drivers
#
# end of Enable LiteX SoC Builder specific drivers

#
# Qualcomm SoC drivers
#
# end of Qualcomm SoC drivers

# CONFIG_SOC_TI is not set

#
# Xilinx SoC drivers
#
# end of Xilinx SoC drivers
# end of SOC (System On Chip) specific Drivers

# CONFIG_PM_DEVFREQ is not set
# CONFIG_EXTCON is not set
# CONFIG_MEMORY is not set
# CONFIG_IIO is not set
# CONFIG_NTB is not set
# CONFIG_PWM is not set

#
# IRQ chip support
#
CONFIG_IRQCHIP=y
CONFIG_IRQ_LOONGARCH_CPU=y
CONFIG_LOONGSON_LIOINTC=y
CONFIG_LOONGSON_EIOINTC=y
# CONFIG_LOONGSON_HTVEC is not set
CONFIG_LOONGSON_PCH_PIC=y
CONFIG_LOONGSON_PCH_MSI=y
CONFIG_LOONGSON_PCH_LPC=y
# end of IRQ chip support

# CONFIG_IPACK_BUS is not set
# CONFIG_RESET_CONTROLLER is not set

#
# PHY Subsystem
#
# CONFIG_GENERIC_PHY is not set
# CONFIG_PHY_CAN_TRANSCEIVER is not set

#
# PHY drivers for Broadcom platforms
#
# CONFIG_BCM_KONA_USB2_PHY is not set
# end of PHY drivers for Broadcom platforms

# CONFIG_PHY_PXA_28NM_HSIC is not set
# CONFIG_PHY_PXA_28NM_USB2 is not set
# end of PHY Subsystem

# CONFIG_POWERCAP is not set
# CONFIG_MCB is not set
# CONFIG_RAS is not set
# CONFIG_USB4 is not set

#
# Android
#
# CONFIG_ANDROID_BINDER_IPC is not set
# end of Android

# CONFIG_DAX is not set
# CONFIG_NVMEM is not set

#
# HW tracing support
#
# CONFIG_STM is not set
# CONFIG_INTEL_TH is not set
# end of HW tracing support

# CONFIG_FPGA is not set
# CONFIG_SIOX is not set
# CONFIG_SLIMBUS is not set
# CONFIG_INTERCONNECT is not set
# CONFIG_COUNTER is not set
# CONFIG_PECI is not set
# CONFIG_HTE is not set
# end of Device Drivers

#
# File systems
#
# CONFIG_VALIDATE_FS_PARSER is not set
# CONFIG_EXT2_FS is not set
# CONFIG_EXT3_FS is not set
# CONFIG_EXT4_FS is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
# CONFIG_XFS_FS is not set
# CONFIG_GFS2_FS is not set
# CONFIG_BTRFS_FS is not set
# CONFIG_NILFS2_FS is not set
# CONFIG_F2FS_FS is not set
CONFIG_EXPORTFS=y
# CONFIG_EXPORTFS_BLOCK_OPS is not set
CONFIG_FILE_LOCKING=y
# CONFIG_FS_ENCRYPTION is not set
# CONFIG_FS_VERITY is not set
# CONFIG_DNOTIFY is not set
# CONFIG_INOTIFY_USER is not set
# CONFIG_FANOTIFY is not set
# CONFIG_QUOTA is not set
# CONFIG_AUTOFS4_FS is not set
# CONFIG_AUTOFS_FS is not set
# CONFIG_FUSE_FS is not set
# CONFIG_OVERLAY_FS is not set

#
# Caches
#
# CONFIG_FSCACHE is not set
# end of Caches

#
# CD-ROM/DVD Filesystems
#
# CONFIG_ISO9660_FS is not set
# CONFIG_UDF_FS is not set
# end of CD-ROM/DVD Filesystems

#
# DOS/FAT/EXFAT/NT Filesystems
#
# CONFIG_MSDOS_FS is not set
# CONFIG_VFAT_FS is not set
# CONFIG_EXFAT_FS is not set
# CONFIG_NTFS_FS is not set
# CONFIG_NTFS3_FS is not set
# end of DOS/FAT/EXFAT/NT Filesystems

#
# Pseudo filesystems
#
CONFIG_PROC_FS=y
# CONFIG_PROC_KCORE is not set
CONFIG_PROC_SYSCTL=y
CONFIG_PROC_PAGE_MONITOR=y
# CONFIG_PROC_CHILDREN is not set
CONFIG_KERNFS=y
CONFIG_SYSFS=y
# CONFIG_TMPFS is not set
CONFIG_ARCH_SUPPORTS_HUGETLBFS=y
# CONFIG_HUGETLBFS is not set
# CONFIG_CONFIGFS_FS is not set
# CONFIG_EFIVAR_FS is not set
# end of Pseudo filesystems

# CONFIG_MISC_FILESYSTEMS is not set
CONFIG_NLS=y
CONFIG_NLS_DEFAULT="iso8859-1"
# CONFIG_NLS_CODEPAGE_437 is not set
# CONFIG_NLS_CODEPAGE_737 is not set
# CONFIG_NLS_CODEPAGE_775 is not set
# CONFIG_NLS_CODEPAGE_850 is not set
# CONFIG_NLS_CODEPAGE_852 is not set
# CONFIG_NLS_CODEPAGE_855 is not set
# CONFIG_NLS_CODEPAGE_857 is not set
# CONFIG_NLS_CODEPAGE_860 is not set
# CONFIG_NLS_CODEPAGE_861 is not set
# CONFIG_NLS_CODEPAGE_862 is not set
# CONFIG_NLS_CODEPAGE_863 is not set
# CONFIG_NLS_CODEPAGE_864 is not set
# CONFIG_NLS_CODEPAGE_865 is not set
# CONFIG_NLS_CODEPAGE_866 is not set
# CONFIG_NLS_CODEPAGE_869 is not set
# CONFIG_NLS_CODEPAGE_936 is not set
# CONFIG_NLS_CODEPAGE_950 is not set
# CONFIG_NLS_CODEPAGE_932 is not set
# CONFIG_NLS_CODEPAGE_949 is not set
# CONFIG_NLS_CODEPAGE_874 is not set
# CONFIG_NLS_ISO8859_8 is not set
# CONFIG_NLS_CODEPAGE_1250 is not set
# CONFIG_NLS_CODEPAGE_1251 is not set
# CONFIG_NLS_ASCII is not set
# CONFIG_NLS_ISO8859_1 is not set
# CONFIG_NLS_ISO8859_2 is not set
# CONFIG_NLS_ISO8859_3 is not set
# CONFIG_NLS_ISO8859_4 is not set
# CONFIG_NLS_ISO8859_5 is not set
# CONFIG_NLS_ISO8859_6 is not set
# CONFIG_NLS_ISO8859_7 is not set
# CONFIG_NLS_ISO8859_9 is not set
# CONFIG_NLS_ISO8859_13 is not set
# CONFIG_NLS_ISO8859_14 is not set
# CONFIG_NLS_ISO8859_15 is not set
# CONFIG_NLS_KOI8_R is not set
# CONFIG_NLS_KOI8_U is not set
# CONFIG_NLS_MAC_ROMAN is not set
# CONFIG_NLS_MAC_CELTIC is not set
# CONFIG_NLS_MAC_CENTEURO is not set
# CONFIG_NLS_MAC_CROATIAN is not set
# CONFIG_NLS_MAC_CYRILLIC is not set
# CONFIG_NLS_MAC_GAELIC is not set
# CONFIG_NLS_MAC_GREEK is not set
# CONFIG_NLS_MAC_ICELAND is not set
# CONFIG_NLS_MAC_INUIT is not set
# CONFIG_NLS_MAC_ROMANIAN is not set
# CONFIG_NLS_MAC_TURKISH is not set
# CONFIG_NLS_UTF8 is not set
# CONFIG_UNICODE is not set
CONFIG_IO_WQ=y
# end of File systems

#
# Security options
#
# CONFIG_KEYS is not set
# CONFIG_SECURITY_DMESG_RESTRICT is not set
# CONFIG_SECURITY is not set
# CONFIG_SECURITYFS is not set
CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR=y
# CONFIG_HARDENED_USERCOPY is not set
# CONFIG_STATIC_USERMODEHELPER is not set
CONFIG_DEFAULT_SECURITY_DAC=y
CONFIG_LSM="landlock,lockdown,yama,loadpin,safesetid,integrity,bpf"

#
# Kernel hardening options
#

#
# Memory initialization
#
CONFIG_CC_HAS_AUTO_VAR_INIT_PATTERN=y
CONFIG_CC_HAS_AUTO_VAR_INIT_ZERO_BARE=y
CONFIG_CC_HAS_AUTO_VAR_INIT_ZERO=y
# CONFIG_INIT_STACK_NONE is not set
# CONFIG_INIT_STACK_ALL_PATTERN is not set
CONFIG_INIT_STACK_ALL_ZERO=y
# CONFIG_INIT_ON_ALLOC_DEFAULT_ON is not set
# CONFIG_INIT_ON_FREE_DEFAULT_ON is not set
CONFIG_CC_HAS_ZERO_CALL_USED_REGS=y
# CONFIG_ZERO_CALL_USED_REGS is not set
# end of Memory initialization

CONFIG_RANDSTRUCT_NONE=y
# end of Kernel hardening options
# end of Security options

# CONFIG_CRYPTO is not set

#
# Library routines
#
# CONFIG_PACKING is not set
CONFIG_BITREVERSE=y
CONFIG_GENERIC_STRNCPY_FROM_USER=y
CONFIG_GENERIC_STRNLEN_USER=y
# CONFIG_CORDIC is not set
# CONFIG_PRIME_NUMBERS is not set
CONFIG_RATIONAL=y
CONFIG_GENERIC_PCI_IOMAP=y
CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y

#
# Crypto library routines
#
CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y
# CONFIG_CRYPTO_LIB_CHACHA is not set
# CONFIG_CRYPTO_LIB_CURVE25519 is not set
CONFIG_CRYPTO_LIB_POLY1305_RSIZE=1
# CONFIG_CRYPTO_LIB_POLY1305 is not set
# end of Crypto library routines

# CONFIG_CRC_CCITT is not set
# CONFIG_CRC16 is not set
# CONFIG_CRC_T10DIF is not set
# CONFIG_CRC64_ROCKSOFT is not set
# CONFIG_CRC_ITU_T is not set
CONFIG_CRC32=y
# CONFIG_CRC32_SELFTEST is not set
CONFIG_CRC32_SLICEBY8=y
# CONFIG_CRC32_SLICEBY4 is not set
# CONFIG_CRC32_SARWATE is not set
# CONFIG_CRC32_BIT is not set
# CONFIG_CRC64 is not set
# CONFIG_CRC4 is not set
# CONFIG_CRC7 is not set
# CONFIG_LIBCRC32C is not set
# CONFIG_CRC8 is not set
# CONFIG_RANDOM32_SELFTEST is not set
# CONFIG_XZ_DEC is not set
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT_MAP=y
CONFIG_HAS_DMA=y
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_ARCH_DMA_ADDR_T_64BIT=y
CONFIG_SWIOTLB=y
# CONFIG_DMA_API_DEBUG is not set
# CONFIG_FORCE_NR_CPUS is not set
# CONFIG_IRQ_POLL is not set
CONFIG_UCS2_STRING=y
CONFIG_HAVE_GENERIC_VDSO=y
CONFIG_GENERIC_GETTIMEOFDAY=y
CONFIG_ARCH_STACKWALK=y
CONFIG_STACKDEPOT=y
CONFIG_SBITMAP=y
# end of Library routines

CONFIG_GENERIC_IOREMAP=y
CONFIG_GENERIC_LIB_ASHLDI3=y
CONFIG_GENERIC_LIB_ASHRDI3=y
CONFIG_GENERIC_LIB_LSHRDI3=y
CONFIG_GENERIC_LIB_CMPDI2=y
CONFIG_GENERIC_LIB_UCMPDI2=y
CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y

#
# Kernel hacking
#

#
# printk and dmesg options
#
# CONFIG_PRINTK_TIME is not set
# CONFIG_PRINTK_CALLER is not set
# CONFIG_STACKTRACE_BUILD_ID is not set
CONFIG_CONSOLE_LOGLEVEL_DEFAULT=7
CONFIG_CONSOLE_LOGLEVEL_QUIET=4
CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4
# CONFIG_DYNAMIC_DEBUG is not set
# CONFIG_DYNAMIC_DEBUG_CORE is not set
# CONFIG_SYMBOLIC_ERRNAME is not set
CONFIG_DEBUG_BUGVERBOSE=y
# end of printk and dmesg options

# CONFIG_DEBUG_KERNEL is not set

#
# Compile-time checks and compiler options
#
CONFIG_AS_HAS_NON_CONST_LEB128=y
CONFIG_FRAME_WARN=2048
# CONFIG_STRIP_ASM_SYMS is not set
# CONFIG_HEADERS_INSTALL is not set
CONFIG_DEBUG_SECTION_MISMATCH=y
CONFIG_SECTION_MISMATCH_WARN_ONLY=y
# end of Compile-time checks and compiler options

#
# Generic Kernel Debugging Instruments
#
# CONFIG_MAGIC_SYSRQ is not set
# CONFIG_DEBUG_FS is not set
# CONFIG_UBSAN is not set
CONFIG_HAVE_KCSAN_COMPILER=y
# end of Generic Kernel Debugging Instruments

#
# Networking Debugging
#
# end of Networking Debugging

#
# Memory Debugging
#
# CONFIG_PAGE_EXTENSION is not set
CONFIG_SLUB_DEBUG=y
# CONFIG_SLUB_DEBUG_ON is not set
# CONFIG_PAGE_POISONING is not set
CONFIG_DEBUG_MEMORY_INIT=y
CONFIG_HAVE_DEBUG_STACKOVERFLOW=y
CONFIG_CC_HAS_WORKING_NOSANITIZE_ADDRESS=y
# end of Memory Debugging

#
# Debug Oops, Lockups and Hangs
#
# CONFIG_PANIC_ON_OOPS is not set
CONFIG_PANIC_ON_OOPS_VALUE=0
CONFIG_PANIC_TIMEOUT=0
# end of Debug Oops, Lockups and Hangs

#
# Scheduler Debugging
#
# end of Scheduler Debugging

# CONFIG_DEBUG_TIMEKEEPING is not set

#
# Lock Debugging (spinlocks, mutexes, etc...)
#
CONFIG_LOCK_DEBUGGING_SUPPORT=y
# CONFIG_WW_MUTEX_SELFTEST is not set
# end of Lock Debugging (spinlocks, mutexes, etc...)

# CONFIG_DEBUG_IRQFLAGS is not set
CONFIG_STACKTRACE=y
# CONFIG_WARN_ALL_UNSEEDED_RANDOM is not set

#
# Debug kernel data structures
#
# CONFIG_BUG_ON_DATA_CORRUPTION is not set
# end of Debug kernel data structures

#
# RCU Debugging
#
CONFIG_RCU_CPU_STALL_TIMEOUT=21
CONFIG_RCU_EXP_CPU_STALL_TIMEOUT=0
# end of RCU Debugging

CONFIG_USER_STACKTRACE_SUPPORT=y
CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
CONFIG_TRACING_SUPPORT=y
# CONFIG_FTRACE is not set
# CONFIG_SAMPLES is not set

#
# loongarch Debugging
#
# CONFIG_UNWINDER_GUESS is not set
CONFIG_UNWINDER_PROLOGUE=y
# end of loongarch Debugging

#
# Kernel Testing and Coverage
#
# CONFIG_KUNIT is not set
CONFIG_CC_HAS_SANCOV_TRACE_PC=y
# CONFIG_RUNTIME_TESTING_MENU is not set
# end of Kernel Testing and Coverage

#
# Rust hacking
#
# end of Rust hacking
# end of Kernel hacking

Re: [PATCH 1/2] LoongArch: Add suspend (ACPI S3) support

[Huacai Chen]

Hi, Jinyang,

On Fri, Oct 28, 2022 at 6:13 PM Jinyang He <hejinyang@loongson.cn> wrote:
>
> On 2022/10/28 下午5:44, Huacai Chen wrote:
>
> > Hi, Jinyang,
> >
> > On Fri, Oct 28, 2022 at 5:37 PM Jinyang He <hejinyang@loongson.cn> wrote:
> >> Hi, Huacai,
> >>
> >>
> >> On 2022/10/28 下午5:00, Huacai Chen wrote:
> >>
> >>>    Hi, Jinyang,
> >>>
> >>> On Fri, Oct 28, 2022 at 3:23 PM Jinyang He <hejinyang@loongson.cn> wrote:
> >>>> On 2022/10/28 上午10:38, Huacai Chen wrote:
> >>>>
> >>>>> Add suspend (Suspend To RAM, aka ACPI S3) support for LoongArch.
> >>>>>
> >>>>> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
> >>>>> ---
> >>>>>     arch/loongarch/Kconfig                |   5 ++
> >>>>>     arch/loongarch/Makefile               |   3 +
> >>>>>     arch/loongarch/include/asm/acpi.h     |  10 +++
> >>>>>     arch/loongarch/include/asm/bootinfo.h |   1 +
> >>>>>     arch/loongarch/include/asm/loongson.h |   3 +
> >>>>>     arch/loongarch/include/asm/time.h     |   1 +
> >>>>>     arch/loongarch/kernel/acpi.c          |   6 ++
> >>>>>     arch/loongarch/kernel/smp.c           |   1 +
> >>>>>     arch/loongarch/kernel/time.c          |  11 ++-
> >>>>>     arch/loongarch/power/Makefile         |   3 +
> >>>>>     arch/loongarch/power/platform.c       |  45 +++++++++++
> >>>>>     arch/loongarch/power/suspend.c        |  73 +++++++++++++++++
> >>>>>     arch/loongarch/power/suspend_asm.S    | 112 ++++++++++++++++++++++++++
> >>>>>     13 files changed, 271 insertions(+), 3 deletions(-)
> >>>>>     create mode 100644 arch/loongarch/power/Makefile
> >>>>>     create mode 100644 arch/loongarch/power/platform.c
> >>>>>     create mode 100644 arch/loongarch/power/suspend.c
> >>>>>     create mode 100644 arch/loongarch/power/suspend_asm.S
> >>>>>
> >>>>> diff --git a/arch/loongarch/Kconfig b/arch/loongarch/Kconfig
> >>>>> index a8dc58e8162a..0df102401d1d 100644
> >>>>> --- a/arch/loongarch/Kconfig
> >>>>> +++ b/arch/loongarch/Kconfig
> >>>>> @@ -57,6 +57,7 @@ config LOONGARCH
> >>>>>         select ARCH_WANTS_NO_INSTR
> >>>>>         select BUILDTIME_TABLE_SORT
> >>>>>         select COMMON_CLK
> >>>>> +     select CPU_PM
> >>>>>         select EFI
> >>>>>         select GENERIC_CLOCKEVENTS
> >>>>>         select GENERIC_CMOS_UPDATE
> >>>>> @@ -517,6 +518,10 @@ config ARCH_MMAP_RND_BITS_MAX
> >>>>>
> >>>>>     menu "Power management options"
> >>>>>
> >>>>> +config ARCH_SUSPEND_POSSIBLE
> >>>>> +     def_bool y
> >>>>> +
> >>>>> +source "kernel/power/Kconfig"
> >>>>>     source "drivers/acpi/Kconfig"
> >>>>>
> >>>>>     endmenu
> >>>>> diff --git a/arch/loongarch/Makefile b/arch/loongarch/Makefile
> >>>>> index f4cb54d5afd6..a0fc1f9980e3 100644
> >>>>> --- a/arch/loongarch/Makefile
> >>>>> +++ b/arch/loongarch/Makefile
> >>>>> @@ -104,6 +104,9 @@ endif
> >>>>>     libs-y += arch/loongarch/lib/
> >>>>>     libs-$(CONFIG_EFI_STUB) += $(objtree)/drivers/firmware/efi/libstub/lib.a
> >>>>>
> >>>>> +# suspend and hibernation support
> >>>>> +drivers-$(CONFIG_PM) += arch/loongarch/power/
> >>>>> +
> >>>>>     ifeq ($(KBUILD_EXTMOD),)
> >>>>>     prepare: vdso_prepare
> >>>>>     vdso_prepare: prepare0
> >>>>> diff --git a/arch/loongarch/include/asm/acpi.h b/arch/loongarch/include/asm/acpi.h
> >>>>> index 825c2519b9d1..9664868b1260 100644
> >>>>> --- a/arch/loongarch/include/asm/acpi.h
> >>>>> +++ b/arch/loongarch/include/asm/acpi.h
> >>>>> @@ -35,4 +35,14 @@ extern struct list_head acpi_wakeup_device_list;
> >>>>>
> >>>>>     #define ACPI_TABLE_UPGRADE_MAX_PHYS ARCH_LOW_ADDRESS_LIMIT
> >>>>>
> >>>>> +extern int loongarch_acpi_suspend(void);
> >>>>> +extern int (*acpi_suspend_lowlevel)(void);
> >>>>> +extern void loongarch_suspend_enter(void);
> >>>>> +extern void loongarch_wakeup_start(void);
> >>>>> +
> >>>>> +static inline unsigned long acpi_get_wakeup_address(void)
> >>>>> +{
> >>>>> +     return (unsigned long)loongarch_wakeup_start;
> >>>>> +}
> >>>>> +
> >>>>>     #endif /* _ASM_LOONGARCH_ACPI_H */
> >>>>> diff --git a/arch/loongarch/include/asm/bootinfo.h b/arch/loongarch/include/asm/bootinfo.h
> >>>>> index ed0910e8b856..0051b526ac6d 100644
> >>>>> --- a/arch/loongarch/include/asm/bootinfo.h
> >>>>> +++ b/arch/loongarch/include/asm/bootinfo.h
> >>>>> @@ -32,6 +32,7 @@ struct loongson_system_configuration {
> >>>>>         int cores_per_node;
> >>>>>         int cores_per_package;
> >>>>>         unsigned long cores_io_master;
> >>>>> +     unsigned long suspend_addr;
> >>>>>         const char *cpuname;
> >>>>>     };
> >>>>>
> >>>>> diff --git a/arch/loongarch/include/asm/loongson.h b/arch/loongarch/include/asm/loongson.h
> >>>>> index 00db93edae1b..12494cffffd1 100644
> >>>>> --- a/arch/loongarch/include/asm/loongson.h
> >>>>> +++ b/arch/loongarch/include/asm/loongson.h
> >>>>> @@ -136,4 +136,7 @@ typedef enum {
> >>>>>     #define ls7a_writel(val, addr)      *(volatile unsigned int   *)TO_UNCACHE(addr) = (val)
> >>>>>     #define ls7a_writeq(val, addr)      *(volatile unsigned long  *)TO_UNCACHE(addr) = (val)
> >>>>>
> >>>>> +void enable_gpe_wakeup(void);
> >>>>> +void enable_pci_wakeup(void);
> >>>>> +
> >>>>>     #endif /* __ASM_LOONGSON_H */
> >>>>> diff --git a/arch/loongarch/include/asm/time.h b/arch/loongarch/include/asm/time.h
> >>>>> index 2eae219301d0..037a2d1b8ff4 100644
> >>>>> --- a/arch/loongarch/include/asm/time.h
> >>>>> +++ b/arch/loongarch/include/asm/time.h
> >>>>> @@ -12,6 +12,7 @@
> >>>>>     extern u64 cpu_clock_freq;
> >>>>>     extern u64 const_clock_freq;
> >>>>>
> >>>>> +extern void save_counter(void);
> >>>>>     extern void sync_counter(void);
> >>>>>
> >>>>>     static inline unsigned int calc_const_freq(void)
> >>>>> diff --git a/arch/loongarch/kernel/acpi.c b/arch/loongarch/kernel/acpi.c
> >>>>> index 335398482038..982672caf753 100644
> >>>>> --- a/arch/loongarch/kernel/acpi.c
> >>>>> +++ b/arch/loongarch/kernel/acpi.c
> >>>>> @@ -156,6 +156,12 @@ static void __init acpi_process_madt(void)
> >>>>>         loongson_sysconf.nr_cpus = num_processors;
> >>>>>     }
> >>>>>
> >>>>> +#ifdef CONFIG_ACPI_SLEEP
> >>>>> +int (*acpi_suspend_lowlevel)(void) = loongarch_acpi_suspend;
> >>>>> +#else
> >>>>> +int (*acpi_suspend_lowlevel)(void);
> >>>>> +#endif
> >>>>> +
> >>>>>     int __init acpi_boot_init(void)
> >>>>>     {
> >>>>>         /*
> >>>>> diff --git a/arch/loongarch/kernel/smp.c b/arch/loongarch/kernel/smp.c
> >>>>> index 781a4d4bdddc..6e192a25e134 100644
> >>>>> --- a/arch/loongarch/kernel/smp.c
> >>>>> +++ b/arch/loongarch/kernel/smp.c
> >>>>> @@ -16,6 +16,7 @@
> >>>>>     #include <linux/smp.h>
> >>>>>     #include <linux/threads.h>
> >>>>>     #include <linux/export.h>
> >>>>> +#include <linux/syscore_ops.h>
> >>>>>     #include <linux/time.h>
> >>>>>     #include <linux/tracepoint.h>
> >>>>>     #include <linux/sched/hotplug.h>
> >>>>> diff --git a/arch/loongarch/kernel/time.c b/arch/loongarch/kernel/time.c
> >>>>> index 786735dcc8d6..a6576dea590c 100644
> >>>>> --- a/arch/loongarch/kernel/time.c
> >>>>> +++ b/arch/loongarch/kernel/time.c
> >>>>> @@ -115,12 +115,17 @@ static unsigned long __init get_loops_per_jiffy(void)
> >>>>>         return lpj;
> >>>>>     }
> >>>>>
> >>>>> -static long init_timeval;
> >>>>> +static long init_offset __nosavedata;
> >>>>> +
> >>>>> +void save_counter(void)
> >>>>> +{
> >>>>> +     init_offset = drdtime();
> >>>>> +}
> >>>>>
> >>>>>     void sync_counter(void)
> >>>>>     {
> >>>>>         /* Ensure counter begin at 0 */
> >>>>> -     csr_write64(-init_timeval, LOONGARCH_CSR_CNTC);
> >>>>> +     csr_write64(init_offset, LOONGARCH_CSR_CNTC);
> >>>>>     }
> >>>>>
> >>>>>     static int get_timer_irq(void)
> >>>>> @@ -219,7 +224,7 @@ void __init time_init(void)
> >>>>>         else
> >>>>>                 const_clock_freq = calc_const_freq();
> >>>>>
> >>>>> -     init_timeval = drdtime() - csr_read64(LOONGARCH_CSR_CNTC);
> >>>>> +     init_offset = -(drdtime() - csr_read64(LOONGARCH_CSR_CNTC));
> >>>>>
> >>>>>         constant_clockevent_init();
> >>>>>         constant_clocksource_init();
> >>>>> diff --git a/arch/loongarch/power/Makefile b/arch/loongarch/power/Makefile
> >>>>> new file mode 100644
> >>>>> index 000000000000..6740117decaa
> >>>>> --- /dev/null
> >>>>> +++ b/arch/loongarch/power/Makefile
> >>>>> @@ -0,0 +1,3 @@
> >>>>> +obj-y        += platform.o
> >>>>> +
> >>>>> +obj-$(CONFIG_SUSPEND)                += suspend.o suspend_asm.o
> >>>>> diff --git a/arch/loongarch/power/platform.c b/arch/loongarch/power/platform.c
> >>>>> new file mode 100644
> >>>>> index 000000000000..675e8792afaf
> >>>>> --- /dev/null
> >>>>> +++ b/arch/loongarch/power/platform.c
> >>>>> @@ -0,0 +1,45 @@
> >>>>> +// SPDX-License-Identifier: GPL-2.0
> >>>>> +/*
> >>>>> + * Author: Huacai Chen <chenhuacai@loongson.cn>
> >>>>> + * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
> >>>>> + */
> >>>>> +#include <linux/acpi.h>
> >>>>> +#include <linux/platform_device.h>
> >>>>> +
> >>>>> +#include <asm/bootinfo.h>
> >>>>> +#include <asm/setup.h>
> >>>>> +
> >>>>> +void enable_gpe_wakeup(void)
> >>>>> +{
> >>>>> +     acpi_enable_all_wakeup_gpes();
> >>>>> +}
> >>>>> +
> >>>>> +void enable_pci_wakeup(void)
> >>>>> +{
> >>>>> +     acpi_write_bit_register(ACPI_BITREG_PCIEXP_WAKE_STATUS, 1);
> >>>>> +
> >>>>> +     if (acpi_gbl_FADT.flags & ACPI_FADT_PCI_EXPRESS_WAKE)
> >>>>> +             acpi_write_bit_register(ACPI_BITREG_PCIEXP_WAKE_DISABLE, 0);
> >>>>> +}
> >>>>> +
> >>>>> +static int __init loongson3_acpi_suspend_init(void)
> >>>>> +{
> >>>>> +#ifdef CONFIG_ACPI
> >>>>> +     acpi_status status;
> >>>>> +     uint64_t suspend_addr = 0;
> >>>>> +
> >>>>> +     if (acpi_disabled || acpi_gbl_reduced_hardware)
> >>>>> +             return 0;
> >>>>> +
> >>>>> +     acpi_write_bit_register(ACPI_BITREG_SCI_ENABLE, 1);
> >>>>> +     status = acpi_evaluate_integer(NULL, "\\SADR", NULL, &suspend_addr);
> >>>>> +     if (ACPI_FAILURE(status) || !suspend_addr) {
> >>>>> +             pr_err("ACPI S3 is not support!\n");
> >>>>> +             return -1;
> >>>>> +     }
> >>>>> +     loongson_sysconf.suspend_addr = (u64)phys_to_virt(PHYSADDR(suspend_addr));
> >>>>> +#endif
> >>>>> +     return 0;
> >>>>> +}
> >>>>> +
> >>>>> +device_initcall(loongson3_acpi_suspend_init);
> >>>>> diff --git a/arch/loongarch/power/suspend.c b/arch/loongarch/power/suspend.c
> >>>>> new file mode 100644
> >>>>> index 000000000000..b9fa0f9a9277
> >>>>> --- /dev/null
> >>>>> +++ b/arch/loongarch/power/suspend.c
> >>>>> @@ -0,0 +1,73 @@
> >>>>> +// SPDX-License-Identifier: GPL-2.0
> >>>>> +/*
> >>>>> + * loongson-specific suspend support
> >>>>> + *
> >>>>> + * Author: Huacai Chen <chenhuacai@loongson.cn>
> >>>>> + * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
> >>>>> + */
> >>>>> +#include <linux/acpi.h>
> >>>>> +#include <linux/pm.h>
> >>>>> +#include <linux/suspend.h>
> >>>>> +
> >>>>> +#include <asm/loongarch.h>
> >>>>> +#include <asm/loongson.h>
> >>>>> +#include <asm/setup.h>
> >>>>> +#include <asm/time.h>
> >>>>> +#include <asm/tlbflush.h>
> >>>>> +
> >>>>> +u64 loongarch_suspend_addr;
> >>>>> +
> >>>>> +struct saved_registers {
> >>>>> +     u32 ecfg;
> >>>>> +     u32 euen;
> >>>>> +     u64 pgd;
> >>>>> +     u64 kpgd;
> >>>>> +     u32 pwctl0;
> >>>>> +     u32 pwctl1;
> >>>>> +};
> >>>>> +static struct saved_registers saved_regs;
> >>>>> +
> >>>>> +static void arch_common_suspend(void)
> >>>>> +{
> >>>>> +     save_counter();
> >>>>> +     saved_regs.pgd = csr_read64(LOONGARCH_CSR_PGDL);
> >>>>> +     saved_regs.kpgd = csr_read64(LOONGARCH_CSR_PGDH);
> >>>>> +     saved_regs.pwctl0 = csr_read32(LOONGARCH_CSR_PWCTL0);
> >>>>> +     saved_regs.pwctl1 = csr_read32(LOONGARCH_CSR_PWCTL1);
> >>>>> +     saved_regs.ecfg = csr_read32(LOONGARCH_CSR_ECFG);
> >>>>> +     saved_regs.euen = csr_read32(LOONGARCH_CSR_EUEN);
> >>>>> +
> >>>>> +     loongarch_suspend_addr = loongson_sysconf.suspend_addr;
> >>>>> +}
> >>>>> +
> >>>>> +static void arch_common_resume(void)
> >>>>> +{
> >>>>> +     sync_counter();
> >>>>> +     local_flush_tlb_all();
> >>>>> +     csr_write64(per_cpu_offset(0), PERCPU_BASE_KS);
> >>>>> +     csr_write64(eentry, LOONGARCH_CSR_EENTRY);
> >>>>> +     csr_write64(eentry, LOONGARCH_CSR_MERRENTRY);
> >>>>> +     csr_write64(tlbrentry, LOONGARCH_CSR_TLBRENTRY);
> >>>>> +
> >>>>> +     csr_write64(saved_regs.pgd, LOONGARCH_CSR_PGDL);
> >>>>> +     csr_write64(saved_regs.kpgd, LOONGARCH_CSR_PGDH);
> >>>>> +     csr_write32(saved_regs.pwctl0, LOONGARCH_CSR_PWCTL0);
> >>>>> +     csr_write32(saved_regs.pwctl1, LOONGARCH_CSR_PWCTL1);
> >>>>> +     csr_write32(saved_regs.ecfg, LOONGARCH_CSR_ECFG);
> >>>>> +     csr_write32(saved_regs.euen, LOONGARCH_CSR_EUEN);
> >>>>> +}
> >>>>> +
> >>>>> +int loongarch_acpi_suspend(void)
> >>>>> +{
> >>>>> +     enable_gpe_wakeup();
> >>>>> +     enable_pci_wakeup();
> >>>>> +
> >>>>> +     arch_common_suspend();
> >>>>> +
> >>>>> +     /* processor specific suspend */
> >>>>> +     loongarch_suspend_enter();
> >>>>> +
> >>>>> +     arch_common_resume();
> >>>>> +
> >>>>> +     return 0;
> >>>>> +}
> >>>>> diff --git a/arch/loongarch/power/suspend_asm.S b/arch/loongarch/power/suspend_asm.S
> >>>>> new file mode 100644
> >>>>> index 000000000000..ff52c3aa09d9
> >>>>> --- /dev/null
> >>>>> +++ b/arch/loongarch/power/suspend_asm.S
> >>>>> @@ -0,0 +1,108 @@
> >>>>> +/* SPDX-License-Identifier: GPL-2.0 */
> >>>>> +/*
> >>>>> + * Sleep helper for Loongson-3 sleep mode.
> >>>>> + *
> >>>>> + * Author: Huacai Chen <chenhuacai@loongson.cn>
> >>>>> + * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
> >>>>> + */
> >>>>> +
> >>>>> +#include <asm/asm.h>
> >>>>> +#include <asm/asmmacro.h>
> >>>>> +#include <asm/addrspace.h>
> >>>>> +#include <asm/loongarch.h>
> >>>>> +#include <asm/stackframe.h>
> >>>>> +
> >>>>> +     .text
> >>>>> +     .align  5
> >>>>> +
> >>>>> +/* preparatory stuff */
> >>>>> +.macro       SETUP_SLEEP
> >>>>> +     addi.d          sp, sp, -PT_SIZE
> >>>>> +     st.d            $r1, sp, PT_R1
> >>>>> +     st.d            $r2, sp, PT_R2
> >>>>> +     st.d            $r3, sp, PT_R3
> >>>>> +     st.d            $r4, sp, PT_R4
> >>>>> +     st.d            $r5, sp, PT_R5
> >>>>> +     st.d            $r6, sp, PT_R6
> >>>>> +     st.d            $r7, sp, PT_R7
> >>>>> +     st.d            $r8, sp, PT_R8
> >>>>> +     st.d            $r9, sp, PT_R9
> >>>>> +     st.d            $r10, sp, PT_R10
> >>>>> +     st.d            $r11, sp, PT_R11
> >>>>> +     st.d            $r20, sp, PT_R20
> >>>>> +     st.d            $r21, sp, PT_R21
> >>>>> +     st.d            $r22, sp, PT_R22
> >>>>> +     st.d            $r23, sp, PT_R23
> >>>>> +     st.d            $r24, sp, PT_R24
> >>>>> +     st.d            $r25, sp, PT_R25
> >>>>> +     st.d            $r26, sp, PT_R26
> >>>>> +     st.d            $r27, sp, PT_R27
> >>>>> +     st.d            $r28, sp, PT_R28
> >>>>> +     st.d            $r29, sp, PT_R29
> >>>>> +     st.d            $r30, sp, PT_R30
> >>>>> +     st.d            $r31, sp, PT_R31
> >>>>> +
> >>>>> +     la.pcrel        t0, acpi_saved_sp
> >>>>> +     st.d            sp, t0, 0
> >>>>> +.endm
> >>>>> +
> >>>>> +/* Sleep code for Loongson-3 */
> >>>>> +SYM_CODE_START(loongarch_suspend_enter)
> >>>>> +     SETUP_SLEEP
> >>>>> +     bl              __flush_cache_all
> >>>>> +
> >>>>> +     /* Pass RA and SP to BIOS */
> >>>>> +     addi.d          a1, sp, 0
> >>>>> +     la.pcrel        a0, loongarch_wakeup_start
> >>>>> +     la.pcrel        t0, loongarch_suspend_addr
> >>>>> +     ld.d            t0, t0, 0 /* Call BIOS's STR sleep routine */
> >>>>> +     jr              t0
> >>>>> +     nop
> >>>> Hi, Huacai,
> >>>>
> >>>> For loongarch_suspend_enter() and loongarch_wakeup_start(), it is better to
> >>>> make them be more like C-style, that means it could obey LoongArch-psABI.
> >>>> Just alloc limited stack and store the ra, s* and fp registers.
> >>>> Additionally,
> >>>> the tp and the u0 should be saved, too. Combine
> >>>> loongarch_suspend_enter() and
> >>>> loongarch_suspend_enter() to one function and using 'jirl a0, t0, 0' to link
> >>>> them which indicate the control flow will return. These works make the
> >>>> control
> >>>> flow clarity. Finally use SYM_FUNC_START/END declare the new function.
> >>> Thank you for your comments, but you may misunderstand something about S3.
> >>> 1,  S3 sleep means come from kernel to BIOS, and S3 wakeup means come
> >>> from BIOS to kernel (it has a POST progress, all register context
> >>> lost). This is very different from a function call. When exception
> >>> handling we need to save all and restore all, S3 wakeup should do even
> >>> more.
> >> It's true I'm not familiar with S3 (almost the hardware working). It is
> >> special code control that S3 sleep from kernel to BIOS and wakeup
> >> from BIOS to kernel. But loongarch_acpi_suspend() calls
> >> loongarch_suspend_enter()
> >> and the latter returns by loongarch_wakeup_start().
> >> (If there is other way to restore it, I'm seriously wrong.) The key
> >> point is the position after calling loongarch_suspend_enter() and
> >> before calling arch_common_resume(). We just keep this control flow
> >> is normally at this point. So, due to LoongArch-psABI, after calling
> >> loongarch_suspend_enter(), t* and a* can be changed. Actually, we
> >> just should take care of tp and u0.
> > Obey psABI needs caller and callee to know each other, this is not the
> > case for S3, kernel doesn't assume anything about BIOS.
>
> +int loongarch_acpi_suspend(void)
> +{
> +     enable_gpe_wakeup();
> +     enable_pci_wakeup();
> +
> +     arch_common_suspend();
> +
> +     /* processor specific suspend */
> +     loongarch_suspend_enter();
> +
>
> I'm not sure what register state is broken will cause error here.
> While there may be ipa-ra optimizations, they are not in the same
> compilation unit. It obey Procedure Calling Convention. t* and a*
> is free, and others regs should be restored before here.
>
> +     arch_common_resume();
> +
> +     return 0;
> +}
>
> >>
> >>> 2, a0 (wakeup pc) and a1 (wakeup sp) are information passed to BIOS,
> >>> BIOS may store it in some place similar to NVRAM, it does not
> >>> naturally exist in the register after power up.
> >>> 3, What means combine  loongarch_suspend_enter() and loongarch_suspend_enter()?
> >> Just mistake, combine loongarch_suspend_enter and loongarch_wakeup_start,
> > They cannot be combined, you also cannot combine swsusp_asm_suspend
> > and swsusp_asm_resume for S4, right?
>
> S4 is not needed. IMO S4 is like try catch, while S3 is like syscall.
> User use syscall and known a* and t* will be destoryed, and kernel is
> not needed save all regs unless like process copy.
>
> S4 is like try catch, we save state like setjmp, and the control flow
> will still go until do leave(). And then restart kernel like get signal,
> the time when initcall call restore like longjmp.
Yes, you are right, I got it, thanks.

Huacai
>
>
> >> like follows,
> >>
> >> +     /* Pass RA and SP to BIOS */
> >> +     addi.d          a1, sp, 0
> >> +     la.pcrel        a0, loongarch_wakeup_start
> >> +     la.pcrel        t0, loongarch_suspend_addr
> >> +     ld.d            t0, t0, 0 /* Call BIOS's STR sleep routine */
> >> +     jr              t0
> >> +     nop
> >> +SYM_CODE_END(loongarch_suspend_enter)
> >> +
> >> +     .align 12
> >> +
> >> +SYM_CODE_START(loongarch_wakeup_start)
> >> +     li.d            t0, CSR_DMW0_INIT       # UC, PLV0
> >> +     csrwr           t0, LOONGARCH_CSR_DMWIN0
> >> +     li.d            t0, CSR_DMW1_INIT       # CA, PLV0
> >> +     csrwr           t0, LOONGARCH_CSR_DMWIN1
> >>
> >> --------change it to-------------->
> >>
> >> .align 12
> >> SYM_FUNC_START(loongarch_suspend_enter)
> >> ...
> >> +     /* Pass RA and SP to BIOS */
> >> +     addi.d          a1, sp, 0
> >> +     la.pcrel        t0, loongarch_suspend_addr
> >> +     ld.d            t0, t0, 0 /* Call BIOS's STR sleep routine */
> >> *jirl a0, t0, 0*
> >> +     li.d            t0, CSR_DMW0_INIT       # UC, PLV0
> >> +     csrwr           t0, LOONGARCH_CSR_DMWIN0
> >> +     li.d            t0, CSR_DMW1_INIT       # CA, PLV0
> >> +     csrwr           t0, LOONGARCH_CSR_DMWIN1
> >> ...
> >>
> >>> Huacai
> >>>
> >>>> Thanks,
> >>>>
> >>>> Jinyang
> >>>>
> >>>>
> >>>>> +SYM_CODE_END(loongarch_suspend_enter)
> >>>>> +
> >>>>> +.macro SETUP_WAKEUP
> >>>>> +     ld.d            $r1, sp, PT_R1
> >>>>> +     ld.d            $r2, sp, PT_R2
> >>>>> +     ld.d            $r3, sp, PT_R3
> >>>>> +     ld.d            $r4, sp, PT_R4
> >>>>> +     ld.d            $r5, sp, PT_R5
> >>>>> +     ld.d            $r6, sp, PT_R6
> >>>>> +     ld.d            $r7, sp, PT_R7
> >>>>> +     ld.d            $r8, sp, PT_R8
> >>>>> +     ld.d            $r9, sp, PT_R9
> >>>>> +     ld.d            $r10, sp, PT_R10
> >>>>> +     ld.d            $r11, sp, PT_R11
> >>>>> +     ld.d            $r20, sp, PT_R20
> >>>>> +     ld.d            $r21, sp, PT_R21
> >>>>> +     ld.d            $r22, sp, PT_R22
> >>>>> +     ld.d            $r23, sp, PT_R23
> >>>>> +     ld.d            $r24, sp, PT_R24
> >>>>> +     ld.d            $r25, sp, PT_R25
> >>>>> +     ld.d            $r26, sp, PT_R26
> >>>>> +     ld.d            $r27, sp, PT_R27
> >>>>> +     ld.d            $r28, sp, PT_R28
> >>>>> +     ld.d            $r29, sp, PT_R29
> >>>>> +     ld.d            $r30, sp, PT_R30
> >>>>> +     ld.d            $r31, sp, PT_R31
> >>>>> +.endm
> >>>>> +
> >>>>> +     /* This is where we return upon wakeup.
> >>>>> +      * Reload all of the registers and return.
> >>>>> +      */
> >>>>> +     .align 12
> >>>>> +
> >>>>> +SYM_CODE_START(loongarch_wakeup_start)
> >>>>> +     li.d            t0, CSR_DMW0_INIT       # UC, PLV0
> >>>>> +     csrwr           t0, LOONGARCH_CSR_DMWIN0
> >>>>> +     li.d            t0, CSR_DMW1_INIT       # CA, PLV0
> >>>>> +     csrwr           t0, LOONGARCH_CSR_DMWIN1
> >>>>> +
> >>>>> +     la.abs          t0, 0f
> >>>>> +     jr              t0
> >>>>> +0:
> >>>>> +     la.pcrel        t0, acpi_saved_sp
> >>>>> +     ld.d            sp, t0, 0
> >>>>> +     SETUP_WAKEUP
> >>>>> +     addi.d          sp, sp, PT_SIZE
> >>>>> +     jr              ra
> >>>>> +SYM_CODE_END(loongarch_wakeup_start)
> >>
>
>