From: Pawan Gupta <pawan.kumar.gupta@linux.intel.com>
To: Borislav Petkov <bp@alien8.de>
Cc: Andrew Cooper <Andrew.Cooper3@citrix.com>,
Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>,
Dave Hansen <dave.hansen@linux.intel.com>,
"x86@kernel.org" <x86@kernel.org>,
"H. Peter Anvin" <hpa@zytor.com>,
"Rafael J. Wysocki" <rafael@kernel.org>,
Pavel Machek <pavel@ucw.cz>,
"hdegoede@redhat.com" <hdegoede@redhat.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-pm@vger.kernel.org" <linux-pm@vger.kernel.org>,
Daniel Sneddon <daniel.sneddon@linux.intel.com>,
"antonio.gomez.iglesias@linux.intel.com"
<antonio.gomez.iglesias@linux.intel.com>
Subject: Re: [PATCH 2/3] x86/cpu/amd: Add feature bit for MSR_AMD64_LS_CFG enumeration
Date: Wed, 9 Nov 2022 13:41:26 -0800 [thread overview]
Message-ID: <20221109214126.ao477sucsks6msyd@desk> (raw)
In-Reply-To: <Y2vyz2OAp1xKedYc@zn.tnic>
On Wed, Nov 09, 2022 at 07:34:55PM +0100, Borislav Petkov wrote:
>On Wed, Nov 09, 2022 at 09:37:20AM -0800, Pawan Gupta wrote:
>> Looks like we need to restore this MSR too,
>
>Why do we? Is that MSR read-only too or what is the reason for that one?
Please ignore, it doesn't concern this series.
>Yes, MSR_AMD64_LS_CFG is used in SSBD mitigations. For everything <= 0x12:
>
> /* AMD Family 0xf - 0x12 */
> VULNWL_AMD(0x0f, NO_MELTDOWN | NO_SSB | NO_L1TF | NO_MDS | NO_SWAPGS | NO_ITLB_MULTIHIT | NO_MMIO),
> VULNWL_AMD(0x10, NO_MELTDOWN | NO_SSB | NO_L1TF | NO_MDS | NO_SWAPGS | NO_ITLB_MULTIHIT | NO_MMIO),
> VULNWL_AMD(0x11, NO_MELTDOWN | NO_SSB | NO_L1TF | NO_MDS | NO_SWAPGS | NO_ITLB_MULTIHIT | NO_MMIO),
> VULNWL_AMD(0x12, NO_MELTDOWN | NO_SSB | NO_L1TF | NO_MDS | NO_SWAPGS | NO_ITLB_MULTIHIT | NO_MMIO),
>
>On F14h it says here:
>
>[ 0.278930] Speculative Store Bypass: Vulnerable
>
>simply because it is not present there.
So looks like MSR_AMD64_LS_CFG should only be restored when
X86_FEATURE_LS_CFG_SSBD is present. I will make this change in v2.
next prev parent reply other threads:[~2022-11-09 21:41 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-12 23:38 [PATCH 0/3] Check enumeration before MSR save/restore Pawan Gupta
2022-09-12 23:39 ` [PATCH 1/3] x86/tsx: Add feature bit for TSX control MSR support Pawan Gupta
2022-11-08 18:27 ` Dave Hansen
2022-11-08 22:06 ` Pawan Gupta
2022-09-12 23:40 ` [PATCH 2/3] x86/cpu/amd: Add feature bit for MSR_AMD64_LS_CFG enumeration Pawan Gupta
2022-11-08 18:54 ` Borislav Petkov
2022-11-08 22:51 ` Pawan Gupta
2022-11-08 23:10 ` Borislav Petkov
2022-11-09 0:45 ` Andrew Cooper
2022-11-09 17:37 ` Pawan Gupta
2022-11-09 18:34 ` Borislav Petkov
2022-11-09 21:41 ` Pawan Gupta [this message]
2022-11-10 0:00 ` Andrew Cooper
2022-11-10 6:09 ` Pawan Gupta
2022-11-09 2:18 ` Pawan Gupta
2022-09-12 23:41 ` [PATCH 3/3] x86/pm: Add enumeration check before spec MSRs save/restore setup Pawan Gupta
2022-11-08 18:40 ` Dave Hansen
2022-11-08 22:09 ` Pawan Gupta
2022-09-13 0:50 ` [PATCH 0/3] Check enumeration before MSR save/restore Pawan Gupta
2022-09-17 11:42 ` Hans de Goede
2022-09-19 16:56 ` Pawan Gupta
2022-11-08 18:16 ` Hans de Goede
2022-11-08 18:26 ` Borislav Petkov
2022-11-08 18:55 ` Borislav Petkov
2022-11-08 22:07 ` Pawan Gupta
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