From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AAD59EB64DA for ; Wed, 19 Jul 2023 15:25:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231752AbjGSPZQ (ORCPT ); Wed, 19 Jul 2023 11:25:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34626 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231755AbjGSPZP (ORCPT ); Wed, 19 Jul 2023 11:25:15 -0400 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 8ACBA1B5; Wed, 19 Jul 2023 08:24:50 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id A2A062F4; Wed, 19 Jul 2023 08:25:13 -0700 (PDT) Received: from bogus (e103737-lin.cambridge.arm.com [10.1.197.49]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id C606D3F6C4; Wed, 19 Jul 2023 08:24:28 -0700 (PDT) Date: Wed, 19 Jul 2023 16:24:26 +0100 From: Sudeep Holla To: Ulf Hansson Cc: Cristian Marussi , Viresh Kumar , Nishanth Menon , Stephen Boyd , Nikunj Kela , Prasad Sodagudi , Alexandre Torgue , linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 09/11] cpufreq: scmi: Add support to parse domain-id using #power-domain-cells Message-ID: <20230719152426.qwc5qqewrfjsarlz@bogus> References: <20230713141738.23970-1-ulf.hansson@linaro.org> <20230713141738.23970-10-ulf.hansson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20230713141738.23970-10-ulf.hansson@linaro.org> Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org On Thu, Jul 13, 2023 at 04:17:36PM +0200, Ulf Hansson wrote: > The performance domain-id can be described in DT using the power-domains > property or the clock property. The latter is already supported, so let's > add support for the power-domains too. > How is this supposed to work for the CPUs ? The CPU power domains are generally PSCI on most of the platforms and the one using OSI explicitly need to specify the details while ones using PC will not need to. Also they can never be performance domains too. So I am not sure if I am following this correctly. -- Regards, Sudeep