From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B3FCAEDEC6B for ; Wed, 13 Sep 2023 14:31:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238551AbjIMObf (ORCPT ); Wed, 13 Sep 2023 10:31:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50576 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240574AbjIMObf (ORCPT ); Wed, 13 Sep 2023 10:31:35 -0400 Received: from bmailout2.hostsharing.net (bmailout2.hostsharing.net [IPv6:2a01:37:3000::53df:4ef0:0]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B8FA191; Wed, 13 Sep 2023 07:31:30 -0700 (PDT) Received: from h08.hostsharing.net (h08.hostsharing.net [IPv6:2a01:37:1000::53df:5f1c:0]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "*.hostsharing.net", Issuer "RapidSSL Global TLS RSA4096 SHA256 2022 CA1" (verified OK)) by bmailout2.hostsharing.net (Postfix) with ESMTPS id BEB8C2800C99A; Wed, 13 Sep 2023 16:31:28 +0200 (CEST) Received: by h08.hostsharing.net (Postfix, from userid 100393) id A3BCD902E; Wed, 13 Sep 2023 16:31:28 +0200 (CEST) Date: Wed, 13 Sep 2023 16:31:28 +0200 From: Lukas Wunner To: Mario Limonciello Cc: Bjorn Helgaas , "Rafael J . Wysocki" , Mika Westerberg , Hans de Goede , Shyam Sundar S K , "open list:X86 PLATFORM DRIVERS" , "open list:PCI SUBSYSTEM" , linux-pm@vger.kernel.org, "open list:USB XHCI DRIVER" , iain@orangesquash.org.uk Subject: Re: [PATCH v18 2/2] PCI: Add a quirk for AMD PCIe root ports w/ USB4 controllers Message-ID: <20230913143128.GA29059@wunner.de> References: <20230913040832.114610-1-mario.limonciello@amd.com> <20230913040832.114610-3-mario.limonciello@amd.com> <20230913042522.GB1359@wunner.de> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org On Tue, Sep 12, 2023 at 11:43:53PM -0500, Mario Limonciello wrote: > On 9/12/2023 23:25, Lukas Wunner wrote: > > There's already PCI_DEV_FLAGS_NO_D3, would it be possible to just > > reuse that instead of adding another codepath for D3 quirks? > > > > The root port can handle D3 (including wakeup) at runtime fine. > Issue occurs only during s2idle w/ hardware sleep. I see. If this only affects system sleep, not runtime PM, what you can do is define a DECLARE_PCI_FIXUP_SUSPEND_LATE() which calls pci_d3cold_disable() and also define a DECLARE_PCI_FIXUP_CLASS_RESUME_EARLY() which calls pci_d3cold_enable(). And I think you can make those calls conditional on pm_suspend_no_platform() to constrain to s2idle. User space should still be able to influence runtime PM via the d3cold_allowed flag (unless I'm missing something). Thanks, Lukas