From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C94C0C46CA1 for ; Tue, 17 Oct 2023 19:02:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344010AbjJQTCV (ORCPT ); Tue, 17 Oct 2023 15:02:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51736 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234963AbjJQTCT (ORCPT ); Tue, 17 Oct 2023 15:02:19 -0400 Received: from emag.lindev.ch (unknown [81.221.122.240]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id CE00BF1; Tue, 17 Oct 2023 12:02:16 -0700 (PDT) Received: from ryzen9.fritz.box (unknown [81.221.122.240]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (prime256v1) server-digest SHA256) (No client certificate requested) (Authenticated sender: bero@lindev.ch) by emag.lindev.ch (Postfix) with ESMTPSA id 3FAE7200352; Tue, 17 Oct 2023 20:55:40 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=lindev.ch; s=default; t=1697568967; bh=Ja5GDjPjzlabYnV2JkRWGvSkZafw0uMJZhY2eX7wBEU=; h=From:To:Cc:Subject:Date; b=bwUV13uDuoGrWHkrXNS+oQ6IUy0EvbssEqXMay7fLEbO0f0rmiYwhSlggHKAPP132 JdZPX6ff2hnYGAD+F6RqTAqz+v73VNYA71Lo1I3k3Vz1F2FKsayEqVDJFXM6vtL1Ls eZv6ggVOs3t+M2vhPO/bq2Hdpqkl0kmtQuZ/zS7Y= From: =?UTF-8?q?Bernhard=20Rosenkr=C3=A4nzer?= To: daniel.lezcano@linaro.org, angelogioacchino.delregno@collabora.com, rafael@kernel.org, amitk@kernel.org, rui.zhang@intel.com, matthias.bgg@gmail.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, dunlap@infradead.org, e.xingchen@zte.com.cn, p.zabel@pengutronix.de Cc: linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, wenst@chromium.org, ames.lo@mediatek.com, rex-bc.chen@mediatek.com, nfraprado@collabora.com, abailon@baylibre.com, amergnat@baylibre.com, khilman@baylibre.com Subject: [PATCH v5 0/5] Add LVTS support for mt8192 Date: Tue, 17 Oct 2023 20:55:50 +0200 Message-ID: <20231017185555.142062-1-bero@lindev.ch> X-Mailer: git-send-email 2.42.0 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: Bernhard Rosenkränzer Add full LVTS support (MCU thermal domain + AP thermal domain) to MediaTek MT8192 SoC. Also, add Suspend and Resume support to LVTS Driver (all SoCs), and update the documentation that describes the Calibration Data Offsets. v5 changes are a lot smaller than originally assumed -- commit 185673ca71d3f7e9c7d62ee5084348e084352e56 fixed the issue I was originally planning to work around in this patchset, so what remains for v5 is noirq and cosmetics. Changelog: v5 : - Suspend/Resume in noirq stage - Reorder chipset specific functions - Rebased : base-commit: 4d5ab2376ec576af173e5eac3887ed0b51bd8566 v4 : - Shrink the lvts_ap thermal sensor I/O range to 0xc00 to make room for SVS support, pointed out by AngeloGioacchino Del Regno v3 : - Rebased : base-commit: 6a3d37b4d885129561e1cef361216f00472f7d2e - Fix issues in v2 pointed out by Nícolas F. R. A. Prado : Use filtered mode to make sure threshold interrupts are triggered, protocol documentation, cosmetics - I (bero@baylibre.com) will be taking care of this patchset from now on, since Balsam has left BayLibre. Thanks for getting it almost ready, Balsam! v2 : - Based on top of thermal/linux-next : base-commit: 7ac82227ee046f8234471de4c12a40b8c2d3ddcc - Squash "add thermal zones and thermal nodes" and "add temperature mitigation threshold" commits together to form "arm64: dts: mediatek: mt8192: Add thermal nodes and thermal zones" commit. - Add Suspend and Resume support to LVTS Driver. - Update Calibration Data documentation. - Fix calibration data offsets for mt8192 (Thanks to "Chen-Yu Tsai" and "Nícolas F. R. A. Prado"). https://lore.kernel.org/all/20230425133052.199767-1-bchihi@baylibre.com/ Tested-by: Chen-Yu Tsai v1 : - The initial series "Add LVTS support for mt8192" : "https://lore.kernel.org/all/20230307163413.143334-1-bchihi@baylibre.com/". Balsam CHIHI (5): dt-bindings: thermal: mediatek: Add LVTS thermal controller definition for mt8192 thermal/drivers/mediatek/lvts_thermal: Add suspend and resume thermal/drivers/mediatek/lvts_thermal: Add mt8192 support arm64: dts: mediatek: mt8192: Add thermal nodes and thermal zones thermal/drivers/mediatek/lvts_thermal: Update calibration data documentation arch/arm64/boot/dts/mediatek/mt8192.dtsi | 454 ++++++++++++++++++ drivers/thermal/mediatek/lvts_thermal.c | 163 ++++++- .../thermal/mediatek,lvts-thermal.h | 19 + 3 files changed, 634 insertions(+), 2 deletions(-) -- 2.42.0