[PATCH 7/9] thermal/drivers/mediatek/lvts_thermal: provision for gt variable location

Nicolas Pitre
2024-01-11T22:30:39Z

From: Nicolas Pitre <npitre@baylibre.com>

The golden temperature calibration value in nvram is not always the
3rd byte. A future commit will prove this assumption wrong.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
---
drivers/thermal/mediatek/lvts_thermal.c | 20 ++++++++++++++------
1 file changed, 14 insertions(+), 6 deletions(-)

diff --git a/drivers/thermal/mediatek/lvts_thermal.c b/drivers/thermal/mediatek/lvts_thermal.c
index e923d22c17..b20b70fd36 100644
--- a/drivers/thermal/mediatek/lvts_thermal.c
+++ b/drivers/thermal/mediatek/lvts_thermal.c
@@ -121,6 +121,7 @@ struct lvts_data {
int num_lvts_ctrl;
int temp_factor;
int temp_offset;
+ int gt_calib_bit_offset;
};

struct lvts_sensor {
@@ -748,20 +749,21 @@ static int lvts_calibration_read(struct device *dev, struct lvts_domain *lvts_td
return 0;
}

-static int lvts_golden_temp_init(struct device *dev, u8 *calib, int temp_offset)
+static int lvts_golden_temp_init(struct device *dev, u8 *calib,
+ const struct lvts_data *lvts_data)
{
u32 gt;

/*
- * The golden temp information is contained in the 4th byte (index = 3)
- * of efuse data.
+ * The golden temp information is contained in the first 32-bit
+ * word of efuse data at a specific bit offset.
*/
- gt = calib[3];
+ gt = (((u32 *)calib)[0] >> lvts_data->gt_calib_bit_offset) & 0xff;

if (gt && gt < LVTS_GOLDEN_TEMP_MAX)
golden_temp = gt;

- golden_temp_offset = golden_temp * 500 + temp_offset;
+ golden_temp_offset = golden_temp * 500 + lvts_data->temp_offset;

return 0;
}
@@ -780,7 +782,7 @@ static int lvts_ctrl_init(struct device *dev, struct lvts_domain *lvts_td,
if (ret)
return ret;

- ret = lvts_golden_temp_init(dev, lvts_td->calib, lvts_data->temp_offset);
+ ret = lvts_golden_temp_init(dev, lvts_td->calib, lvts_data);
if (ret)
return ret;

@@ -1622,6 +1624,7 @@ static const struct lvts_data mt7988_lvts_ap_data = {
.num_lvts_ctrl = ARRAY_SIZE(mt7988_lvts_ap_data_ctrl),
.temp_factor = LVTS_COEFF_A_MT7988,
.temp_offset = LVTS_COEFF_B_MT7988,
+ .gt_calib_bit_offset = 24,
};

static const struct lvts_data mt8186_lvts_data = {
@@ -1629,16 +1632,19 @@ static const struct lvts_data mt8186_lvts_data = {
.num_lvts_ctrl = ARRAY_SIZE(mt8186_lvts_data_ctrl),
.temp_factor = LVTS_COEFF_A_MT8186,
.temp_offset = LVTS_COEFF_B_MT8186,
+ .gt_calib_bit_offset = 24,
};

static const struct lvts_data mt8192_lvts_mcu_data = {
.lvts_ctrl = mt8192_lvts_mcu_data_ctrl,
.num_lvts_ctrl = ARRAY_SIZE(mt8192_lvts_mcu_data_ctrl),
+ .gt_calib_bit_offset = 24,
};

static const struct lvts_data mt8192_lvts_ap_data = {
.lvts_ctrl = mt8192_lvts_ap_data_ctrl,
.num_lvts_ctrl = ARRAY_SIZE(mt8192_lvts_ap_data_ctrl),
+ .gt_calib_bit_offset = 24,
};

static const struct lvts_data mt8195_lvts_mcu_data = {
@@ -1646,6 +1652,7 @@ static const struct lvts_data mt8195_lvts_mcu_data = {
.num_lvts_ctrl = ARRAY_SIZE(mt8195_lvts_mcu_data_ctrl),
.temp_factor = LVTS_COEFF_A_MT8195,
.temp_offset = LVTS_COEFF_B_MT8195,
+ .gt_calib_bit_offset = 24,
};

static const struct lvts_data mt8195_lvts_ap_data = {
@@ -1653,6 +1660,7 @@ static const struct lvts_data mt8195_lvts_ap_data = {
.num_lvts_ctrl = ARRAY_SIZE(mt8195_lvts_ap_data_ctrl),
.temp_factor = LVTS_COEFF_A_MT8195,
.temp_offset = LVTS_COEFF_B_MT8195,
+ .gt_calib_bit_offset = 24,
};

static const struct of_device_id lvts_of_match[] = {
--
2.42.0