[PATCH 0/3] cpufreq: sun50i: add Allwinner H700 speed bin and additional OPPs

[PATCH 0/3] cpufreq: sun50i: add Allwinner H700 speed bin and additional OPPs

[Ryan Walklin]

Hi,

Support for the Allwinner H618, H618 and H700 was added to the sun50i cpufreq-nvmem driver recently [1] however at the time some operating points supported by the H700 and in use in vendor BSPs were found to be unstable during testing, so the H700 speed bin was not included in the mainline driver. 

Retesting with kernel 6.10rc2 (which carries subsequent fixes for the driver) shows stable operation with these additional OPPs.

This patchset adds the H700 speedbin index, enables the additional operating points for the H700 in the H616 OPP table, and enables DVFS support for the Anbernic REG35XX handheld devices, which are the only mainline-supported devices currently using the H700.

Regards,

Ryan

[1] https://lore.kernel.org/linux-sunxi/20240418154408.1740047-1-andre.przywara@arm.com

Ryan Walklin (3):
  cpufreq: sun50i: add Allwinner H700 speed bin
  arm64: dts: allwinner: h616: add additional CPU OPPs for the H700
  arm64: dts: allwinner: rg35xx: Enable DVFS CPU frequency scaling

 .../dts/allwinner/sun50i-h616-cpu-opp.dtsi    | 25 +++++++++++++------
 .../sun50i-h700-anbernic-rg35xx-2024.dts      |  4 +--
 drivers/cpufreq/sun50i-cpufreq-nvmem.c        |  3 +++
 3 files changed, 23 insertions(+), 9 deletions(-)

-- 
2.45.2

[PATCH 1/3] cpufreq: sun50i: add Allwinner H700 speed bin

[Ryan Walklin]

Support for the Allwinner H618, H618 and H700 was added to the sun50i
cpufreq-nvmem driver recently [1] however at the time some operating
points supported by the H700 (1.008, 1.032 and 1.512 GHz) and in use by
vendor BSPs were found to be unstable during testing, so the H700 speed
bin and  the 1.032 GHz OPP were not included in the mainline driver.

Retesting with kernel 6.10rc2 (which carries additional fixes for the
driver) now shows stable operation with these points.

Add the H700 speed bin to the driver.

Signed-off-by: Ryan Walklin <ryan@testtoast.com>
--
[1] https://lore.kernel.org/linux-sunxi/20240418154408.1740047-1-andre.przywara@arm.com
---
 drivers/cpufreq/sun50i-cpufreq-nvmem.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/cpufreq/sun50i-cpufreq-nvmem.c b/drivers/cpufreq/sun50i-cpufreq-nvmem.c
index 0b882765cd66f..969f22aadd950 100644
--- a/drivers/cpufreq/sun50i-cpufreq-nvmem.c
+++ b/drivers/cpufreq/sun50i-cpufreq-nvmem.c
@@ -91,6 +91,9 @@ static u32 sun50i_h616_efuse_xlate(u32 speedbin)
 	case 0x5d00:
 		value = 0;
 		break;
+	case 0x6c00:
+		value = 5;
+		break;
 	default:
 		pr_warn("sun50i-cpufreq-nvmem: unknown speed bin 0x%x, using default bin 0\n",
 			speedbin & 0xffff);
-- 
2.45.2

Re: [PATCH 1/3] cpufreq: sun50i: add Allwinner H700 speed bin

[Andre Przywara]

On Fri,  7 Jun 2024 21:20:33 +1200
Ryan Walklin <ryan@testtoast.com> wrote:

> Support for the Allwinner H618, H618 and H700 was added to the sun50i
> cpufreq-nvmem driver recently [1] however at the time some operating
> points supported by the H700 (1.008, 1.032 and 1.512 GHz) and in use by
> vendor BSPs were found to be unstable during testing, so the H700 speed
> bin and  the 1.032 GHz OPP were not included in the mainline driver.
> 
> Retesting with kernel 6.10rc2 (which carries additional fixes for the
> driver) now shows stable operation with these points.
> 
> Add the H700 speed bin to the driver.
> 
> Signed-off-by: Ryan Walklin <ryan@testtoast.com>

Yes, 0x6c00 is the value for the H700 SoCs in the devices we have seen:

Reviewed-by: Andre Przywara <andre.przywara@arm.com>

Thanks,
Andre

> --
> [1] https://lore.kernel.org/linux-sunxi/20240418154408.1740047-1-andre.przywara@arm.com
> ---
>  drivers/cpufreq/sun50i-cpufreq-nvmem.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/cpufreq/sun50i-cpufreq-nvmem.c b/drivers/cpufreq/sun50i-cpufreq-nvmem.c
> index 0b882765cd66f..969f22aadd950 100644
> --- a/drivers/cpufreq/sun50i-cpufreq-nvmem.c
> +++ b/drivers/cpufreq/sun50i-cpufreq-nvmem.c
> @@ -91,6 +91,9 @@ static u32 sun50i_h616_efuse_xlate(u32 speedbin)
>  	case 0x5d00:
>  		value = 0;
>  		break;
> +	case 0x6c00:
> +		value = 5;
> +		break;
>  	default:
>  		pr_warn("sun50i-cpufreq-nvmem: unknown speed bin 0x%x, using default bin 0\n",
>  			speedbin & 0xffff);

Re: [PATCH 1/3] cpufreq: sun50i: add Allwinner H700 speed bin

[Viresh Kumar]

On 19-06-24, 01:00, Andre Przywara wrote:
> On Fri,  7 Jun 2024 21:20:33 +1200
> Ryan Walklin <ryan@testtoast.com> wrote:
> 
> > Support for the Allwinner H618, H618 and H700 was added to the sun50i
> > cpufreq-nvmem driver recently [1] however at the time some operating
> > points supported by the H700 (1.008, 1.032 and 1.512 GHz) and in use by
> > vendor BSPs were found to be unstable during testing, so the H700 speed
> > bin and  the 1.032 GHz OPP were not included in the mainline driver.
> > 
> > Retesting with kernel 6.10rc2 (which carries additional fixes for the
> > driver) now shows stable operation with these points.
> > 
> > Add the H700 speed bin to the driver.
> > 
> > Signed-off-by: Ryan Walklin <ryan@testtoast.com>
> 
> Yes, 0x6c00 is the value for the H700 SoCs in the devices we have seen:
> 
> Reviewed-by: Andre Przywara <andre.przywara@arm.com>

Applied. Thanks.

-- 
viresh

[PATCH 2/3] arm64: dts: allwinner: h616: add additional CPU OPPs for the H700

[Ryan Walklin]

The H700 now shows stable operation with the 1.008, 1.032 and 1.512 GHz
DVFS operating points. The 1.5GHz OPP requires a VDD-CPU of 1.16V,
obtained from the vendor BSP. This voltage is slightly above the
recommended operating voltage for the H616 (H700 datasheet not publicly
available) but well within the absolute maximum of 1.3V.

Add the additional 1.032 GHz operating point to the H616 CPU-OPP table,
and enable the 1.008 and 1.512 points for the H700.

Signed-off-by: Ryan Walklin <ryan@testtoast.com>
---
 .../dts/allwinner/sun50i-h616-cpu-opp.dtsi    | 25 +++++++++++++------
 1 file changed, 18 insertions(+), 7 deletions(-)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-cpu-opp.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616-cpu-opp.dtsi
index aca22a7f0191c..dd10aaf472b66 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h616-cpu-opp.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-cpu-opp.dtsi
@@ -11,7 +11,7 @@ opp-480000000 {
 			opp-hz = /bits/ 64 <480000000>;
 			opp-microvolt = <900000>;
 			clock-latency-ns = <244144>; /* 8 32k periods */
-			opp-supported-hw = <0x1f>;
+			opp-supported-hw = <0x3f>;
 		};
 
 		opp-600000000 {
@@ -25,7 +25,7 @@ opp-720000000 {
 			opp-hz = /bits/ 64 <720000000>;
 			opp-microvolt = <900000>;
 			clock-latency-ns = <244144>; /* 8 32k periods */
-			opp-supported-hw = <0x0d>;
+			opp-supported-hw = <0x2d>;
 		};
 
 		opp-792000000 {
@@ -50,8 +50,16 @@ opp-1008000000 {
 			opp-microvolt-speed2 = <950000>;
 			opp-microvolt-speed3 = <950000>;
 			opp-microvolt-speed4 = <1020000>;
+			opp-microvolt-speed5 = <900000>;
 			clock-latency-ns = <244144>; /* 8 32k periods */
-			opp-supported-hw = <0x1f>;
+			opp-supported-hw = <0x3f>;
+		};
+
+		opp-1032000000 {
+			opp-hz = /bits/ 64 <1032000000>;
+			opp-microvolt = <900000>;
+			clock-latency-ns = <244144>; /* 8 32k periods */
+			opp-supported-hw = <0x20>;
 		};
 
 		opp-1104000000 {
@@ -59,8 +67,9 @@ opp-1104000000 {
 			opp-microvolt-speed0 = <1000000>;
 			opp-microvolt-speed2 = <1000000>;
 			opp-microvolt-speed3 = <1000000>;
+			opp-microvolt-speed5 = <950000>;
 			clock-latency-ns = <244144>; /* 8 32k periods */
-			opp-supported-hw = <0x0d>;
+			opp-supported-hw = <0x2d>;
 		};
 
 		opp-1200000000 {
@@ -70,8 +79,9 @@ opp-1200000000 {
 			opp-microvolt-speed2 = <1050000>;
 			opp-microvolt-speed3 = <1050000>;
 			opp-microvolt-speed4 = <1100000>;
+			opp-microvolt-speed5 = <1020000>;
 			clock-latency-ns = <244144>; /* 8 32k periods */
-			opp-supported-hw = <0x1f>;
+			opp-supported-hw = <0x3f>;
 		};
 
 		opp-1320000000 {
@@ -85,15 +95,16 @@ opp-1416000000 {
 			opp-hz = /bits/ 64 <1416000000>;
 			opp-microvolt = <1100000>;
 			clock-latency-ns = <244144>; /* 8 32k periods */
-			opp-supported-hw = <0x0d>;
+			opp-supported-hw = <0x2d>;
 		};
 
 		opp-1512000000 {
 			opp-hz = /bits/ 64 <1512000000>;
 			opp-microvolt-speed1 = <1100000>;
 			opp-microvolt-speed3 = <1100000>;
+			opp-microvolt-speed5 = <1160000>;
 			clock-latency-ns = <244144>; /* 8 32k periods */
-			opp-supported-hw = <0x0a>;
+			opp-supported-hw = <0x2a>;
 		};
 	};
 };
-- 
2.45.2

Re: [PATCH 2/3] arm64: dts: allwinner: h616: add additional CPU OPPs for the H700

[Andre Przywara]

On Fri,  7 Jun 2024 21:20:34 +1200
Ryan Walklin <ryan@testtoast.com> wrote:

Hi,

> The H700 now shows stable operation with the 1.008, 1.032 and 1.512 GHz
> DVFS operating points. The 1.5GHz OPP requires a VDD-CPU of 1.16V,
> obtained from the vendor BSP. This voltage is slightly above the
> recommended operating voltage for the H616 (H700 datasheet not publicly
> available) but well within the absolute maximum of 1.3V.
> 
> Add the additional 1.032 GHz operating point to the H616 CPU-OPP table,
> and enable the 1.008 and 1.512 points for the H700.

This matches the values I had in the previous version of this patch:
 
> Signed-off-by: Ryan Walklin <ryan@testtoast.com>

Reviewed-by: Andre Przywara <andre.przywara@arm.com>

Cheers,
Andre

> ---
>  .../dts/allwinner/sun50i-h616-cpu-opp.dtsi    | 25 +++++++++++++------
>  1 file changed, 18 insertions(+), 7 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-cpu-opp.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616-cpu-opp.dtsi
> index aca22a7f0191c..dd10aaf472b66 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-h616-cpu-opp.dtsi
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-cpu-opp.dtsi
> @@ -11,7 +11,7 @@ opp-480000000 {
>  			opp-hz = /bits/ 64 <480000000>;
>  			opp-microvolt = <900000>;
>  			clock-latency-ns = <244144>; /* 8 32k periods */
> -			opp-supported-hw = <0x1f>;
> +			opp-supported-hw = <0x3f>;
>  		};
>  
>  		opp-600000000 {
> @@ -25,7 +25,7 @@ opp-720000000 {
>  			opp-hz = /bits/ 64 <720000000>;
>  			opp-microvolt = <900000>;
>  			clock-latency-ns = <244144>; /* 8 32k periods */
> -			opp-supported-hw = <0x0d>;
> +			opp-supported-hw = <0x2d>;
>  		};
>  
>  		opp-792000000 {
> @@ -50,8 +50,16 @@ opp-1008000000 {
>  			opp-microvolt-speed2 = <950000>;
>  			opp-microvolt-speed3 = <950000>;
>  			opp-microvolt-speed4 = <1020000>;
> +			opp-microvolt-speed5 = <900000>;
>  			clock-latency-ns = <244144>; /* 8 32k periods */
> -			opp-supported-hw = <0x1f>;
> +			opp-supported-hw = <0x3f>;
> +		};
> +
> +		opp-1032000000 {
> +			opp-hz = /bits/ 64 <1032000000>;
> +			opp-microvolt = <900000>;
> +			clock-latency-ns = <244144>; /* 8 32k periods */
> +			opp-supported-hw = <0x20>;
>  		};
>  
>  		opp-1104000000 {
> @@ -59,8 +67,9 @@ opp-1104000000 {
>  			opp-microvolt-speed0 = <1000000>;
>  			opp-microvolt-speed2 = <1000000>;
>  			opp-microvolt-speed3 = <1000000>;
> +			opp-microvolt-speed5 = <950000>;
>  			clock-latency-ns = <244144>; /* 8 32k periods */
> -			opp-supported-hw = <0x0d>;
> +			opp-supported-hw = <0x2d>;
>  		};
>  
>  		opp-1200000000 {
> @@ -70,8 +79,9 @@ opp-1200000000 {
>  			opp-microvolt-speed2 = <1050000>;
>  			opp-microvolt-speed3 = <1050000>;
>  			opp-microvolt-speed4 = <1100000>;
> +			opp-microvolt-speed5 = <1020000>;
>  			clock-latency-ns = <244144>; /* 8 32k periods */
> -			opp-supported-hw = <0x1f>;
> +			opp-supported-hw = <0x3f>;
>  		};
>  
>  		opp-1320000000 {
> @@ -85,15 +95,16 @@ opp-1416000000 {
>  			opp-hz = /bits/ 64 <1416000000>;
>  			opp-microvolt = <1100000>;
>  			clock-latency-ns = <244144>; /* 8 32k periods */
> -			opp-supported-hw = <0x0d>;
> +			opp-supported-hw = <0x2d>;
>  		};
>  
>  		opp-1512000000 {
>  			opp-hz = /bits/ 64 <1512000000>;
>  			opp-microvolt-speed1 = <1100000>;
>  			opp-microvolt-speed3 = <1100000>;
> +			opp-microvolt-speed5 = <1160000>;
>  			clock-latency-ns = <244144>; /* 8 32k periods */
> -			opp-supported-hw = <0x0a>;
> +			opp-supported-hw = <0x2a>;
>  		};
>  	};
>  };

[PATCH 3/3] arm64: dts: allwinner: rg35xx: Enable DVFS CPU frequency scaling

[Ryan Walklin]

The Anbernic RG35XX device variants (-2024, -H, -Plus and -SP) are the
only currently known devices to have an Allwinner H700 SoC. The closely
related RG28XX also has the H700 but a mainline DT for this device has
not yet been submitted.

Include the H616 CPU OPP table in the base device DTS, and increase the
DCDC1 regulator (vdd-cpu) upper voltage range to 1.16V, allowing the
CPU to reach 1.5GHz.

Signed-off-by: Ryan Walklin <ryan@testtoast.com>
---
 .../boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-2024.dts   | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-2024.dts b/arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-2024.dts
index ee30584b6ad70..afb49e65859f9 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-2024.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-2024.dts
@@ -6,7 +6,7 @@
 /dts-v1/;
 
 #include "sun50i-h616.dtsi"
-
+#include "sun50i-h616-cpu-opp.dtsi"
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/linux-event-codes.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
@@ -221,7 +221,7 @@ regulators {
 			reg_dcdc1: dcdc1 {
 				regulator-always-on;
 				regulator-min-microvolt = <900000>;
-				regulator-max-microvolt = <1100000>;
+				regulator-max-microvolt = <1160000>;
 				regulator-name = "vdd-cpu";
 			};
 
-- 
2.45.2

Re: [PATCH 3/3] arm64: dts: allwinner: rg35xx: Enable DVFS CPU frequency scaling

[Andre Przywara]

On Fri,  7 Jun 2024 21:20:35 +1200
Ryan Walklin <ryan@testtoast.com> wrote:

> The Anbernic RG35XX device variants (-2024, -H, -Plus and -SP) are the
> only currently known devices to have an Allwinner H700 SoC. The closely
> related RG28XX also has the H700 but a mainline DT for this device has
> not yet been submitted.
> 
> Include the H616 CPU OPP table in the base device DTS, and increase the
> DCDC1 regulator (vdd-cpu) upper voltage range to 1.16V, allowing the
> CPU to reach 1.5GHz.
> 
> Signed-off-by: Ryan Walklin <ryan@testtoast.com>

Reviewed-by: Andre Przywara <andre.przywara@arm.com>

Cheers,
Andre

> ---
>  .../boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-2024.dts   | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-2024.dts b/arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-2024.dts
> index ee30584b6ad70..afb49e65859f9 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-2024.dts
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-2024.dts
> @@ -6,7 +6,7 @@
>  /dts-v1/;
>  
>  #include "sun50i-h616.dtsi"
> -
> +#include "sun50i-h616-cpu-opp.dtsi"
>  #include <dt-bindings/gpio/gpio.h>
>  #include <dt-bindings/input/linux-event-codes.h>
>  #include <dt-bindings/interrupt-controller/arm-gic.h>
> @@ -221,7 +221,7 @@ regulators {
>  			reg_dcdc1: dcdc1 {
>  				regulator-always-on;
>  				regulator-min-microvolt = <900000>;
> -				regulator-max-microvolt = <1100000>;
> +				regulator-max-microvolt = <1160000>;
>  				regulator-name = "vdd-cpu";
>  			};
>  

Re: (subset) [PATCH 0/3] cpufreq: sun50i: add Allwinner H700 speed bin and additional OPPs

[Chen-Yu Tsai]

On Fri, 07 Jun 2024 21:20:32 +1200, Ryan Walklin wrote:
> Support for the Allwinner H618, H618 and H700 was added to the sun50i cpufreq-nvmem driver recently [1] however at the time some operating points supported by the H700 and in use in vendor BSPs were found to be unstable during testing, so the H700 speed bin was not included in the mainline driver.
> 
> Retesting with kernel 6.10rc2 (which carries subsequent fixes for the driver) shows stable operation with these additional OPPs.
> 
> This patchset adds the H700 speedbin index, enables the additional operating points for the H700 in the H616 OPP table, and enables DVFS support for the Anbernic REG35XX handheld devices, which are the only mainline-supported devices currently using the H700.
> 
> Regards,
> 
> [...]

Applied to sunxi/dt-for-6.11 in sunxi/linux.git, thanks!

[2/3] arm64: dts: allwinner: h616: add additional CPU OPPs for the H700
      https://git.kernel.org/sunxi/linux/c/b05f15d0fc15
[3/3] arm64: dts: allwinner: rg35xx: Enable DVFS CPU frequency scaling
      https://git.kernel.org/sunxi/linux/c/e1e61fe3452d

Best regards,
-- 
Chen-Yu Tsai <wens@csie.org>

Re: (subset) [PATCH 0/3] cpufreq: sun50i: add Allwinner H700 speed bin and additional OPPs

[Philippe Simons]

I made some more tests, and it seems the schedutil governors is hanging.

I don't have the technical knowledge to find why or where, but I wanted 
to report it here.

Others cpu_freq governors are working fine (so far).


Philippe

On 22/06/24 17:17, Chen-Yu Tsai wrote:
> On Fri, 07 Jun 2024 21:20:32 +1200, Ryan Walklin wrote:
>> Support for the Allwinner H618, H618 and H700 was added to the sun50i cpufreq-nvmem driver recently [1] however at the time some operating points supported by the H700 and in use in vendor BSPs were found to be unstable during testing, so the H700 speed bin was not included in the mainline driver.
>>
>> Retesting with kernel 6.10rc2 (which carries subsequent fixes for the driver) shows stable operation with these additional OPPs.
>>
>> This patchset adds the H700 speedbin index, enables the additional operating points for the H700 in the H616 OPP table, and enables DVFS support for the Anbernic REG35XX handheld devices, which are the only mainline-supported devices currently using the H700.
>>
>> Regards,
>>
>> [...]
> Applied to sunxi/dt-for-6.11 in sunxi/linux.git, thanks!
>
> [2/3] arm64: dts: allwinner: h616: add additional CPU OPPs for the H700
>        https://git.kernel.org/sunxi/linux/c/b05f15d0fc15
> [3/3] arm64: dts: allwinner: rg35xx: Enable DVFS CPU frequency scaling
>        https://git.kernel.org/sunxi/linux/c/e1e61fe3452d
>
> Best regards,