From: Jie Zhan <zhanjie9@hisilicon.com>
To: <ionela.voinescu@arm.com>, <beata.michalska@arm.com>,
<wangxiongfeng2@huawei.com>, <viresh.kumar@linaro.org>,
<rafael@kernel.org>
Cc: <linux-pm@vger.kernel.org>, <linux-acpi@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>, <linuxarm@huawei.com>,
<zhanjie9@hisilicon.com>, <jonathan.cameron@huawei.com>,
<wanghuiqiang@huawei.com>, <zhenglifeng1@huawei.com>,
<lihuisong@huawei.com>, <yangyicong@huawei.com>,
<liaochang1@huawei.com>, <zengheng4@huawei.com>
Subject: [PATCH v3 0/2] cppc_cpufreq: Rework ->get() error handling when cores are idle
Date: Thu, 19 Sep 2024 16:45:50 +0800 [thread overview]
Message-ID: <20240919084552.3591400-1-zhanjie9@hisilicon.com> (raw)
CPPC feedback counters can be unchanged or 0 when cores are idle, e.g.
clock-gated or power-gated. In such case, get the latest desired perf for
calculating frequency.
Also, the HiSilicon CPPC workaround can now be removed as it can be handled
by the common code.
---
v3:
- Merge patch 1 & 2, tidy up the logic, and reduce duplicate code
- Return 0 in cppc_perf_from_fbctrs() if the feedback counters are
unchanged rather than return a cached desired perf
- Return early in cppc_scale_freq_workfn() if the feedback counters are
unchanged
v2:
- Try reading the lastest desired perf first before using the cached one
- Do the same handling logic when feedback counters are unchanged
- Remove hisilicon workaround
Discussions:
v1: https://lore.kernel.org/all/20240819035147.2239767-1-zhanjie9@hisilicon.com/
v2: https://lore.kernel.org/all/20240912072231.439332-1-zhanjie9@hisilicon.com/
Jie Zhan (2):
cppc_cpufreq: Use desired perf if feedback ctrs are 0 or unchanged
cppc_cpufreq: Remove HiSilicon CPPC workaround
drivers/cpufreq/cppc_cpufreq.c | 120 +++++++++++----------------------
1 file changed, 39 insertions(+), 81 deletions(-)
--
2.33.0
next reply other threads:[~2024-09-19 8:51 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-19 8:45 Jie Zhan [this message]
2024-09-19 8:45 ` [PATCH v3 1/2] cppc_cpufreq: Use desired perf if feedback ctrs are 0 or unchanged Jie Zhan
2024-09-25 9:28 ` lihuisong (C)
2024-09-26 2:57 ` Jie Zhan
2024-09-26 6:07 ` lihuisong (C)
2024-09-26 8:44 ` Jie Zhan
2024-09-26 10:08 ` lihuisong (C)
2024-09-19 8:45 ` [PATCH v3 2/2] cppc_cpufreq: Remove HiSilicon CPPC workaround Jie Zhan
2024-09-25 6:30 ` Xiongfeng Wang
2024-09-26 2:59 ` Jie Zhan
2024-09-25 9:36 ` lihuisong (C)
2024-09-26 2:59 ` Jie Zhan
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20240919084552.3591400-1-zhanjie9@hisilicon.com \
--to=zhanjie9@hisilicon.com \
--cc=beata.michalska@arm.com \
--cc=ionela.voinescu@arm.com \
--cc=jonathan.cameron@huawei.com \
--cc=liaochang1@huawei.com \
--cc=lihuisong@huawei.com \
--cc=linux-acpi@vger.kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-pm@vger.kernel.org \
--cc=linuxarm@huawei.com \
--cc=rafael@kernel.org \
--cc=viresh.kumar@linaro.org \
--cc=wanghuiqiang@huawei.com \
--cc=wangxiongfeng2@huawei.com \
--cc=yangyicong@huawei.com \
--cc=zengheng4@huawei.com \
--cc=zhenglifeng1@huawei.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox