From: Mario Limonciello <mario.limonciello@amd.com>
To: Borislav Petkov <bp@alien8.de>
Cc: Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>,
"Dave Hansen" <dave.hansen@linux.intel.com>,
"maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)"
<x86@kernel.org>, "H . Peter Anvin" <hpa@zytor.com>,
"Rafael J . Wysocki" <rafael@kernel.org>,
"Gautham R . Shenoy" <gautham.shenoy@amd.com>,
Mario Limonciello <mario.limonciello@amd.com>,
Perry Yuan <perry.yuan@amd.com>,
Brijesh Singh <brijesh.singh@amd.com>,
Peter Zijlstra <peterz@infradead.org>,
Li RongQing <lirongqing@baidu.com>,
"open list:X86 ARCHITECTURE (32-BIT AND 64-BIT)"
<linux-kernel@vger.kernel.org>,
"open list:ACPI" <linux-acpi@vger.kernel.org>,
"open list:AMD PSTATE DRIVER" <linux-pm@vger.kernel.org>,
Pawan Gupta <pawan.kumar.gupta@linux.intel.com>
Subject: [PATCH v3 3/5] x86/cpu: Enable SD_ASYM_PACKING for PKG Domain on AMD Processors
Date: Wed, 23 Oct 2024 12:43:55 -0500 [thread overview]
Message-ID: <20241023174357.34338-4-mario.limonciello@amd.com> (raw)
In-Reply-To: <20241023174357.34338-1-mario.limonciello@amd.com>
From: Perry Yuan <perry.yuan@amd.com>
Enable the SD_ASYM_PACKING domain flag for the PKG domain on AMD
heterogeneous processors.
This flag is beneficial for processors with one or more CCDs and
relies on x86_sched_itmt_flags().
Reviewed-by: Gautham R. Shenoy <gautham.shenoy@amd.com>
Signed-off-by: Perry Yuan <perry.yuan@amd.com>
Co-developed-by: Mario Limonciello <mario.limonciello@amd.com>
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
---
v3:
* Pick up tag
---
arch/x86/kernel/smpboot.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c
index 766f092dab80b..b5a8f0891135b 100644
--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -497,8 +497,9 @@ static int x86_cluster_flags(void)
static int x86_die_flags(void)
{
- if (cpu_feature_enabled(X86_FEATURE_HYBRID_CPU))
- return x86_sched_itmt_flags();
+ if (cpu_feature_enabled(X86_FEATURE_HYBRID_CPU) ||
+ cpu_feature_enabled(X86_FEATURE_AMD_HETEROGENEOUS_CORES))
+ return x86_sched_itmt_flags();
return 0;
}
--
2.43.0
next prev parent reply other threads:[~2024-10-23 17:44 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-23 17:43 [PATCH v3 0/5] x86 Heterogeneous design identification Mario Limonciello
2024-10-23 17:43 ` [PATCH v3 1/5] x86/cpufeatures: Rename X86_FEATURE_FAST_CPPC to have AMD prefix Mario Limonciello
2024-10-23 17:43 ` [PATCH v3 2/5] x86/cpufeatures: Add feature bits for AMD heterogeneous processor Mario Limonciello
2024-10-23 17:43 ` Mario Limonciello [this message]
2024-10-23 17:43 ` [PATCH v3 4/5] x86/cpu: Add CPU type to struct cpuinfo_topology Mario Limonciello
2024-10-25 13:47 ` Borislav Petkov
2024-10-25 16:53 ` Dave Hansen
2024-10-25 17:03 ` Pawan Gupta
2024-10-23 17:43 ` [PATCH v3 5/5] x86/amd: Use heterogeneous core topology for identifying boost numerator Mario Limonciello
2024-10-25 13:51 ` Borislav Petkov
2024-10-25 13:57 ` Mario Limonciello
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