From: Anand Moon <linux.amoon@gmail.com>
To: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>,
Krzysztof Kozlowski <krzk@kernel.org>,
"Rafael J. Wysocki" <rafael@kernel.org>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Zhang Rui <rui.zhang@intel.com>,
Lukasz Luba <lukasz.luba@arm.com>,
Alim Akhtar <alim.akhtar@samsung.com>,
linux-pm@vger.kernel.org (open list:SAMSUNG THERMAL DRIVER),
linux-samsung-soc@vger.kernel.org (open list:SAMSUNG THERMAL
DRIVER),
linux-arm-kernel@lists.infradead.org (moderated list:ARM/SAMSUNG
S3C, S5P AND EXYNOS ARM ARCHITECTURES),
linux-kernel@vger.kernel.org (open list)
Cc: Anand Moon <linux.amoon@gmail.com>
Subject: [RRC v1 3/3] thermal/drivers/exynos: Refactor IRQ clear logic using SoC-specific config
Date: Mon, 16 Jun 2025 22:08:24 +0530 [thread overview]
Message-ID: <20250616163831.8138-4-linux.amoon@gmail.com> (raw)
In-Reply-To: <20250616163831.8138-1-linux.amoon@gmail.com>
Refactors the IRQ clear logic in the Exynos TMU driver to eliminate
redundant code and enhance maintainability. Previously, the driver
relied on multiple SoC-specific functions or conditional branching
based on data->soc to handle differences in IRQ register behavior.
Change introduces a unified exynos_tmu_clear_irqs() function
that adapts its behavior using SoC-specific configuration fields
(tmu_intstat, tmu_intclear, and irq_clear_direct) defined in the
exynos_tmu_data structure. These fields are initialized per SoC
during device setup.
This refactor reduces code duplication, simplifies the addition of
new SoC support, and improves overall code clarity.
Signed-off-by: Anand Moon <linux.amoon@gmail.com>
---
drivers/thermal/samsung/exynos_tmu.c | 52 +++++++++++++++++-----------
1 file changed, 31 insertions(+), 21 deletions(-)
diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c
index b7522b7b1230..cd21b36674c3 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -172,6 +172,9 @@ enum soc_type {
* 0 < reference_voltage <= 31
* @tzd: pointer to thermal_zone_device structure
* @enabled: current status of TMU device
+ * @tmu_intstat: interrupt status register
+ * @tmu_intclear: interrupt clear register
+ * @irq_clear_support: SoC supports clear IRQ
* @tmu_set_low_temp: SoC specific method to set trip (falling threshold)
* @tmu_set_high_temp: SoC specific method to set trip (rising threshold)
* @tmu_set_crit_temp: SoC specific method to set critical temperature
@@ -198,6 +201,9 @@ struct exynos_tmu_data {
u8 reference_voltage;
struct thermal_zone_device *tzd;
bool enabled;
+ u32 tmu_intstat;
+ u32 tmu_intclear;
+ bool irq_clear_support;
void (*tmu_set_low_temp)(struct exynos_tmu_data *data, u8 temp);
void (*tmu_set_high_temp)(struct exynos_tmu_data *data, u8 temp);
@@ -785,28 +791,15 @@ static irqreturn_t exynos_tmu_threaded_irq(int irq, void *id)
return IRQ_HANDLED;
}
-static void exynos4210_tmu_clear_irqs(struct exynos_tmu_data *data)
+static void exynos_tmu_clear_irqs(struct exynos_tmu_data *data)
{
unsigned int val_irq, clearirq = 0;
- u32 tmu_intstat, tmu_intclear;
-
- if (data->soc == SOC_ARCH_EXYNOS5260) {
- tmu_intstat = EXYNOS5260_TMU_REG_INTSTAT;
- tmu_intclear = EXYNOS5260_TMU_REG_INTCLEAR;
- } else if (data->soc == SOC_ARCH_EXYNOS7) {
- tmu_intstat = EXYNOS7_TMU_REG_INTPEND;
- tmu_intclear = EXYNOS7_TMU_REG_INTPEND;
- } else if (data->soc == SOC_ARCH_EXYNOS5433) {
- tmu_intstat = EXYNOS5433_TMU_REG_INTPEND;
- tmu_intclear = EXYNOS5433_TMU_REG_INTPEND;
- } else {
- tmu_intstat = EXYNOS_TMU_REG_INTSTAT;
- tmu_intclear = EXYNOS_TMU_REG_INTCLEAR;
- }
+ u32 tmu_intstat = data->tmu_intstat;
+ u32 tmu_intclear = data->tmu_intclear;
val_irq = readl(data->base + tmu_intstat);
- if (data->soc == SOC_ARCH_EXYNOS4210) {
+ if (!data->irq_clear_support) {
writel(val_irq, data->base + tmu_intclear);
return;
}
@@ -900,12 +893,15 @@ static int exynos_map_dt_data(struct platform_device *pdev)
data->tmu_initialize = exynos4210_tmu_initialize;
data->tmu_control = exynos4210_tmu_control;
data->tmu_read = exynos4210_tmu_read;
- data->tmu_clear_irqs = exynos4210_tmu_clear_irqs;
+ data->tmu_clear_irqs = exynos_tmu_clear_irqs;
data->gain = 15;
data->reference_voltage = 7;
data->efuse_value = 55;
data->min_efuse_value = 40;
data->max_efuse_value = 100;
+ data->tmu_intstat = EXYNOS_TMU_REG_INTSTAT;
+ data->tmu_intclear = EXYNOS_TMU_REG_INTCLEAR;
+ data->irq_clear_support = false;
break;
case SOC_ARCH_EXYNOS3250:
case SOC_ARCH_EXYNOS4412:
@@ -922,7 +918,7 @@ static int exynos_map_dt_data(struct platform_device *pdev)
data->tmu_control = exynos4210_tmu_control;
data->tmu_read = exynos4412_tmu_read;
data->tmu_set_emulation = exynos4412_tmu_set_emulation;
- data->tmu_clear_irqs = exynos4210_tmu_clear_irqs;
+ data->tmu_clear_irqs = exynos_tmu_clear_irqs;
data->gain = 8;
data->reference_voltage = 16;
data->efuse_value = 55;
@@ -932,6 +928,14 @@ static int exynos_map_dt_data(struct platform_device *pdev)
else
data->min_efuse_value = 0;
data->max_efuse_value = 100;
+ data->irq_clear_support = true;
+ if (data->soc == SOC_ARCH_EXYNOS5260) {
+ data->tmu_intstat = EXYNOS5260_TMU_REG_INTSTAT;
+ data->tmu_intclear = EXYNOS5260_TMU_REG_INTCLEAR;
+ } else {
+ data->tmu_intstat = EXYNOS_TMU_REG_INTSTAT;
+ data->tmu_intclear = EXYNOS_TMU_REG_INTCLEAR;
+ }
break;
case SOC_ARCH_EXYNOS5433:
data->tmu_set_low_temp = exynos5433_tmu_set_low_temp;
@@ -943,7 +947,7 @@ static int exynos_map_dt_data(struct platform_device *pdev)
data->tmu_control = exynos5433_tmu_control;
data->tmu_read = exynos4412_tmu_read;
data->tmu_set_emulation = exynos4412_tmu_set_emulation;
- data->tmu_clear_irqs = exynos4210_tmu_clear_irqs;
+ data->tmu_clear_irqs = exynos_tmu_clear_irqs;
data->gain = 8;
if (res.start == EXYNOS5433_G3D_BASE)
data->reference_voltage = 23;
@@ -952,6 +956,9 @@ static int exynos_map_dt_data(struct platform_device *pdev)
data->efuse_value = 75;
data->min_efuse_value = 40;
data->max_efuse_value = 150;
+ data->tmu_intstat = EXYNOS5433_TMU_REG_INTPEND;
+ data->tmu_intclear = EXYNOS5433_TMU_REG_INTPEND;
+ data->irq_clear_support = true;
break;
case SOC_ARCH_EXYNOS7:
data->tmu_set_low_temp = exynos7_tmu_set_low_temp;
@@ -963,12 +970,15 @@ static int exynos_map_dt_data(struct platform_device *pdev)
data->tmu_control = exynos7_tmu_control;
data->tmu_read = exynos7_tmu_read;
data->tmu_set_emulation = exynos4412_tmu_set_emulation;
- data->tmu_clear_irqs = exynos4210_tmu_clear_irqs;
+ data->tmu_clear_irqs = exynos_tmu_clear_irqs;
data->gain = 9;
data->reference_voltage = 17;
data->efuse_value = 75;
data->min_efuse_value = 15;
data->max_efuse_value = 100;
+ data->tmu_intstat = EXYNOS7_TMU_REG_INTPEND;
+ data->tmu_intclear = EXYNOS7_TMU_REG_INTPEND;
+ data->irq_clear_support = true;
break;
default:
dev_err(&pdev->dev, "Platform not supported\n");
--
2.49.0
prev parent reply other threads:[~2025-06-16 16:39 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-16 16:38 [RRC v1 0/3] Simplify Exynos TMU IRQ clean logic Anand Moon
2025-06-16 16:38 ` [RRC v1 1/3] thermal/drivers/exynos: Remove unused base_second mapping and references Anand Moon
[not found] ` <CGME20250618125812eucas1p11a1ab5210d4efa95a51b3bc7c4f0924d@eucas1p1.samsung.com>
2025-06-18 12:58 ` Mateusz Majewski
2025-06-19 5:45 ` Anand Moon
2025-06-21 7:17 ` Anand Moon
[not found] ` <CGME20250625143825eucas1p2e95ba80552cd289b6e05db33f32ec14a@eucas1p2.samsung.com>
2025-06-25 14:38 ` Mateusz Majewski
2025-06-26 18:22 ` Anand Moon
2025-06-16 16:38 ` [RRC v1 2/3] thermal/drivers/exynos: Handle temperature threshold interrupts and clear corresponding IRQs Anand Moon
[not found] ` <CGME20250618115220eucas1p2b9d37e8cdd1997fa010f51cecdea5e4f@eucas1p2.samsung.com>
2025-06-18 11:52 ` Mateusz Majewski
2025-06-19 5:45 ` Anand Moon
2025-06-21 7:16 ` Anand Moon
[not found] ` <CGME20250624075847eucas1p2db6e908f78aa603bdf6aec38b653e9af@eucas1p2.samsung.com>
2025-06-24 7:58 ` Mateusz Majewski
2025-06-26 18:21 ` Anand Moon
2025-06-16 16:38 ` Anand Moon [this message]
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