From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1D0021F4C90; Mon, 21 Jul 2025 02:17:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753064241; cv=none; b=HNTmhuPmyE8hSxRjQ0+pIYwMrjfRI9zilSDq/F9dn2dkeEQc7Qt4BeMNP1XPBEgtmayLdk86HDbzfJi3eq42ggDPHsZTw/7P5SvbwBEDJlWJwG/t7oAft9pMue1x4uWnc8+CbRndylkiNA3G3Kgbxdx+dVJnT1xF1FegAd/7j20= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753064241; c=relaxed/simple; bh=JyF87RPkDaLpT/P1HT3Qoe8Kdjq7ScIPnxVM9dDy2FI=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=OP6m1yqfVChbFWi7t9Tvn09aaqvQsbrRSXZp8fueq5Vw7Nw2z1dwOYBStZHNy7DzKlPIychp59aY+CW0PcnTI3x6sLKzcCGqN/CSsyupYL0K3hCBhVm5Nn/7e5mF69P/btjXqtA9/qrgOeUnym77Z2kePu/B5IhJRAXJ27Inp20= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=ogl8rMKc; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="ogl8rMKc" Received: by smtp.kernel.org (Postfix) with ESMTPS id 802EBC2BC87; Mon, 21 Jul 2025 02:17:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1753064240; bh=JyF87RPkDaLpT/P1HT3Qoe8Kdjq7ScIPnxVM9dDy2FI=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=ogl8rMKcFjFfp4WaJ3OojUvBzj92K6pwdAcGfAiBwQ3klLiuK9XLOfHcbw/wPKt3J a+FmlCIOmtcvO0n1PCFhXAItuwmkzzo40QOSWr7M8mw5oNwnSlqz6X5sdiQuFgZFwS 44z34NwEZQNhI48E64KR8hc425KYBbsGQE8yUUzhpPkWJgtqUkmfb40/2uL46dByk4 PCKxBral+oVzxrIXFzd2HKvOBPrB+oxVvc3Ps4nefXiidCGWRgGD6Xjn7RpO5XdKQe Jye3nyqCUyVAYssUqrYFBTLwtwok+IN3nAm3ipRWRtKIkTKCXqzRWPa22bUrtitPV/ G7jPCZm8+eDZQ== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7346EC87FC3; Mon, 21 Jul 2025 02:17:20 +0000 (UTC) From: Aaron Kling via B4 Relay Date: Sun, 20 Jul 2025 21:15:01 -0500 Subject: [PATCH v2 07/17] dt-bindings: clock: tegra124-dfll: Document Tegra210B01 Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20250720-t210b01-v2-7-9cb209f1edfc@gmail.com> References: <20250720-t210b01-v2-0-9cb209f1edfc@gmail.com> In-Reply-To: <20250720-t210b01-v2-0-9cb209f1edfc@gmail.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Thierry Reding , Jonathan Hunter , Vinod Koul , Kishon Vijay Abraham I , Greg Kroah-Hartman , Nagarjuna Kristam , JC Kuo , "Rafael J. Wysocki" , Daniel Lezcano , Zhang Rui , Lukasz Luba , Michael Turquette , Stephen Boyd , Mathias Nyman , Peter De Schrijver , Prashant Gaikwad Cc: devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-usb@vger.kernel.org, Thierry Reding , linux-pm@vger.kernel.org, linux-clk@vger.kernel.org, Aaron Kling X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1753064238; l=1036; i=webgeek1234@gmail.com; s=20250217; h=from:subject:message-id; bh=7rvUsu8rYJf8zTq2a+g5h7mFfug/TkyFU9zjev3k0Uw=; b=DrQanWee+Rx+lddFQvDRapAfBnA2NR9vY/ny51dXSZ0bSOOgc1bqODjRYW1wyzQnXGTariAB/ mAcdH679EjYCMp/HlRUV6jJmnA8G+fRhEY9jSMEENisTspEuzUuDWKR X-Developer-Key: i=webgeek1234@gmail.com; a=ed25519; pk=TQwd6q26txw7bkK7B8qtI/kcAohZc7bHHGSD7domdrU= X-Endpoint-Received: by B4 Relay for webgeek1234@gmail.com/20250217 with auth_id=342 X-Original-From: Aaron Kling Reply-To: webgeek1234@gmail.com From: Aaron Kling Add Tegra210B01 support for DFLL clock. Acked-by: Rob Herring (Arm) Signed-off-by: Aaron Kling --- Documentation/devicetree/bindings/clock/nvidia,tegra124-dfll.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/clock/nvidia,tegra124-dfll.txt b/Documentation/devicetree/bindings/clock/nvidia,tegra124-dfll.txt index f7d347385b5775ddd702ecbb9821acfc9d4b9ff2..aa7d50d4fe6f2c1c2500c53e3421355ce2b67599 100644 --- a/Documentation/devicetree/bindings/clock/nvidia,tegra124-dfll.txt +++ b/Documentation/devicetree/bindings/clock/nvidia,tegra124-dfll.txt @@ -13,6 +13,7 @@ Required properties: - compatible : should be one of: - "nvidia,tegra124-dfll": for Tegra124 - "nvidia,tegra210-dfll": for Tegra210 + - "nvidia,tegra210b01-dfll": for Tegra210B01 - reg : Defines the following set of registers, in the order listed: - registers for the DFLL control logic. - registers for the I2C output logic. -- 2.50.1