From: Xi Pardee <xi.pardee@linux.intel.com>
To: xi.pardee@linux.intel.com, irenic.rajneesh@gmail.com,
david.e.box@linux.intel.com, hdegoede@redhat.com,
ilpo.jarvinen@linux.intel.com,
platform-driver-x86@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org
Subject: [PATCH v3 1/6] platform/x86:intel/pmc: Enable SSRAM support for Lunar Lake
Date: Fri, 15 Aug 2025 15:45:59 -0700 [thread overview]
Message-ID: <20250815224611.2460255-2-xi.pardee@linux.intel.com> (raw)
In-Reply-To: <20250815224611.2460255-1-xi.pardee@linux.intel.com>
Enable Lunar Lake platforms to achieve PMC information from
Intel PMC SSRAM Telemetry driver and substate requirements data
from telemetry region.
Signed-off-by: Xi Pardee <xi.pardee@linux.intel.com>
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
---
drivers/platform/x86/intel/pmc/lnl.c | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/drivers/platform/x86/intel/pmc/lnl.c b/drivers/platform/x86/intel/pmc/lnl.c
index da513c234714b..e08a77c778c2c 100644
--- a/drivers/platform/x86/intel/pmc/lnl.c
+++ b/drivers/platform/x86/intel/pmc/lnl.c
@@ -13,6 +13,10 @@
#include "core.h"
+#define SOCM_LPM_REQ_GUID 0x15099748
+
+static const u8 LNL_LPM_REG_INDEX[] = {0, 4, 5, 6, 8, 9, 10, 11, 12, 13, 14, 15, 16, 20};
+
static const struct pmc_bit_map lnl_ltr_show_map[] = {
{"SOUTHPORT_A", CNP_PMC_LTR_SPA},
{"SOUTHPORT_B", CNP_PMC_LTR_SPB},
@@ -528,6 +532,16 @@ static const struct pmc_reg_map lnl_socm_reg_map = {
.lpm_live_status_offset = MTL_LPM_LIVE_STATUS_OFFSET,
.s0ix_blocker_maps = lnl_blk_maps,
.s0ix_blocker_offset = LNL_S0IX_BLOCKER_OFFSET,
+ .lpm_reg_index = LNL_LPM_REG_INDEX,
+};
+
+static struct pmc_info lnl_pmc_info_list[] = {
+ {
+ .guid = SOCM_LPM_REQ_GUID,
+ .devid = PMC_DEVID_LNL_SOCM,
+ .map = &lnl_socm_reg_map,
+ },
+ {}
};
#define LNL_NPU_PCI_DEV 0x643e
@@ -557,6 +571,8 @@ static int lnl_core_init(struct pmc_dev *pmcdev, struct pmc_dev_info *pmc_dev_in
}
struct pmc_dev_info lnl_pmc_dev = {
+ .pci_func = 2,
+ .regmap_list = lnl_pmc_info_list,
.map = &lnl_socm_reg_map,
.suspend = cnl_suspend,
.resume = lnl_resume,
--
2.43.0
next prev parent reply other threads:[~2025-08-15 22:46 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-15 22:45 [PATCH v3 0/6] Enable SSRAM support in PTL and LNL Xi Pardee
2025-08-15 22:45 ` Xi Pardee [this message]
2025-08-15 22:46 ` [PATCH v3 2/6] platform/x86:intel/pmc: Move telemetry endpoint register handling Xi Pardee
2025-08-15 22:46 ` [PATCH v3 3/6] platform/x86:intel/pmc: Improve function to show substate header Xi Pardee
2025-08-28 13:09 ` Ilpo Järvinen
2025-08-15 22:46 ` [PATCH v3 4/6] platform/x86:intel/pmc: Show substate requirement for S0ix blockers Xi Pardee
2025-08-28 13:06 ` Ilpo Järvinen
2025-09-01 23:52 ` Russell Haley
2025-08-15 22:46 ` [PATCH v3 5/6] platform/x86:intel/pmc: Show device and function number Xi Pardee
2025-08-28 13:56 ` Ilpo Järvinen
2025-08-15 22:46 ` [PATCH v3 6/6] platform/x86:intel/pmc: Enable SSRAM support for Panther Lake Xi Pardee
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