From: Aaron Kling via B4 Relay <devnull+webgeek1234.gmail.com@kernel.org>
To: Krzysztof Kozlowski <krzk@kernel.org>,
Rob Herring <robh@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Thierry Reding <thierry.reding@gmail.com>,
Jonathan Hunter <jonathanh@nvidia.com>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
MyungJoo Ham <myungjoo.ham@samsung.com>,
Kyungmin Park <kyungmin.park@samsung.com>,
Chanwoo Choi <cw00.choi@samsung.com>,
Dmitry Osipenko <digetx@gmail.com>
Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
linux-tegra@vger.kernel.org, linux-pm@vger.kernel.org,
Aaron Kling <webgeek1234@gmail.com>
Subject: [PATCH RFC 6/7] arm64: tegra: Add interconnect properties to Tegra210 device-tree
Date: Thu, 28 Aug 2025 23:01:32 -0500 [thread overview]
Message-ID: <20250828-t210-actmon-v1-6-aeb19ec1f244@gmail.com> (raw)
In-Reply-To: <20250828-t210-actmon-v1-0-aeb19ec1f244@gmail.com>
From: Aaron Kling <webgeek1234@gmail.com>
Add interconnect properties to the Memory Controller, External Memory
Controller and the Display Controller nodes in order to describe hardware
interconnection.
Signed-off-by: Aaron Kling <webgeek1234@gmail.com>
---
arch/arm64/boot/dts/nvidia/tegra210.dtsi | 24 ++++++++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
index 6da10db893add44a98fde1666c382511212fd43c..2fcc7a28690f7100d49e8b93c4fb77de7947b002 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
@@ -202,6 +202,19 @@ dc@54200000 {
nvidia,outputs = <&dsia &dsib &sor0 &sor1>;
nvidia,head = <0>;
+
+ interconnects = <&mc TEGRA210_MC_DISPLAY0A &emc>,
+ <&mc TEGRA210_MC_DISPLAY0B &emc>,
+ <&mc TEGRA210_MC_DISPLAY0C &emc>,
+ <&mc TEGRA210_MC_DISPLAYHC &emc>,
+ <&mc TEGRA210_MC_DISPLAYD &emc>,
+ <&mc TEGRA210_MC_DISPLAYT &emc>;
+ interconnect-names = "wina",
+ "winb",
+ "winc",
+ "cursor",
+ "wind",
+ "wint";
};
dc@54240000 {
@@ -217,6 +230,15 @@ dc@54240000 {
nvidia,outputs = <&dsia &dsib &sor0 &sor1>;
nvidia,head = <1>;
+
+ interconnects = <&mc TEGRA210_MC_DISPLAY0AB &emc>,
+ <&mc TEGRA210_MC_DISPLAY0BB &emc>,
+ <&mc TEGRA210_MC_DISPLAY0CB &emc>,
+ <&mc TEGRA210_MC_DISPLAYHCB &emc>;
+ interconnect-names = "wina",
+ "winb",
+ "winc",
+ "cursor";
};
dsia: dsi@54300000 {
@@ -990,6 +1012,7 @@ mc: memory-controller@70019000 {
#iommu-cells = <1>;
#reset-cells = <1>;
+ #interconnect-cells = <1>;
};
emc: external-memory-controller@7001b000 {
@@ -1001,6 +1024,7 @@ emc: external-memory-controller@7001b000 {
clock-names = "emc";
interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
nvidia,memory-controller = <&mc>;
+ #interconnect-cells = <0>;
#cooling-cells = <2>;
};
--
2.50.1
next prev parent reply other threads:[~2025-08-29 4:01 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-29 4:01 [PATCH RFC 0/7] Support Tegra210 actmon for dynamic EMC scaling Aaron Kling via B4 Relay
2025-08-29 4:01 ` [PATCH RFC 1/7] dt-bindings: memory: tegra210: Add memory client IDs Aaron Kling via B4 Relay
2025-08-29 4:01 ` [PATCH RFC 2/7] dt-bindings: devfreq: tegra30-actmon: Add Tegra124 fallback for Tegra210 Aaron Kling via B4 Relay
2025-08-29 4:01 ` [PATCH RFC 3/7] soc: tegra: fuse: speedo-tegra210: Add soc speedo 2 Aaron Kling via B4 Relay
2025-08-29 4:01 ` [PATCH RFC 4/7] memory: tegra210: Support interconnect framework Aaron Kling via B4 Relay
2025-08-29 4:01 ` [PATCH RFC 5/7] arm64: tegra: tegra210: Add actmon Aaron Kling via B4 Relay
2025-08-29 4:01 ` Aaron Kling via B4 Relay [this message]
2025-08-29 4:01 ` [PATCH RFC 7/7] arm64: tegra: Add OPP tables on Tegra210 Aaron Kling via B4 Relay
2025-08-29 14:27 ` [PATCH RFC 0/7] Support Tegra210 actmon for dynamic EMC scaling Rob Herring (Arm)
2025-09-02 23:51 ` Mikko Perttunen
2025-09-03 0:55 ` Aaron Kling
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