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From: Xi Pardee <xi.pardee@linux.intel.com>
To: xi.pardee@linux.intel.com, irenic.rajneesh@gmail.com,
	david.e.box@linux.intel.com, hdegoede@redhat.com,
	ilpo.jarvinen@linux.intel.com,
	platform-driver-x86@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org
Subject: [PATCH 2/2] platform/x86:intel/pmc: Enable SSRAM support for Wildcat Lake
Date: Wed,  5 Nov 2025 13:50:15 -0800	[thread overview]
Message-ID: <20251105215020.1984036-2-xi.pardee@linux.intel.com> (raw)
In-Reply-To: <20251105215020.1984036-1-xi.pardee@linux.intel.com>

Enable Wildcat Lake platforms to achieve PMC information from
Intel PMC SSRAM Telemetry driver and substate requirements data
from telemetry region.

Signed-off-by: Xi Pardee <xi.pardee@linux.intel.com>
---
 drivers/platform/x86/intel/pmc/core.h |  2 ++
 drivers/platform/x86/intel/pmc/wcl.c  | 18 ++++++++++++++++++
 2 files changed, 20 insertions(+)

diff --git a/drivers/platform/x86/intel/pmc/core.h b/drivers/platform/x86/intel/pmc/core.h
index 61c8d3c5faa0f..272fb4f57f346 100644
--- a/drivers/platform/x86/intel/pmc/core.h
+++ b/drivers/platform/x86/intel/pmc/core.h
@@ -304,6 +304,8 @@ enum ppfear_regs {
 /* Wildcat Lake */
 #define WCL_PMC_LTR_RESERVED			0x1B64
 #define WCL_PCD_PMC_MMIO_REG_LEN		0x3178
+#define WCL_NUM_S0IX_BLOCKER			94
+#define WCL_BLK_REQ_OFFSET			50
 
 /* SSRAM PMC Device ID */
 /* LNL */
diff --git a/drivers/platform/x86/intel/pmc/wcl.c b/drivers/platform/x86/intel/pmc/wcl.c
index 85e90a639e651..a45707e6364f2 100644
--- a/drivers/platform/x86/intel/pmc/wcl.c
+++ b/drivers/platform/x86/intel/pmc/wcl.c
@@ -11,6 +11,9 @@
 
 #include "core.h"
 
+/* PMC SSRAM PMT Telemetry GUIDS */
+#define PCDN_LPM_REQ_GUID 0x33747648
+
 static const struct pmc_bit_map wcl_pcdn_pfear_map[] = {
 	{"PMC_0",               BIT(0)},
 	{"FUSE_OSSE",           BIT(1)},
@@ -453,6 +456,17 @@ static const struct pmc_reg_map wcl_pcdn_reg_map = {
 	.lpm_live_status_offset = MTL_LPM_LIVE_STATUS_OFFSET,
 	.s0ix_blocker_maps = wcl_pcdn_blk_maps,
 	.s0ix_blocker_offset = LNL_S0IX_BLOCKER_OFFSET,
+	.num_s0ix_blocker = WCL_NUM_S0IX_BLOCKER,
+	.blocker_req_offset = WCL_BLK_REQ_OFFSET,
+	.lpm_req_guid = PCDN_LPM_REQ_GUID,
+};
+
+static struct pmc_info wcl_pmc_info_list[] = {
+	{
+		.devid	= PMC_DEVID_WCL_PCDN,
+		.map	= &wcl_pcdn_reg_map,
+	},
+	{}
 };
 
 #define WCL_NPU_PCI_DEV                0xfd3e
@@ -479,8 +493,12 @@ static int wcl_core_init(struct pmc_dev *pmcdev, struct pmc_dev_info *pmc_dev_in
 }
 
 struct pmc_dev_info wcl_pmc_dev = {
+	.pci_func = 2,
+	.regmap_list = wcl_pmc_info_list,
 	.map = &wcl_pcdn_reg_map,
+	.sub_req_show = &pmc_core_substate_blk_req_fops,
 	.suspend = cnl_suspend,
 	.resume = wcl_resume,
 	.init = wcl_core_init,
+	.sub_req = pmc_core_pmt_get_blk_sub_req,
 };
-- 
2.43.0


  reply	other threads:[~2025-11-05 21:50 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-11-05 21:50 [PATCH 1/2] platform/x86/intel/vsec: Add support for Wildcat Lake Xi Pardee
2025-11-05 21:50 ` Xi Pardee [this message]
2025-11-06 12:29 ` Ilpo Järvinen

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