Re: [PATCH v2] pmdomain: imx: Fix reference count leak in imx_gpc_probe()

[kernel test robot <lkp@intel.com>]

Hi Wentao,

kernel test robot noticed the following build errors:

[auto build test ERROR on shawnguo/for-next]
[also build test ERROR on linus/master v6.18 next-20251209]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Wentao-Liang/pmdomain-imx-Fix-reference-count-leak-in-imx_gpc_probe/20251209-162152
base:   https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux.git for-next
patch link:    https://lore.kernel.org/r/20251209081909.24982-1-vulab%40iscas.ac.cn
patch subject: [PATCH v2] pmdomain: imx: Fix reference count leak in imx_gpc_probe()
config: arm-randconfig-003-20251210 (https://download.01.org/0day-ci/archive/20251210/202512101101.zAlerEtu-lkp@intel.com/config)
compiler: arm-linux-gnueabi-gcc (GCC) 8.5.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20251210/202512101101.zAlerEtu-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202512101101.zAlerEtu-lkp@intel.com/

All errors (new ones prefixed by >>):

   drivers/pmdomain/imx/gpc.c: In function 'imx_gpc_probe':
>> drivers/pmdomain/imx/gpc.c:405:9: error: cleanup argument not a function
     struct device_node *pgc_node __free(pgc_node);
            ^~~~~~~~~~~


vim +405 drivers/pmdomain/imx/gpc.c

   401	
   402	static int imx_gpc_probe(struct platform_device *pdev)
   403	{
   404		const struct imx_gpc_dt_data *of_id_data = device_get_match_data(&pdev->dev);
 > 405		struct device_node *pgc_node __free(pgc_node);
   406		struct regmap *regmap;
   407		void __iomem *base;
   408		int ret;
   409	
   410		pgc_node = of_get_child_by_name(pdev->dev.of_node, "pgc");
   411	
   412		/* bail out if DT too old and doesn't provide the necessary info */
   413		if (!of_property_present(pdev->dev.of_node, "#power-domain-cells") &&
   414		    !pgc_node)
   415			return 0;
   416	
   417		base = devm_platform_ioremap_resource(pdev, 0);
   418		if (IS_ERR(base))
   419			return PTR_ERR(base);
   420	
   421		regmap = devm_regmap_init_mmio_clk(&pdev->dev, NULL, base,
   422						   &imx_gpc_regmap_config);
   423		if (IS_ERR(regmap)) {
   424			ret = PTR_ERR(regmap);
   425			dev_err(&pdev->dev, "failed to init regmap: %d\n",
   426				ret);
   427			return ret;
   428		}
   429	
   430		/*
   431		 * Disable PU power down by runtime PM if ERR009619 is present.
   432		 *
   433		 * The PRE clock will be paused for several cycles when turning on the
   434		 * PU domain LDO from power down state. If PRE is in use at that time,
   435		 * the IPU/PRG cannot get the correct display data from the PRE.
   436		 *
   437		 * This is not a concern when the whole system enters suspend state, so
   438		 * it's safe to power down PU in this case.
   439		 */
   440		if (of_id_data->err009619_present)
   441			imx_gpc_domains[GPC_PGC_DOMAIN_PU].base.flags |=
   442					GENPD_FLAG_RPM_ALWAYS_ON;
   443	
   444		/* Keep DISP always on if ERR006287 is present */
   445		if (of_id_data->err006287_present)
   446			imx_gpc_domains[GPC_PGC_DOMAIN_DISPLAY].base.flags |=
   447					GENPD_FLAG_ALWAYS_ON;
   448	
   449		if (!pgc_node) {
   450			ret = imx_gpc_old_dt_init(&pdev->dev, regmap,
   451						  of_id_data->num_domains);
   452			if (ret)
   453				return ret;
   454		} else {
   455			struct imx_pm_domain *domain;
   456			struct platform_device *pd_pdev;
   457			struct clk *ipg_clk;
   458			unsigned int ipg_rate_mhz;
   459			int domain_index;
   460	
   461			ipg_clk = devm_clk_get(&pdev->dev, "ipg");
   462			if (IS_ERR(ipg_clk))
   463				return PTR_ERR(ipg_clk);
   464			ipg_rate_mhz = clk_get_rate(ipg_clk) / 1000000;
   465	
   466			for_each_child_of_node_scoped(pgc_node, np) {
   467				ret = of_property_read_u32(np, "reg", &domain_index);
   468				if (ret)
   469					return ret;
   470	
   471				if (domain_index >= of_id_data->num_domains)
   472					continue;
   473	
   474				pd_pdev = platform_device_alloc("imx-pgc-power-domain",
   475								domain_index);
   476				if (!pd_pdev)
   477					return -ENOMEM;
   478	
   479				ret = platform_device_add_data(pd_pdev,
   480							       &imx_gpc_domains[domain_index],
   481							       sizeof(imx_gpc_domains[domain_index]));
   482				if (ret) {
   483					platform_device_put(pd_pdev);
   484					return ret;
   485				}
   486				domain = pd_pdev->dev.platform_data;
   487				domain->regmap = regmap;
   488				domain->ipg_rate_mhz = ipg_rate_mhz;
   489	
   490				pd_pdev->dev.parent = &pdev->dev;
   491				pd_pdev->dev.of_node = np;
   492				pd_pdev->dev.fwnode = of_fwnode_handle(np);
   493	
   494				ret = platform_device_add(pd_pdev);
   495				if (ret) {
   496					platform_device_put(pd_pdev);
   497					return ret;
   498				}
   499			}
   500		}
   501	
   502		return 0;
   503	}
   504	

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