From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D39C031691C; Tue, 13 Jan 2026 17:14:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768324465; cv=none; b=Ly4an1X9aMVCyU0mzdRxYPMPSjTmpct22h0FDOvnT8HbQD9nCK2NuYd6CYU8fgXThoVZIzcHWD2vqWRcrsYfGffKuSTtEknw7Ug1mA4zeD7TiKpjfFqtB/5yWhaPaCsLvt9pVgPi3qTmibyAI0TYZWrjUoGkRAnP8EigrKwCyJQ= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768324465; c=relaxed/simple; bh=ZBx4IUNH8GH4xIMQMN3IJVeKXnfqRPnKpD2PxHIjcPA=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=c6DfZGw93uihYyLJy0lbY+D+odrY8DINhXnatbp3Ndx/aoekAekuYS6WnBjzXwilcZSBLbPam/4ce9Ochypc4laqbKyrK7AADAUCAPdQUWD24ym2j9VSGmVHr1Vpkrf2HdkaBuKNCbFuz3pxradWyYU2vnXXKk997QXARjhZLEA= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=BLOjpCdB; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="BLOjpCdB" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 43ACAC116C6; Tue, 13 Jan 2026 17:14:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1768324465; bh=ZBx4IUNH8GH4xIMQMN3IJVeKXnfqRPnKpD2PxHIjcPA=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=BLOjpCdBHxGwoLhclkulyUghM2smO6UVg4pZhZkcSTGm47uQB+DjMmzNfqTQui5dh qqzS9qRkcmZy1w9rByOY3VDURN0V5JQ7DoE2pKXdb/onXJm99fmvC7h9W4P1U6AUWJ IrcT0GxkND/hQzqgRk3JR7y2m7/ITF6kBW1gXndisppPZUtmapggcjtK7xRaloUpFa ZMAuqYHpWgARuDBAB2flKR2LM5VeW015PTvqk+U10D6ReIl7cjArB3JPbQMOmK/iLZ xYivNLmLGIyHG0HO1tDglYQNHPo8sJSI8oAtpTj478cgW9nhs4RCNVsWAL1px9p8oW SiX+SM3llCe9g== Date: Tue, 13 Jan 2026 11:14:24 -0600 From: Rob Herring To: Manivannan Sadhasivam Cc: Greg Kroah-Hartman , Jiri Slaby , Nathan Chancellor , Nicolas Schier , Hans de Goede , Ilpo =?iso-8859-1?Q?J=E4rvinen?= , Mark Pearson , "Derek J. Clark" , Manivannan Sadhasivam , Krzysztof Kozlowski , Conor Dooley , Marcel Holtmann , Luiz Augusto von Dentz , Bartosz Golaszewski , Andy Shevchenko , Bartosz Golaszewski , linux-serial@vger.kernel.org, linux-kernel@vger.kernel.org, linux-kbuild@vger.kernel.org, platform-driver-x86@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-bluetooth@vger.kernel.org, linux-pm@vger.kernel.org, Stephan Gerhold , Dmitry Baryshkov , linux-acpi@vger.kernel.org Subject: Re: [PATCH v4 5/9] dt-bindings: connector: Add PCIe M.2 Mechanical Key E connector Message-ID: <20260113171424.GA3925312-robh@kernel.org> References: <20260112-pci-m2-e-v4-0-eff84d2c6d26@oss.qualcomm.com> <20260112-pci-m2-e-v4-5-eff84d2c6d26@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260112-pci-m2-e-v4-5-eff84d2c6d26@oss.qualcomm.com> On Mon, Jan 12, 2026 at 09:56:04PM +0530, Manivannan Sadhasivam wrote: > Add the devicetree binding for PCIe M.2 Mechanical Key E connector defined > in the PCI Express M.2 Specification, r4.0, sec 5.1.2. This connector > provides interfaces like PCIe or SDIO to attach the WiFi devices to the > host machine, USB or UART+PCM interfaces to attach the Bluetooth (BT) > devices. Spec also provides an optional interface to connect the UIM card, > but that is not covered in this binding. > > The connector provides a primary power supply of 3.3v, along with an > optional 1.8v VIO supply for the Adapter I/O buffer circuitry operating at > 1.8v sideband signaling. > > The connector also supplies optional signals in the form of GPIOs for fine > grained power management. > > Signed-off-by: Manivannan Sadhasivam > --- > .../bindings/connector/pcie-m2-e-connector.yaml | 154 +++++++++++++++++++++ > MAINTAINERS | 1 + > 2 files changed, 155 insertions(+) > > diff --git a/Documentation/devicetree/bindings/connector/pcie-m2-e-connector.yaml b/Documentation/devicetree/bindings/connector/pcie-m2-e-connector.yaml > new file mode 100644 > index 000000000000..b65b39ddfd19 > --- /dev/null > +++ b/Documentation/devicetree/bindings/connector/pcie-m2-e-connector.yaml > @@ -0,0 +1,154 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/connector/pcie-m2-e-connector.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: PCIe M.2 Mechanical Key E Connector > + > +maintainers: > + - Manivannan Sadhasivam > + > +description: > + A PCIe M.2 E connector node represents a physical PCIe M.2 Mechanical Key E > + connector. Mechanical Key E connectors are used to connect Wireless > + Connectivity devices including combinations of Wi-Fi, BT, NFC to the host > + machine over interfaces like PCIe/SDIO, USB/UART+PCM, and I2C. > + > +properties: > + compatible: > + const: pcie-m2-e-connector > + > + vpcie3v3-supply: > + description: A phandle to the regulator for 3.3v supply. > + > + vpcie1v8-supply: > + description: A phandle to the regulator for VIO 1.8v supply. I don't see any 1.8V supply on the connector. There are 1.8V IOs and you may need something in DT to ensure those are powered. However, there's no guarantee that it's a single supply. > + > + ports: > + $ref: /schemas/graph.yaml#/properties/ports > + description: OF graph bindings modeling the interfaces exposed on the > + connector. Since a single connector can have multiple interfaces, every > + interface has an assigned OF graph port number as described below. > + > + properties: > + port@0: > + $ref: /schemas/graph.yaml#/properties/port > + description: Connector interfaces for Wi-Fi > + > + properties: > + endpoint@0: > + $ref: /schemas/graph.yaml#/properties/endpoint > + description: PCIe interface > + > + endpoint@1: > + $ref: /schemas/graph.yaml#/properties/endpoint > + description: SDIO interface I think I already said this, but multiple endpoints are generally for something that's muxed. Looking at the connector pinout, PCIe and SDIO are not muxed. So these 2 should be 2 port nodes. > + > + anyOf: > + - required: > + - endpoint@0 > + - required: > + - endpoint@1 > + > + port@1: > + $ref: /schemas/graph.yaml#/properties/port > + description: Connector interfaces for BT > + > + properties: > + endpoint@0: > + $ref: /schemas/graph.yaml#/properties/endpoint > + description: USB 2.0 interface > + > + endpoint@1: > + $ref: /schemas/graph.yaml#/properties/endpoint > + description: UART interface And UART and USB are not muxed either. > + > + anyOf: > + - required: > + - endpoint@0 > + - required: > + - endpoint@1 > + > + port@2: > + $ref: /schemas/graph.yaml#/properties/port > + description: PCM/I2S interface > + > + i2c-parent: > + $ref: /schemas/types.yaml#/definitions/phandle > + description: I2C interface Move out of 'ports'. > + > + oneOf: > + - required: > + - port@0 > + > + clocks: > + description: 32.768 KHz Suspend Clock (SUSCLK) input from the host system to > + the M.2 card. Refer, PCI Express M.2 Specification r4.0, sec 3.1.12.1 for > + more details. > + maxItems: 1 > + > + w-disable1-gpios: > + description: GPIO input to W_DISABLE1# signal. This signal is used by the > + system to disable WiFi radio in the M.2 card. Refer, PCI Express M.2 > + Specification r4.0, sec 3.1.12.3 for more details. > + maxItems: 1 > + > + w-disable2-gpios: > + description: GPIO input to W_DISABLE2# signal. This signal is used by the > + system to disable WiFi radio in the M.2 card. Refer, PCI Express M.2 > + Specification r4.0, sec 3.1.12.3 for more details. > + maxItems: 1 > + > + viocfg-gpios: > + description: GPIO output to IO voltage configuration (VIO_CFG) signal. This > + signal is used by the M.2 card to indicate to the host system that the > + card supports an independent IO voltage domain for the sideband signals. > + Refer, PCI Express M.2 Specification r4.0, sec 3.1.15.1 for more details. > + maxItems: 1 What about SDIO and UART WAKE, SDIO RESET, and vendor defined signals? > + > +required: > + - compatible > + - vpcie3v3-supply > + > +additionalProperties: false > + > +examples: > + # PCI M.2 Key E connector for Wi-Fi/BT with PCIe/UART interfaces > + - | > + #include > + > + connector { > + compatible = "pcie-m2-e-connector"; > + vpcie3v3-supply = <&vreg_wcn_3p3>; > + vpcie1v8-supply = <&vreg_l15b_1p8>; > + w-disable1-gpios = <&tlmm 117 GPIO_ACTIVE_LOW>; > + w-disable2-gpios = <&tlmm 116 GPIO_ACTIVE_LOW>; > + > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@0 { > + reg = <0>; > + #address-cells = <1>; > + #size-cells = <0>; > + > + endpoint@0 { > + reg = <0>; > + remote-endpoint = <&pcie4_port0_ep>; > + }; > + }; > + > + port@1 { > + reg = <1>; > + #address-cells = <1>; > + #size-cells = <0>; > + > + endpoint@1 { > + reg = <1>; > + remote-endpoint = <&uart14_ep>; > + }; > + }; > + }; > + }; > diff --git a/MAINTAINERS b/MAINTAINERS > index 2eb7b6d26573..451c54675b24 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -20795,6 +20795,7 @@ PCIE M.2 POWER SEQUENCING > M: Manivannan Sadhasivam > L: linux-pci@vger.kernel.org > S: Maintained > +F: Documentation/devicetree/bindings/connector/pcie-m2-e-connector.yaml > F: Documentation/devicetree/bindings/connector/pcie-m2-m-connector.yaml > F: drivers/power/sequencing/pwrseq-pcie-m2.c > > > -- > 2.48.1 >