From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 069B02F90C4; Mon, 2 Feb 2026 06:48:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=60.244.123.138 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770014912; cv=none; b=lbMxxbKIHmCGtJjglzWZi8vtU2Q/rjGNLlPb8dJmXlzrzjdbEGFmrslw/FKvMJHK7HBjHsX8b0h0AcNbhHpuHJdAA/JIapO6t+BMDUBWFpQ9Q9nLDh3S35XBdXFQQQbFPsKnDc83oe0Et3XA13WmL79EwwvpLSnV7UaJ1PolWR4= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770014912; c=relaxed/simple; bh=mpJrklu1orLf7IMYoIiFks3KcxidTaCuf74izAo/Yuc=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=QFOC8Rf+N8klPG/Vt/DTNvCk1uhsORevzEgc8mjM3C8QaYNceoNkRuU5j96S8wQnEtjg+mmpYr5c56NLULUPNmkTOO6e1sDDuiFyZGJYJ3U2cS0fGpOU+hpkVv4WPEJV7ukvEA/YV1JE1/4jL6zZhKzMTS5xMmCVhxwu1oZG9wg= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com; spf=pass smtp.mailfrom=mediatek.com; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b=Ii+NqL11; arc=none smtp.client-ip=60.244.123.138 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mediatek.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="Ii+NqL11" X-UUID: 2b354a00000311f185319dbc3099e8fb-20260202 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=JA3zsA6uTdixau3C/Ey4v+cmJg9kmvBqBUDsMlEtrzg=; b=Ii+NqL11eKTqAjzGQPuA/orkLk/AVyfD6ifJCLCJYzvE9jYmnAAhOBHMThKUsQwBMdqBAg3Kx00WhQfAAGcO1G/yYeua1Jhb3Wa5yAGBNdRFhER2Rd+mCbnBUPKwZuIn7HsuNX+MuwkiZdg8cM71XWKLTbS7kHcNhtjFtXZENUM=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.3.11,REQID:0b20cf02-899c-41c0-8bea-e79407224e7b,IP:0,U RL:0,TC:0,Content:-5,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION :release,TS:-5 X-CID-META: VersionHash:89c9d04,CLOUDID:8d0939f0-16bd-4243-b4ca-b08ca08ab1d8,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:81|82|102|836|888|898,TC:-5,Content: 0|15|50,EDM:-3,IP:nil,URL:0,File:130,RT:0,Bulk:nil,QS:nil,BEC:-1,COL:0,OSI :0,OSA:0,AV:0,LES:1,SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0,ARC:0 X-CID-BVR: 2,SSN|SDN X-CID-BAS: 2,SSN|SDN,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-CID-RHF: D41D8CD98F00B204E9800998ECF8427E X-UUID: 2b354a00000311f185319dbc3099e8fb-20260202 Received: from mtkmbs13n1.mediatek.inc [(172.21.101.193)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 237907758; Mon, 02 Feb 2026 14:48:23 +0800 Received: from mtkmbs13n2.mediatek.inc (172.21.101.108) by MTKMBS14N1.mediatek.inc (172.21.101.75) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.29; Mon, 2 Feb 2026 14:48:21 +0800 Received: from mtksitap99.mediatek.inc (10.233.130.16) by mtkmbs13n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.2562.29 via Frontend Transport; Mon, 2 Feb 2026 14:48:21 +0800 From: irving.ch.lin To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Ulf Hansson , Matthias Brugger , AngeloGioacchino Del Regno CC: Matthias Brugger , , , , , , Qiqi Wang , , , , Subject: [PATCH 1/3] dt-bindings: power: Add MediaTek MT8189 power domain Date: Mon, 2 Feb 2026 14:48:13 +0800 Message-ID: <20260202064820.347550-2-irving-ch.lin@mediatek.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20260202064820.347550-1-irving-ch.lin@mediatek.com> References: <20260202064820.347550-1-irving-ch.lin@mediatek.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain From: Irving-CH Lin Add dt schema and IDs for the power domain of MediaTek MT8189 SoC. The MT8189 power domain IP provide power domains control function for subsys (eg. MFG, audio, venc/vdec ...). Signed-off-by: Irving-CH Lin --- .../power/mediatek,power-controller.yaml | 1 + .../dt-bindings/power/mediatek,mt8189-power.h | 38 +++++++++++++++++++ 2 files changed, 39 insertions(+) create mode 100644 include/dt-bindings/power/mediatek,mt8189-power.h diff --git a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml index 9507b342a7ee..07f046277f8a 100644 --- a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml +++ b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml @@ -31,6 +31,7 @@ properties: - mediatek,mt8183-power-controller - mediatek,mt8186-power-controller - mediatek,mt8188-power-controller + - mediatek,mt8189-power-controller - mediatek,mt8192-power-controller - mediatek,mt8195-power-controller - mediatek,mt8196-hwv-hfrp-power-controller diff --git a/include/dt-bindings/power/mediatek,mt8189-power.h b/include/dt-bindings/power/mediatek,mt8189-power.h new file mode 100644 index 000000000000..70a8c2113457 --- /dev/null +++ b/include/dt-bindings/power/mediatek,mt8189-power.h @@ -0,0 +1,38 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ +/* + * Copyright (c) 2025 MediaTek Inc. + * Author: Qiqi Wang + */ + +#ifndef _DT_BINDINGS_POWER_MT8189_POWER_H +#define _DT_BINDINGS_POWER_MT8189_POWER_H + +/* SPM */ +#define MT8189_POWER_DOMAIN_CONN 0 +#define MT8189_POWER_DOMAIN_AUDIO 1 +#define MT8189_POWER_DOMAIN_ADSP_TOP_DORMANT 2 +#define MT8189_POWER_DOMAIN_ADSP_INFRA 3 +#define MT8189_POWER_DOMAIN_ADSP_AO 4 +#define MT8189_POWER_DOMAIN_MM_INFRA 5 +#define MT8189_POWER_DOMAIN_ISP_IMG1 6 +#define MT8189_POWER_DOMAIN_ISP_IMG2 7 +#define MT8189_POWER_DOMAIN_ISP_IPE 8 +#define MT8189_POWER_DOMAIN_VDE0 9 +#define MT8189_POWER_DOMAIN_VEN0 10 +#define MT8189_POWER_DOMAIN_CAM_MAIN 11 +#define MT8189_POWER_DOMAIN_CAM_SUBA 12 +#define MT8189_POWER_DOMAIN_CAM_SUBB 13 +#define MT8189_POWER_DOMAIN_MDP0 14 +#define MT8189_POWER_DOMAIN_DISP 15 +#define MT8189_POWER_DOMAIN_DP_TX 16 +#define MT8189_POWER_DOMAIN_CSI_RX 17 +#define MT8189_POWER_DOMAIN_SSUSB 18 +#define MT8189_POWER_DOMAIN_MFG0 19 +#define MT8189_POWER_DOMAIN_MFG1 20 +#define MT8189_POWER_DOMAIN_MFG2 21 +#define MT8189_POWER_DOMAIN_MFG3 22 +#define MT8189_POWER_DOMAIN_EDP_TX_DORMANT 23 +#define MT8189_POWER_DOMAIN_PCIE 24 +#define MT8189_POWER_DOMAIN_PCIE_PHY 25 + +#endif /* _DT_BINDINGS_POWER_MT8189_POWER_H */ -- 2.45.2