From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B2F4A23D7FF; Fri, 6 Mar 2026 08:53:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.8 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772787241; cv=none; b=uaQ9bWs1Kdxdor/hSA9LXxodNgmdJBVQzWHecPYrnRzB6lPC7jA3U1jhkyv0OwsE6oL5dBI7YssR2kG8ws1rokYlP/g1G/KOpdewJYWfT8MuxHHWiKTKHWGXaJ4J2mK9jgM3tsBC6DXPl2Q9+qPq2/D3Cm15ALBXJZy3ioljTKU= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772787241; c=relaxed/simple; bh=qwDmbRV1xi7au7cFclTiYrS/8ARsycp12Je+jrPCUPM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=LkdEZCgC3Ce558IsDNXihpWVBiHXNac6fSuzb2yF6kztZWvcS2PX0WWydpoXnpE7XTj6E03ayzyokGx7s5Pzi3Oaoudvv94XQWcpDd9g7312iOdtDduYw9oSzEi8xHajcqqn7685jfos3ykq7UtL4dSAKZkU9dBU9rP3ZZPjKOI= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=XejZQ8yC; arc=none smtp.client-ip=192.198.163.8 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="XejZQ8yC" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1772787238; x=1804323238; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=qwDmbRV1xi7au7cFclTiYrS/8ARsycp12Je+jrPCUPM=; b=XejZQ8yCJzsBBpoEBvPb1ak80+xKkdn1+VT8jqaJOYLvqIoLHhbTSL1p iZMqPlyN28nMUcM1A8ilijrI4evAylbqdhTuOJUQ4OgmkG1RIkuo3/gKd e7GRb30K1n5HIuvfAF1ubp8D20l92NBX9X+Q5nJXWFxvGY78sd99qFg4Y SwY8ExjopeOeS/LL0/nSavabqdXW/IIp77O6N2ADY8z9IIibREEi++u+v BleUY5xnMhKdnPNA63lICcJzqO+6co1cUPLjCjMkcHzX89r65GZMDnBtR IjjrTxoQNUW4AQubM3r7cCPeJdcKzjyEwhU5dFY6+yJM4Ofnqa6xeVZbg Q==; X-CSE-ConnectionGUID: RDrtjYyKSqKpE6Qitwksfg== X-CSE-MsgGUID: m+wfKzJvSKukq4Dj9mjt9A== X-IronPort-AV: E=McAfee;i="6800,10657,11720"; a="91467227" X-IronPort-AV: E=Sophos;i="6.23,104,1770624000"; d="scan'208";a="91467227" Received: from fmviesa005.fm.intel.com ([10.60.135.145]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Mar 2026 00:53:56 -0800 X-CSE-ConnectionGUID: aoJ3nbkBSd2dUGyoZQnc+g== X-CSE-MsgGUID: C/Le+UoHQDeLLnnOnrqBrQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,104,1770624000"; d="scan'208";a="223641479" Received: from dhhellew-desk2.ger.corp.intel.com (HELO ahunter6-desk) ([10.245.244.171]) by fmviesa005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Mar 2026 00:53:54 -0800 From: Adrian Hunter To: alexandre.belloni@bootlin.com Cc: Frank.Li@nxp.com, rafael@kernel.org, linux-i3c@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org Subject: [PATCH V5 2/5] i3c: mipi-i3c-hci: Add quirk to allow IBI while runtime suspended Date: Fri, 6 Mar 2026 10:53:35 +0200 Message-ID: <20260306085338.62955-3-adrian.hunter@intel.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260306085338.62955-1-adrian.hunter@intel.com> References: <20260306085338.62955-1-adrian.hunter@intel.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Organization: Intel Finland Oy, Registered Address: c/o Alberga Business Park, 6 krs, Bertel Jungin Aukio 5, 02600 Espoo, Business Identity Code: 0357606 - 4, Domiciled in Helsinki Content-Transfer-Encoding: 8bit Some I3C controllers can be automatically runtime-resumed in order to handle in-band interrupts (IBIs), meaning that runtime suspend does not need to be blocked when IBIs are enabled. For example, a PCI-attached controller in a low-power state may generate a Power Management Event (PME) when the SDA line is pulled low to signal the START condition of an IBI. The PCI subsystem will then runtime-resume the device, allowing the IBI to be received without requiring the controller to remain active. Introduce a new quirk, HCI_QUIRK_RPM_IBI_ALLOWED, so that drivers can opt-in to this capability via driver data. Signed-off-by: Adrian Hunter Reviewed-by: Frank Li --- Changes in V4 and V5: None Changes in V3: Add Frank's Rev'd-by Changes in V2: None drivers/i3c/master/mipi-i3c-hci/core.c | 3 +++ drivers/i3c/master/mipi-i3c-hci/hci.h | 1 + 2 files changed, 4 insertions(+) diff --git a/drivers/i3c/master/mipi-i3c-hci/core.c b/drivers/i3c/master/mipi-i3c-hci/core.c index 284f3ed7af8c..54d5492545ef 100644 --- a/drivers/i3c/master/mipi-i3c-hci/core.c +++ b/drivers/i3c/master/mipi-i3c-hci/core.c @@ -996,6 +996,9 @@ static int i3c_hci_probe(struct platform_device *pdev) if (hci->quirks & HCI_QUIRK_RPM_ALLOWED) i3c_hci_rpm_enable(&pdev->dev); + if (hci->quirks & HCI_QUIRK_RPM_IBI_ALLOWED) + hci->master.rpm_ibi_allowed = true; + return i3c_master_register(&hci->master, &pdev->dev, &i3c_hci_ops, false); } diff --git a/drivers/i3c/master/mipi-i3c-hci/hci.h b/drivers/i3c/master/mipi-i3c-hci/hci.h index 9ac9d0e342f4..02cab3b3bc6f 100644 --- a/drivers/i3c/master/mipi-i3c-hci/hci.h +++ b/drivers/i3c/master/mipi-i3c-hci/hci.h @@ -150,6 +150,7 @@ struct i3c_hci_dev_data { #define HCI_QUIRK_OD_PP_TIMING BIT(3) /* Set OD and PP timings for AMD platforms */ #define HCI_QUIRK_RESP_BUF_THLD BIT(4) /* Set resp buf thld to 0 for AMD platforms */ #define HCI_QUIRK_RPM_ALLOWED BIT(5) /* Runtime PM allowed */ +#define HCI_QUIRK_RPM_IBI_ALLOWED BIT(6) /* IBI and Hot-Join allowed while runtime suspended */ /* global functions */ void mipi_i3c_hci_resume(struct i3c_hci *hci); -- 2.51.0