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From: Artem Bityutskiy <dedekind1@gmail.com>
To: "Rafael J. Wysocki" <rafael@kernel.org>
Cc: Linux PM Mailing List <linux-pm@vger.kernel.org>
Subject: [PATCH 1/3] intel_idle: Add constants for MSR_PKG_CST_CONFIG_CONTROL
Date: Sat, 25 Apr 2026 10:25:29 +0300	[thread overview]
Message-ID: <20260425072532.358365-2-dedekind1@gmail.com> (raw)
In-Reply-To: <20260425072532.358365-1-dedekind1@gmail.com>

From: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>

Add two constants for the package C-state limit fields in
MSR_PKG_CST_CONFIG_CONTROL.

The SKX_ prefix stands for "Skylake Xeon" and makes it explicit that
the mask is CPU model-specific. The same values have applied to all
Xeon platforms starting from SKX.

Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
---
 drivers/idle/intel_idle.c | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/drivers/idle/intel_idle.c b/drivers/idle/intel_idle.c
index f49c939d636f4..49894c6c7f20b 100644
--- a/drivers/idle/intel_idle.c
+++ b/drivers/idle/intel_idle.c
@@ -81,6 +81,11 @@ static bool ibrs_off __read_mostly;
 /* Maximum allowed C-state target residency */
 #define MAX_CMDLINE_RESIDENCY_US (100 * USEC_PER_MSEC)
 
+/* The Package C-State Limit bits in MSR_PKG_CST_CONFIG_CONTROL */
+#define SKX_PKG_CST_LIMIT_MASK GENMASK(2, 0)
+/* PC6 is enabled when Package C-State Limit >= this value */
+#define SKX_PKG_CST_LIMIT_PC6 2
+
 static char cmdline_table_str[MAX_CMDLINE_TABLE_LEN] __read_mostly;
 
 static struct cpuidle_device __percpu *intel_idle_cpuidle_devices;
@@ -2048,7 +2053,7 @@ static void __init skx_idle_state_table_update(void)
 	 * 011b: C6 (retention)
 	 * 111b: No Package C state limits.
 	 */
-	if ((msr & 0x7) < 2) {
+	if ((msr & SKX_PKG_CST_LIMIT_MASK) < SKX_PKG_CST_LIMIT_PC6) {
 		/*
 		 * Uses the CC6 + PC0 latency and 3 times of
 		 * latency for target_residency if the PC6
@@ -2076,7 +2081,7 @@ static void __init spr_idle_state_table_update(void)
 	rdmsrq(MSR_PKG_CST_CONFIG_CONTROL, msr);
 
 	/* Limit value 2 and above allow for PC6. */
-	if ((msr & 0x7) < 2) {
+	if ((msr & SKX_PKG_CST_LIMIT_MASK) < SKX_PKG_CST_LIMIT_PC6) {
 		spr_cstates[2].exit_latency = 190;
 		spr_cstates[2].target_residency = 600;
 	}
-- 
2.53.0


  reply	other threads:[~2026-04-25  7:25 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-04-25  7:25 [PATCH 0/3] intel_idle: Drop C-states redundant when PC6 is disabled Artem Bityutskiy
2026-04-25  7:25 ` Artem Bityutskiy [this message]
2026-04-25  7:25 ` [PATCH] intel_idle: Add Panther Lake C-states table Artem Bityutskiy
2026-04-25  7:27   ` Artem Bityutskiy
2026-04-25  7:25 ` [PATCH 2/3] intel_idle: Introduce a helper for checking PC6 Artem Bityutskiy
2026-04-25  7:25 ` [PATCH 3/3] intel_idle: Drop C-states redundant when PC6 is disabled Artem Bityutskiy

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