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From: Sumit Gupta <sumitg@nvidia.com>
To: <rafael@kernel.org>, <viresh.kumar@linaro.org>,
	<pierre.gondois@arm.com>, <ionela.voinescu@arm.com>,
	<zhenglifeng1@huawei.com>, <zhanjie9@hisilicon.com>,
	<saket.dumbre@intel.com>, <lenb@kernel.org>,
	<linux-kernel@vger.kernel.org>, <linux-pm@vger.kernel.org>,
	<linux-acpi@vger.kernel.org>, <acpica-devel@lists.linux.dev>,
	<linux-tegra@vger.kernel.org>
Cc: <treding@nvidia.com>, <jonathanh@nvidia.com>, <vsethi@nvidia.com>,
	<ksitaraman@nvidia.com>, <sanjayc@nvidia.com>, <mochs@nvidia.com>,
	<bbasu@nvidia.com>, <sumitg@nvidia.com>
Subject: [PATCH v2 2/3] ACPI: CPPC: Add u64 wrappers for the autonomous selection register
Date: Thu, 16 Jul 2026 21:08:19 +0530	[thread overview]
Message-ID: <20260716153820.2007095-3-sumitg@nvidia.com> (raw)
In-Reply-To: <20260716153820.2007095-1-sumitg@nvidia.com>

cppc_get_auto_sel()/cppc_set_auto_sel() use a bool, unlike the other
CPPC register get/set helpers which use a u64.

The next patch in this series saves and restores the OSPM-set registers
across CPU hotplug using a common table of get/set helpers typed as
int (*)(int, u64 *) and int (*)(int, u64), which the bool autonomous
selection helpers do not fit.

Add cppc_get_auto_sel_u64()/cppc_set_auto_sel_u64() wrappers with the u64
signature so the autonomous selection register fits alongside the others.

Suggested-by: Pierre Gondois <pierre.gondois@arm.com>
Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
---
 drivers/acpi/cppc_acpi.c | 40 ++++++++++++++++++++++++++++++++++++++++
 include/acpi/cppc_acpi.h | 10 ++++++++++
 2 files changed, 50 insertions(+)

diff --git a/drivers/acpi/cppc_acpi.c b/drivers/acpi/cppc_acpi.c
index 9f572f481241..a7fec6c93178 100644
--- a/drivers/acpi/cppc_acpi.c
+++ b/drivers/acpi/cppc_acpi.c
@@ -1788,6 +1788,46 @@ int cppc_set_auto_sel(int cpu, bool enable)
 }
 EXPORT_SYMBOL_GPL(cppc_set_auto_sel);
 
+/**
+ * cppc_get_auto_sel_u64 - Read the autonomous selection register as a u64.
+ * @cpu: CPU from which to read the register.
+ * @val: Return address, set to 0 or 1.
+ *
+ * u64-typed wrapper around cppc_get_auto_sel() for callers that keep CPPC
+ * register accessors in a common table.
+ *
+ * Return: 0 for success, -ERRNO otherwise.
+ */
+int cppc_get_auto_sel_u64(int cpu, u64 *val)
+{
+	bool enable;
+	int ret;
+
+	ret = cppc_get_auto_sel(cpu, &enable);
+	if (ret)
+		return ret;
+
+	*val = enable;
+
+	return 0;
+}
+EXPORT_SYMBOL_GPL(cppc_get_auto_sel_u64);
+
+/**
+ * cppc_set_auto_sel_u64 - Write the autonomous selection register from a u64.
+ * @cpu: CPU to which to write the register.
+ * @val: Value to write, any non-zero value enables autonomous selection.
+ *
+ * u64-typed wrapper around cppc_set_auto_sel().
+ *
+ * Return: 0 for success, -ERRNO otherwise.
+ */
+int cppc_set_auto_sel_u64(int cpu, u64 val)
+{
+	return cppc_set_auto_sel(cpu, !!val);
+}
+EXPORT_SYMBOL_GPL(cppc_set_auto_sel_u64);
+
 /**
  * cppc_set_enable - Set to enable CPPC on the processor by writing the
  * Continuous Performance Control package EnableRegister field.
diff --git a/include/acpi/cppc_acpi.h b/include/acpi/cppc_acpi.h
index 8693890a7275..cd07e1e92bf4 100644
--- a/include/acpi/cppc_acpi.h
+++ b/include/acpi/cppc_acpi.h
@@ -184,6 +184,8 @@ extern int cppc_get_auto_act_window(int cpu, u64 *auto_act_window);
 extern int cppc_set_auto_act_window(int cpu, u64 auto_act_window);
 extern int cppc_get_auto_sel(int cpu, bool *enable);
 extern int cppc_set_auto_sel(int cpu, bool enable);
+extern int cppc_get_auto_sel_u64(int cpu, u64 *val);
+extern int cppc_set_auto_sel_u64(int cpu, u64 val);
 extern int cppc_get_perf_limited(int cpu, u64 *perf_limited);
 extern int cppc_set_perf_limited(int cpu, u64 bits_to_clear);
 extern int amd_get_highest_perf(unsigned int cpu, u32 *highest_perf);
@@ -282,6 +284,14 @@ static inline int cppc_set_auto_sel(int cpu, bool enable)
 {
 	return -EOPNOTSUPP;
 }
+static inline int cppc_get_auto_sel_u64(int cpu, u64 *val)
+{
+	return -EOPNOTSUPP;
+}
+static inline int cppc_set_auto_sel_u64(int cpu, u64 val)
+{
+	return -EOPNOTSUPP;
+}
 static inline int cppc_get_perf_limited(int cpu, u64 *perf_limited)
 {
 	return -EOPNOTSUPP;
-- 
2.34.1


  parent reply	other threads:[~2026-07-16 15:39 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-16 15:38 [PATCH v2 0/3] cpufreq: CPPC: Preserve OSPM-set registers across hotplug and unload Sumit Gupta
2026-07-16 15:38 ` [PATCH v2 1/3] cpufreq: CPPC: Keep the policy across CPU hotplug Sumit Gupta
2026-07-16 15:38 ` Sumit Gupta [this message]
2026-07-16 15:38 ` [PATCH v2 3/3] cpufreq: CPPC: Preserve OSPM-set registers across hotplug and unload Sumit Gupta

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