From: Igor Paunovic <royalnet026@gmail.com>
To: Jiaxing Hu <gahing@gahingwoo.com>
Cc: tomeu@tomeuvizoso.net, heiko@sntech.de, robh@kernel.org,
krzk+dt@kernel.org, conor+dt@kernel.org, ulfh@kernel.org,
p.zabel@pengutronix.de, ogabbay@kernel.org, alchark@gmail.com,
chaoyi.chen@rock-chips.com, krzk@kernel.org, will@kernel.org,
dri-devel@lists.freedesktop.org,
linux-rockchip@lists.infradead.org, linux-pm@vger.kernel.org,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [RFC PATCH v4 5/6] arm64: dts: rockchip: rk3576: add NPU (RKNN) nodes
Date: Mon, 3 Aug 2026 18:05:21 +0200 [thread overview]
Message-ID: <20260803160521.14621-1-royalnet026@gmail.com> (raw)
In-Reply-To: <20260803094125.3285895-6-gahing@gahingwoo.com>
Hi Jiaxing,
Following on from my note on 4/6, since a v5 is coming anyway: rknn_core_0
as written here does not validate against the binding 1/6 installs. 1/6
adds the compatible and the conditional sram-supply, so every other
constraint in rockchip,rk3588-rknn-core.yaml still describes RK3588 only.
I put your node through dt-validate (dtschema 2026.6) against the binding
with 1/6 applied, macros resolved to plain numbers and everything else
left as you wrote it:
npu@27700000 (rockchip,rk3576-rknn-core): clocks: [...6 entries...] is too long
npu@27700000 (rockchip,rk3576-rknn-core): clock-names: ['aclk', 'hclk',
'npu', 'pclk', 'aclk_cbuf', 'hclk_cbuf'] is too long
npu@27700000 (rockchip,rk3576-rknn-core): power-domains: [[2, 7], [2, 8]] is too long
npu@27700000 (rockchip,rk3576-rknn-core): resets: [[1, 20]] is too short
npu@27700000 (rockchip,rk3576-rknn-core): reset-names: ['srst_a'] is too short
The last two are the ones easy to miss: the binding writes only
"resets: maxItems: 2", and dtschema fills in minItems from maxItems, so a
single reset is a hard failure rather than a permitted subset.
The v4 changelog says the reg entries were cut to the three the binding
defines after running dtbs_check, so I suspect that run predates the CBUF
clocks and the second power domain going in.
The fix is the same allOf shape you already used for sram-supply. This is
the diff I tested, on top of 1/6:
--- a/Documentation/devicetree/bindings/npu/rockchip,rk3588-rknn-core.yaml
+++ b/Documentation/devicetree/bindings/npu/rockchip,rk3588-rknn-core.yaml
@@
clocks:
- maxItems: 4
+ minItems: 4
+ maxItems: 6
clock-names:
+ minItems: 4
items:
- const: aclk
- const: hclk
- const: npu
- const: pclk
+ - const: aclk_cbuf
+ - const: hclk_cbuf
@@
power-domains:
- maxItems: 1
+ minItems: 1
+ maxItems: 2
resets:
+ minItems: 1
maxItems: 2
reset-names:
+ minItems: 1
items:
- const: srst_a
- const: srst_h
@@ allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: rockchip,rk3576-rknn-core
+ then:
+ properties:
+ clocks:
+ minItems: 6
+ clock-names:
+ minItems: 6
+ power-domains:
+ minItems: 2
+ resets:
+ minItems: 1
+ maxItems: 1
+ reset-names:
+ maxItems: 1
+ else:
+ properties:
+ clocks:
+ maxItems: 4
+ clock-names:
+ maxItems: 4
+ power-domains:
+ maxItems: 1
+ resets:
+ minItems: 2
+ reset-names:
+ minItems: 2
With that, your node validates clean, and the RK3588 example in the
binding still passes, so nothing loosens for the existing SoC - the else
branch pins it back to exactly what it has today. Take it as a starting
point rather than a finished patch; the DT maintainers may well want the
per-SoC clock list spelled out differently.
Separately, and this one spans 3/6 and 5/6: the resets you add to the
power-domain@ nodes have no binding at all. Same test, against
Documentation/devicetree/bindings/power/rockchip,power-controller.yaml:
power-controller (rockchip,rk3576-power-controller): power-domain@7:
Unevaluated properties are not allowed ('resets' was unexpected)
$defs/pd-node there defines reg, clocks, domain-supply, pm_qos and
#power-domain-cells, and every nesting level is unevaluatedProperties:
false. So 3/6 teaches the driver to read a property the schema does not
admit; that patch needs a binding change of its own, before or alongside
it.
For what it is worth I did check the DOMAIN_M_O_R_G to DOMAIN_M_O_R_G_W
rename in 2/6 against mainline, and you are right that DOMAIN_RK3576 is
its only user, so nothing else moves.
None of this touches RK3588, so it does not change what I said about the
tag on 4/6 - just worth folding into the same v5 rather than finding it
in a v6.
Thanks,
Igor
next prev parent reply other threads:[~2026-08-03 16:05 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-03 9:41 [RFC PATCH v4 0/6] accel/rocket: RK3576 NPU (RKNN) enablement Jiaxing Hu
2026-08-03 9:41 ` [RFC PATCH v4 1/6] dt-bindings: npu: rockchip: add rockchip,rk3576-rknn-core Jiaxing Hu
2026-08-03 9:41 ` [RFC PATCH v4 2/6] pmdomain/rockchip: add optional per-domain power-on settle delay Jiaxing Hu
2026-08-03 9:41 ` [RFC PATCH v4 3/6] pmdomain/rockchip: cycle optional power-domain resets on power-on Jiaxing Hu
2026-08-03 9:41 ` [RFC PATCH v4 4/6] accel/rocket: add RK3576 NPU (RKNN) support Jiaxing Hu
2026-08-03 15:44 ` Igor Paunovic
2026-08-03 9:41 ` [RFC PATCH v4 5/6] arm64: dts: rockchip: rk3576: add NPU (RKNN) nodes Jiaxing Hu
2026-08-03 16:05 ` Igor Paunovic [this message]
2026-08-03 9:41 ` [RFC PATCH v4 6/6] arm64: dts: rockchip: rk3576-rock-4d: enable NPU Jiaxing Hu
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