From: Christian Loehle <christian.loehle@arm.com>
To: "Rafael J . Wysocki" <rafael@kernel.org>,
Viresh Kumar <viresh.kumar@linaro.org>
Cc: linux-pm@vger.kernel.org, linux-acpi@vger.kernel.org,
linux-kernel@vger.kernel.org, Len Brown <lenb@kernel.org>,
Jie Zhan <zhanjie9@hisilicon.com>,
Lifeng Zheng <zhenglifeng1@huawei.com>,
Pierre Gondois <pierre.gondois@arm.com>,
Sumit Gupta <sumitg@nvidia.com>,
Sudeep Holla <sudeep.holla@arm.com>,
Ionela Voinescu <ionela.voinescu@arm.com>,
zhongqiu.han@oss.qualcomm.com,
Christian Loehle <christian.loehle@arm.com>
Subject: [PATCH v3 12/15] ACPI: CPPC: Validate SystemIO register layouts
Date: Sun, 9 Aug 2026 07:25:46 +0100 [thread overview]
Message-ID: <20260809062549.1415955-13-christian.loehle@arm.com> (raw)
In-Reply-To: <20260809062549.1415955-1-christian.loehle@arm.com>
cpc_read() and cpc_write() access SystemIO registers using the complete GAS
access width. They do not apply Bit Offset or preserve bits outside the
described field. Accepting a partial register therefore reads the wrong
value and can clobber adjacent fields on write.
Only retain full-width 8-, 16-, and 32-bit entries with Bit Offset zero
whose complete access lies in the 16-bit I/O port space. Keep accepting
Access Size zero when Bit Width supplies one of those sizes.
When CONFIG_HAS_IOPORT is disabled, mark SystemIO layouts inaccessible
during probe. Also return -EOPNOTSUPP explicitly in cpc_read() and
cpc_write() so a SystemIO entry can never fall through and treat its port
number as a physical-memory address.
Resolve inaccessible entries using the control-specific policy established
for PCC: optional fields can be disabled, while mandatory or semantically
required controls fail probe. Reject overlapping logical port ranges when
either entry is writable; read-only overlaps remain allowed.
These rejected partial forms are permitted by ACPI, but never worked with
the existing whole-width Linux accessor. Implementing them would require
field-aware I/O and appropriate RMW serialization.
Fixes: a2c8f92bea5f ("ACPI: CPPC: Implement support for SystemIO registers")
Signed-off-by: Christian Loehle <christian.loehle@arm.com>
---
drivers/acpi/cppc_acpi.c | 53 ++++++++++++++++++++++++++--------------
1 file changed, 34 insertions(+), 19 deletions(-)
diff --git a/drivers/acpi/cppc_acpi.c b/drivers/acpi/cppc_acpi.c
index 03100fc9b993..9c3d278243ca 100644
--- a/drivers/acpi/cppc_acpi.c
+++ b/drivers/acpi/cppc_acpi.c
@@ -225,7 +225,6 @@ static bool cpc_integer_entry_valid(unsigned int reg_idx, u64 value)
*/
#define NUM_RETRIES 500ULL
-#define OVER_16BTS_MASK ~0xFFFFULL
#define CPC_GENERIC_REGISTER_DESCRIPTOR 0x82
#define CPC_GENERIC_REGISTER_LENGTH (sizeof(struct cpc_reg) - 3)
@@ -1520,21 +1519,28 @@ int acpi_cppc_processor_probe(struct acpi_processor *pr)
cpc_ptr->cpc_regs[i - 2].sys_mem_vaddr = addr;
}
} else if (gas_t->space_id == ACPI_ADR_SPACE_SYSTEM_IO) {
- if (gas_t->access_width < 1 || gas_t->access_width > 3) {
- /*
- * 1 = 8-bit, 2 = 16-bit, and 3 = 32-bit.
- * SystemIO doesn't implement 64-bit
- * registers.
- */
- pr_debug("Invalid access width %d for SystemIO register in _CPC\n",
- gas_t->access_width);
- goto out_free;
+ u64 access_size;
+ const char *reason = "uses unsupported SystemIO geometry";
+ unsigned int access_width;
+ bool unsupported;
+
+ access_width = cpc_reg_access_width(gas_t);
+ unsupported = !IS_ENABLED(CONFIG_HAS_IOPORT) ||
+ (access_width != 8 &&
+ access_width != 16 &&
+ access_width != 32);
+ if (!unsupported) {
+ access_size = access_width / 8;
+ unsupported = gas_t->bit_offset ||
+ gas_t->bit_width != access_width ||
+ gas_t->address >
+ U16_MAX - (access_size - 1);
}
- if (gas_t->address & OVER_16BTS_MASK) {
- /* SystemIO registers use 16-bit integer addresses */
- pr_debug("Invalid IO port %llu for SystemIO register in _CPC\n",
- gas_t->address);
- goto out_free;
+ if (unsupported) {
+ pr_debug("CPU%d: _CPC register %u %s\n",
+ pr->id, i - 2, reason);
+ unsupported_regs |= BIT(i - 2);
+ continue;
}
if (!osc_cpc_flexible_adr_space_confirmed) {
pr_debug("Flexible address space capability not supported\n");
@@ -1625,6 +1631,11 @@ int acpi_cppc_processor_probe(struct acpi_processor *pr)
"PCC");
if (ret)
goto out_free;
+ ret = cpc_validate_non_mmio_overlaps(cpc_ptr,
+ ACPI_ADR_SPACE_SYSTEM_IO,
+ "SystemIO");
+ if (ret)
+ goto out_free;
ret = cpc_validate_required_controls(cpc_ptr);
if (ret)
@@ -1753,11 +1764,13 @@ static int cpc_read(int cpu, struct cpc_register_resource *reg_res, u64 *val)
*val = 0;
size = GET_BIT_WIDTH(reg);
- if (IS_ENABLED(CONFIG_HAS_IOPORT) &&
- reg->space_id == ACPI_ADR_SPACE_SYSTEM_IO) {
+ if (reg->space_id == ACPI_ADR_SPACE_SYSTEM_IO) {
u32 val_u32;
acpi_status status;
+ if (!IS_ENABLED(CONFIG_HAS_IOPORT))
+ return -EOPNOTSUPP;
+
status = acpi_os_read_port((acpi_io_address)reg->address,
&val_u32, size);
if (ACPI_FAILURE(status)) {
@@ -1853,10 +1866,12 @@ static int cpc_write(int cpu, struct cpc_register_resource *reg_res, u64 val)
size = GET_BIT_WIDTH(reg);
- if (IS_ENABLED(CONFIG_HAS_IOPORT) &&
- reg->space_id == ACPI_ADR_SPACE_SYSTEM_IO) {
+ if (reg->space_id == ACPI_ADR_SPACE_SYSTEM_IO) {
acpi_status status;
+ if (!IS_ENABLED(CONFIG_HAS_IOPORT))
+ return -EOPNOTSUPP;
+
status = acpi_os_write_port((acpi_io_address)reg->address,
(u32)val, size);
if (ACPI_FAILURE(status)) {
--
2.34.1
next prev parent reply other threads:[~2026-08-09 6:26 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-09 6:25 [PATCH v3 00/15] ACPI: CPPC: Fix register access and lifetime bugs Christian Loehle
2026-08-09 6:25 ` [PATCH v3 01/15] ACPI: CPPC: Validate the _CPC package header Christian Loehle
2026-08-09 6:25 ` [PATCH v3 02/15] ACPI: CPPC: Validate _CPC entry and control semantics Christian Loehle
2026-08-09 6:25 ` [PATCH v3 03/15] ACPI: CPPC: Propagate performance-control write errors Christian Loehle
2026-08-09 6:25 ` [PATCH v3 04/15] ACPI: CPPC: Use 64-bit masks for register fields Christian Loehle
2026-08-09 6:25 ` [PATCH v3 05/15] ACPI: CPPC: Serialize PCC single-register payload updates Christian Loehle
2026-08-09 6:25 ` [PATCH v3 06/15] ACPI: CPPC: Serialize PCC EPP " Christian Loehle
2026-08-09 6:25 ` [PATCH v3 07/15] ACPI: CPPC: Release CPC descriptors through kobject Christian Loehle
2026-08-09 6:25 ` [PATCH v3 08/15] ACPI: CPPC: Release PCC data after probe failures Christian Loehle
2026-08-09 6:25 ` [PATCH v3 09/15] ACPI: CPPC: Reject unsafe cross-CPU SystemMemory RMW Christian Loehle
2026-08-09 6:25 ` [PATCH v3 10/15] ACPI: CPPC: Reject reads and RMW of write-only controls Christian Loehle
2026-08-09 6:25 ` [PATCH v3 11/15] ACPI: CPPC: Validate and access PCC register layouts Christian Loehle
2026-08-09 6:25 ` Christian Loehle [this message]
2026-08-09 6:25 ` [PATCH v3 13/15] ACPI: CPPC: Validate PCC overlaps across processors Christian Loehle
2026-08-09 6:25 ` [PATCH v3 14/15] ACPI: CPPC: Validate SystemIO " Christian Loehle
2026-08-09 6:25 ` [PATCH v3 15/15] ACPI: CPPC: Clear Performance Limited without a stale read Christian Loehle
2026-08-09 7:01 ` Christian Loehle
2026-08-25 9:15 ` Sumit Gupta
2026-08-25 10:09 ` Christian Loehle
2026-08-09 7:18 ` [PATCH v3 00/15] ACPI: CPPC: Fix register access and lifetime bugs Christian Loehle
2026-08-10 5:15 ` Christian Loehle
2026-08-20 10:07 ` Christian Loehle
2026-08-20 10:31 ` Rafael J. Wysocki (Intel)
2026-08-21 14:39 ` Rafael J. Wysocki (Intel)
2026-08-25 6:58 ` Sumit Gupta
2026-08-25 8:25 ` Christian Loehle
2026-08-25 11:48 ` Rafael J. Wysocki (Intel)
2026-08-25 20:53 ` Sumit Gupta
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