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From: Mario Limonciello <mario.limonciello@amd.com>
To: Bjorn Helgaas <bhelgaas@google.com>
Cc: "open list:PCI SUBSYSTEM" <linux-pci@vger.kernel.org>,
	open list <linux-kernel@vger.kernel.org>,
	"Rafael J . Wysocki" <rafael@kernel.org>,
	Lukas Wunner <lukas@wunner.de>, <linux-pm@vger.kernel.org>,
	"Mario Limonciello (AMD)" <superm1@kernel.org>,
	Eric Naim <dnaim@cachyos.org>
Subject: [PATCH v3 2/3] PCI/PM: Run bridge power up actions as part of restore phase
Date: Mon, 31 Aug 2026 15:55:32 -0500	[thread overview]
Message-ID: <20260831205533.2325747-3-mario.limonciello@amd.com> (raw)
In-Reply-To: <20260831205533.2325747-1-mario.limonciello@amd.com>

From: "Mario Limonciello (AMD)" <superm1@kernel.org>

pci_pm_resume_noirq() calls pci_pm_bridge_power_up_actions() when a
bridge is coming back from D3cold and bus PM was not skipped, so that
the mandatory post-power-on link training delays are observed before
any downstream device is accessed.

The last patch in this series makes the hibernate poweroff_noirq path
put bridges with downstream devices into D3 (including D3cold),
mirroring what the S3 suspend path already does.  For that to be safe,
the hibernate image restore path has to bring those bridges back up the
same way suspend resume does; otherwise a downstream device may be
accessed before its parent bridge's link is retrained.

Add the same bridge power up actions to pci_pm_restore_noirq(), gated on
the same conditions as the resume path (bus PM not skipped and the
previous state being D3cold), so that hibernate restore and suspend
resume behave identically for bridges.

Tested-by: Eric Naim <dnaim@cachyos.org>
Signed-off-by: Mario Limonciello (AMD) <superm1@kernel.org>
---
 drivers/pci/pci-driver.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/pci/pci-driver.c b/drivers/pci/pci-driver.c
index e3d352c7b31d4..d15b3eb55ec53 100644
--- a/drivers/pci/pci-driver.c
+++ b/drivers/pci/pci-driver.c
@@ -1297,10 +1297,15 @@ static int pci_pm_restore_noirq(struct device *dev)
 {
 	struct pci_dev *pci_dev = to_pci_dev(dev);
 	const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL;
+	pci_power_t prev_state = pci_dev->current_state;
+	bool skip_bus_pm = pci_dev->skip_bus_pm;
 
 	pci_pm_default_resume_early(pci_dev);
 	pci_fixup_device(pci_fixup_resume_early, pci_dev);
 
+	if (!skip_bus_pm && prev_state == PCI_D3cold)
+		pci_pm_bridge_power_up_actions(pci_dev);
+
 	if (pci_has_legacy_pm_support(pci_dev))
 		return 0;
 
-- 
2.43.0


  parent reply	other threads:[~2026-08-31 20:56 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-31 20:55 [PATCH v3 0/3] Unfiy PCI suspend and hibernate paths Mario Limonciello
2026-08-31 20:55 ` [PATCH v3 1/3] PCI/PM: Split out code from pci_pm_suspend_noirq() into helper Mario Limonciello
2026-09-04 13:03   ` Rafael J. Wysocki (Intel)
2026-08-31 20:55 ` Mario Limonciello [this message]
2026-09-04 13:09   ` [PATCH v3 2/3] PCI/PM: Run bridge power up actions as part of restore phase Rafael J. Wysocki (Intel)
2026-09-04 13:11     ` Rafael J. Wysocki (Intel)
2026-08-31 20:55 ` [PATCH v3 3/3] PCI: Put PCIe bridges with downstream devices into D3 at hibernate Mario Limonciello

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