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Fri, 04 Sep 2026 08:42:27 -0700 (PDT) X-Received: by 2002:a05:620a:2713:b0:939:72cb:bae7 with SMTP id af79cd13be357-93972cbbeafmr868822885a.30.1788536547161; Fri, 04 Sep 2026 08:42:27 -0700 (PDT) Received: from QCOM-eG0v1AUPpu.na.qualcomm.com ([2a01:e0a:830:450:e90a:787f:72ea:b218]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-49ce5533ffbsm160668505e9.3.2026.09.04.08.42.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 04 Sep 2026 08:42:26 -0700 (PDT) From: Loic Poulain Date: Fri, 04 Sep 2026 17:42:19 +0200 Subject: [PATCH v6 04/11] power: sequencing: pcie-m2: Report power controllability Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260904-monza-wireless-v6-4-d8c5042b3efd@oss.qualcomm.com> References: <20260904-monza-wireless-v6-0-d8c5042b3efd@oss.qualcomm.com> In-Reply-To: <20260904-monza-wireless-v6-0-d8c5042b3efd@oss.qualcomm.com> To: Manivannan Sadhasivam , Bartosz Golaszewski , Marcel Holtmann , Luiz Augusto von Dentz , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-pci@vger.kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-bluetooth@vger.kernel.org, devicetree@vger.kernel.org, Manivannan Sadhasivam , Loic Poulain , Dmitry Baryshkov X-Mailer: b4 0.14.2 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTA0MDE0MyBTYWx0ZWRfX5oxkv3ji3gQw d1s7pyeEQLKpKvSOWTYxQreDLvX/5fRTfRC8jlw29RFHItH9B+D+9TcX7X1D2l0CtnBzp9TC2kr LBjfxYGXe3Tvm0tsZeIw6axylgW8m/3VJBK6+6KeUPVu7QOJZh+HF6hYRy5T3/bd7NPn9T2EfIv 2dd3P6wlHAO8jpmm9hXFOgexbRA4oah7zel+XEWmVBeYjNvue2fHRdc4mLX+hVyEH8MoLdO2SY5 QRdoZbciGKL88kxn18pBZJuefLyMIKGuAXpW7VJ9vUCJyvDk79kX7XG5kkdPiP4lXBj3dTomrAL gpoiVL+A5q88TFLBqVkox77uxUAJTxGZXSAnQU4q6itsrJeJ8/y7ierReeFb8OP5zabC2ICMRHU bh/aPLwEaIhgpV1noN0fumVw5Gwxer9E/cWgGx7hOUVrF6yqwTWMQxoraum5gH9GM5zq0HM/eKz NiZsX8rtM+Orz/DZCog== X-Authority-Analysis: v=2.4 cv=YNavDxGx c=1 sm=1 tr=0 ts=6a9ae6e4 cx=c_pps a=HLyN3IcIa5EE8TELMZ618Q==:117 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=YMgV9FUhrdKAYTUUvYB2:22 a=EUspDBNiAAAA:8 a=VwQbUJbxAAAA:8 a=Wval_j7vKiRkorSqWqkA:9 a=QEXdDO2ut3YA:10 a=bTQJ7kPSJx9SKPbeHEYW:22 X-Proofpoint-ORIG-GUID: 9StZUsgkbv_EYEfLwkfyg2kP0ScNWj7a X-Proofpoint-GUID: 9StZUsgkbv_EYEfLwkfyg2kP0ScNWj7a X-Proofpoint-Spam-Info: AW1haW4tMjYwOTA0MDE0MyBTYWx0ZWRfX+NXJStBFVAN8 i1wk0okw6RMaBOKrWeMZRoHCp+MEkXJ4H3U1dY57kxeBSugrYwFQt6eWeqN3CSVkMKiWg43Miwh XGzg9A9Ma4QumP69o/UsGEh8V1mVHdY= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-04_04,2026-09-03_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 suspectscore=0 adultscore=0 impostorscore=0 malwarescore=0 spamscore=0 bulkscore=0 priorityscore=1501 phishscore=0 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2609040143 The M.2 Key E connector gates/resets its functions through the W_DISABLE1# (PCIe/WiFi) and W_DISABLE2# (Bluetooth) signals. When a signal is not routed to a host GPIO, the corresponding enable/disable callbacks are no-ops, so the consumer cannot gate or reset that function on its own. Implement the .is_controllable() callback on the "uart" and "pcie" targets so that consumers can query this per instance (based on the runtime presence of the W_DISABLE2#/W_DISABLE1# GPIOs) via pwrseq_is_controllable(). Reviewed-by: Dmitry Baryshkov Reviewed-by: Manivannan Sadhasivam Reviewed-by: Manivannan Sadhasivam Signed-off-by: Loic Poulain --- drivers/power/sequencing/pwrseq-pcie-m2.c | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/drivers/power/sequencing/pwrseq-pcie-m2.c b/drivers/power/sequencing/pwrseq-pcie-m2.c index de9848a9a9f19dba6d2e9d756c3d30f6648738ed..bee1aa0e077db139a52d307890053492b4513db2 100644 --- a/drivers/power/sequencing/pwrseq-pcie-m2.c +++ b/drivers/power/sequencing/pwrseq-pcie-m2.c @@ -83,6 +83,18 @@ static int pwrseq_pci_m2_e_uart_disable(struct pwrseq_device *pwrseq) return gpiod_set_value_cansleep(ctx->w_disable2_gpio, 1); } +static bool pwrseq_pci_m2_e_uart_is_controllable(struct pwrseq_device *pwrseq) +{ + struct pwrseq_pcie_m2_ctx *ctx = pwrseq_device_get_drvdata(pwrseq); + + /* + * The UART enable is driven through the W_DISABLE2# line. When it is not + * wired up on this connector the enable/disable callbacks are no-ops, so + * the host cannot gate the Bluetooth function on its own. + */ + return !!ctx->w_disable2_gpio; +} + static const struct pwrseq_unit_data pwrseq_pcie_m2_e_uart_unit_data = { .name = "uart-enable", .deps = pwrseq_pcie_m2_unit_deps, @@ -104,6 +116,18 @@ static int pwrseq_pci_m2_e_pcie_disable(struct pwrseq_device *pwrseq) return gpiod_set_value_cansleep(ctx->w_disable1_gpio, 1); } +static bool pwrseq_pci_m2_e_pcie_is_controllable(struct pwrseq_device *pwrseq) +{ + struct pwrseq_pcie_m2_ctx *ctx = pwrseq_device_get_drvdata(pwrseq); + + /* + * The PCIe/WiFi enable is driven through the W_DISABLE1# line. When it + * is not wired up on this connector the enable/disable callbacks are + * no-ops, so the host cannot gate the PCIe/WiFi function on its own. + */ + return !!ctx->w_disable1_gpio; +} + static const struct pwrseq_unit_data pwrseq_pcie_m2_e_pcie_unit_data = { .name = "pcie-enable", .deps = pwrseq_pcie_m2_unit_deps, @@ -132,12 +156,14 @@ static const struct pwrseq_target_data pwrseq_pcie_m2_e_uart_target_data = { .name = "uart", .unit = &pwrseq_pcie_m2_e_uart_unit_data, .post_enable = pwrseq_pcie_m2_e_pwup_delay, + .is_controllable = pwrseq_pci_m2_e_uart_is_controllable, }; static const struct pwrseq_target_data pwrseq_pcie_m2_e_pcie_target_data = { .name = "pcie", .unit = &pwrseq_pcie_m2_e_pcie_unit_data, .post_enable = pwrseq_pcie_m2_e_pwup_delay, + .is_controllable = pwrseq_pci_m2_e_pcie_is_controllable, }; static const struct pwrseq_target_data pwrseq_pcie_m2_m_pcie_target_data = { -- 2.34.1