From: Faruque Ansari <faruque.ansari@oss.qualcomm.com>
To: Oleksij Rempel <o.rempel@pengutronix.de>,
Pengutronix Kernel Team <kernel@pengutronix.de>,
Sebastian Reichel <sre@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Wim Van Sebroeck <wim@linux-watchdog.org>,
Guenter Roeck <linux@roeck-us.net>,
Benson Leung <bleung@chromium.org>,
Tzung-Bi Shih <tzungbi@kernel.org>,
Srinivas Kandagatla <srini@kernel.org>,
Daniel Lezcano <daniel.lezcano@kernel.org>
Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-pm@vger.kernel.org, devicetree@vger.kernel.org,
linux-watchdog@vger.kernel.org, kernel@pengutronix.de,
"Liam Girdwood" <lgirdwood@gmail.com>,
"Mark Brown" <broonie@kernel.org>,
"Rafael J. Wysocki" <rafael@kernel.org>,
"Zhang Rui" <rui.zhang@intel.com>,
"Lukasz Luba" <lukasz.luba@arm.com>,
"Søren Andersen" <san@skov.dk>,
"Guenter Roeck" <groeck@chromium.org>,
"Matti Vaittinen" <mazziesaccount@gmail.com>,
"Ahmad Fatoum" <a.fatoum@pengutronix.de>,
"Andrew Morton" <akpm@linux-foundation.org>,
avaneesh.dwivedi@oss.qualcomm.com,
"Umang Chheda" <umang.chheda@oss.qualcomm.com>,
"Faruque Ansari" <faruque.ansari@oss.qualcomm.com>
Subject: [PATCH v3 1/3] dt-bindings: nvmem: layouts: Add PSCRR NVMEM layout
Date: Mon, 14 Sep 2026 10:08:45 +0530 [thread overview]
Message-ID: <20260914-pscrr-provider-v3-1-c45cb16542e8@oss.qualcomm.com> (raw)
In-Reply-To: <20260914-pscrr-provider-v3-0-c45cb16542e8@oss.qualcomm.com>
Add a schema for the PSCRR NVMEM layout, which persists the power
state change reason in a single NVMEM cell so it survives a power
cycle and can be read back on the next boot.
Signed-off-by: Faruque Ansari <faruque.ansari@oss.qualcomm.com>
---
.../bindings/nvmem/layouts/nvmem-layout.yaml | 1 +
.../bindings/nvmem/layouts/pscrr-nvmem.yaml | 87 ++++++++++++++++++++++
MAINTAINERS | 1 +
3 files changed, 89 insertions(+)
diff --git a/Documentation/devicetree/bindings/nvmem/layouts/nvmem-layout.yaml b/Documentation/devicetree/bindings/nvmem/layouts/nvmem-layout.yaml
index 382507060651..24545db61416 100644
--- a/Documentation/devicetree/bindings/nvmem/layouts/nvmem-layout.yaml
+++ b/Documentation/devicetree/bindings/nvmem/layouts/nvmem-layout.yaml
@@ -21,6 +21,7 @@ oneOf:
- $ref: fixed-layout.yaml
- $ref: kontron,sl28-vpd.yaml
- $ref: onie,tlv-layout.yaml
+ - $ref: pscrr-nvmem.yaml
- $ref: u-boot,env.yaml
properties:
diff --git a/Documentation/devicetree/bindings/nvmem/layouts/pscrr-nvmem.yaml b/Documentation/devicetree/bindings/nvmem/layouts/pscrr-nvmem.yaml
new file mode 100644
index 000000000000..118669d33f5c
--- /dev/null
+++ b/Documentation/devicetree/bindings/nvmem/layouts/pscrr-nvmem.yaml
@@ -0,0 +1,87 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/nvmem/layouts/pscrr-nvmem.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NVMEM layout for the Power State Change Reason recorder (PSCRR)
+
+maintainers:
+ - Faruque Ansari <faruque.ansari@oss.qualcomm.com>
+ - Oleksij Rempel <o.rempel@pengutronix.de>
+
+description:
+ An NVMEM layout for a Power State Change Reason (PSCRR) recorder. The
+ reboot or shutdown cause is persisted into a single small NVMEM cell,
+ such as an RTC scratch register, a PMIC SDAM (Scratch Data Access Memory)
+ byte, or an EEPROM byte, so the reason survives a power cycle and can be
+ read back on the next boot.
+
+select: false
+
+properties:
+ compatible:
+ const: pscrr-nvmem
+
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 1
+
+patternProperties:
+ "^.*@[0-9a-f]+$":
+ type: object
+ description:
+ The single NVMEM cell used to persist the power state change reason.
+
+ properties:
+ reg:
+ items:
+ - items:
+ - description: Offset, in bytes, of the cell within the
+ parent NVMEM device.
+ - const: 1
+ description:
+ Offset and size, in bytes, of the cell within the parent NVMEM
+ device. The reason value occupies a single byte, so the size
+ must be 1.
+
+ bits:
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ items:
+ - minimum: 0
+ maximum: 7
+ description:
+ Bit offset within the byte addressed by reg.
+ - minimum: 1
+ maximum: 8
+ description:
+ Number of bits used to store the reason. Must be wide enough
+ to hold every value of enum psc_reason (currently 4 bits or
+ more).
+ description:
+ Optional. When absent, the whole byte addressed by reg is used.
+
+ required:
+ - reg
+
+ additionalProperties: false
+
+required:
+ - compatible
+
+additionalProperties: false
+
+examples:
+ - |
+ nvmem-layout {
+ compatible = "pscrr-nvmem";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ reboot-reason-persist@49 {
+ reg = <0x49 0x1>;
+ bits = <0 4>;
+ };
+ };
diff --git a/MAINTAINERS b/MAINTAINERS
index 19b9f6605d98..51f31e95f4ea 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -21693,6 +21693,7 @@ R: Pengutronix Kernel Team <kernel@pengutronix.de>
L: linux-pm@vger.kernel.org
S: Maintained
F: Documentation/ABI/testing/sysfs-kernel-pscrr
+F: Documentation/devicetree/bindings/nvmem/layouts/pscrr-nvmem.yaml
F: drivers/power/reset/pscrr/
F: include/linux/pscrr.h
F: tools/testing/selftests/pscrr/
--
2.34.1
next prev parent reply other threads:[~2026-09-14 4:39 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-14 4:38 [PATCH v3 0/3] power: reset: Add NVMEM recorder provider for PSCRR Faruque Ansari
2026-09-14 4:38 ` Faruque Ansari [this message]
2026-09-24 15:19 ` [PATCH v3 1/3] dt-bindings: nvmem: layouts: Add PSCRR NVMEM layout Rob Herring (Arm)
2026-09-14 4:38 ` [PATCH v3 2/3] power: reset: Add PSCRR NVMEM recorder Faruque Ansari
2026-09-14 4:38 ` [PATCH v3 3/3] arm64: dts: qcom: lemans: Add PSCRR NVMEM recorder node Faruque Ansari
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