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GCC uses this clock as the source for the NSS MEMNOC clocks. Reviewed-by: Konrad Dybcio Signed-off-by: Kathiravan Thirumoorthy --- arch/arm64/boot/dts/qcom/ipq5424.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/ipq5424.dtsi b/arch/arm64/boot/dts/qcom/ipq5424.dtsi index 95e2508ac145..64a06d615d61 100644 --- a/arch/arm64/boot/dts/qcom/ipq5424.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq5424.dtsi @@ -486,7 +486,8 @@ gcc: clock-controller@1800000 { <&pcie1_phy>, <&pcie2_phy>, <&pcie3_phy>, - <&ssphy_0>; + <&ssphy_0>, + <&cmn_pll IPQ5424_PPE_375MHZ_CLK>; #clock-cells = <1>; #reset-cells = <1>; #interconnect-cells = <1>; -- 2.34.1