From: Jonathan Cameron <jic23@kernel.org>
To: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: "Biju Das" <biju.das.jz@bp.renesas.com>,
"Lad Prabhakar" <prabhakar.mahadev-lad.rj@bp.renesas.com>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Rafael J. Wysocki" <rafael@kernel.org>,
"Daniel Lezcano" <daniel.lezcano@kernel.org>,
"Geert Uytterhoeven" <geert+renesas@glider.be>,
"Magnus Damm" <magnus.damm@gmail.com>,
"David Lechner" <dlechner@baylibre.com>,
"Nuno Sá" <nuno.sa@analog.com>,
"Andy Shevchenko" <andy@kernel.org>,
"Claudiu Beznea" <claudiu.beznea.uj@bp.renesas.com>,
linux-iio@vger.kernel.org, linux-renesas-soc@vger.kernel.org,
linux-pm@vger.kernel.org, devicetree@vger.kernel.org,
"Chris Paterson" <Chris.Paterson2@renesas.com>,
"Biju Das" <biju.das@bp.renesas.com>
Subject: Re: [PATCH v3 6/8] iio: adc: rzg2l_adc: Rename num_channels to max_channels
Date: Sun, 27 Sep 2026 19:06:15 +0100 [thread overview]
Message-ID: <20260927190615.30b3be49@jic23-hlaptop> (raw)
In-Reply-To: <CAMuHMdVbyktVBAwBh=LoARWHHmb_FrF+omeDvNdR76uxus3mPA@mail.gmail.com>
On Tue, 22 Sep 2026 16:33:51 +0200
Geert Uytterhoeven <geert@linux-m68k.org> wrote:
> Hi Biju,
>
> Thanks for your patch!
>
> On Tue, 22 Sept 2026 at 06:28, Biju Das <biju.das.jz@bp.renesas.com> wrote:
> > Rename the num_channels member of struct rzg2l_adc_hw_params to
> > max_channels, as it represents the maximum channel supported by
>
> ... maximum number of channels...
>
> "the maximum channel" (aka singular "max_channel") would be equal to
> the maximum number of channels minus one.
Ah. I just looked at v4 and realised I'd not been paying attention.
The number isn't the maximum number of channels because it's a sparse
set for the new part being added. It is the oddity of maximum channel
number and as such. Ah well. I think at this stage this distinction
doesn't really matter.
Jonathan
>
> > the ADC hardware rather than a count of channels currently in use.
> >
> > No functional change intended.
> >
> > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
>
> > --- a/drivers/iio/adc/rzg2l_adc.c
> > +++ b/drivers/iio/adc/rzg2l_adc.c
> > @@ -62,7 +62,7 @@
> > * @adsmp_mask: ADC sampling period mask (see ADM3 register)
> > * @adint_inten_mask: conversion end interrupt mask (see ADINT register)
> > * @default_adcmp: default ADC cmp (see ADM3 register)
> > - * @num_channels: number of supported channels
> > + * @max_channels: the maximum channel for the ADC
>
> "maximum number of channels", to avoid confusion.
>
> > * @adivc: specifies if ADVIC register is available
> > */
> > struct rzg2l_adc_hw_params {
>
> Gr{oetje,eeting}s,
>
> Geert
>
next prev parent reply other threads:[~2026-09-27 19:20 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-22 4:26 [PATCH v3 0/8] Add Renesas RZ/G3L TSU support Biju Das
2026-09-22 4:26 ` [PATCH v3 2/8] dt-bindings: thermal: r9a08g045-tsu: Document RZ/G3L TSU Biju Das
2026-09-22 4:26 ` [PATCH v3 3/8] thermal/drivers/renesas/rzg3s: Convert calibration defaults to per-SoC match data Biju Das
2026-09-22 4:26 ` [PATCH v3 4/8] thermal/drivers/renesas/rzg3s: Add RZ/G3L TSU support Biju Das
2026-09-22 4:26 ` [PATCH v3 5/8] dt-bindings: iio: adc: renesas,rzg2l-adc: Document RZ/G3L ADC for TSU Biju Das
2026-09-28 6:05 ` Krzysztof Kozlowski
2026-09-28 6:25 ` Biju Das
2026-09-28 6:27 ` Krzysztof Kozlowski
2026-09-28 6:32 ` Biju Das
2026-09-28 7:53 ` Krzysztof Kozlowski
2026-09-22 4:26 ` [PATCH v3 6/8] iio: adc: rzg2l_adc: Rename num_channels to max_channels Biju Das
2026-09-22 14:33 ` Geert Uytterhoeven
2026-09-23 8:21 ` Biju Das
2026-09-25 2:55 ` Jonathan Cameron
2026-09-25 3:55 ` Biju Das
2026-09-27 18:06 ` Jonathan Cameron [this message]
2026-09-22 4:26 ` [PATCH v3 7/8] iio: adc: rzg2l_adc: Add RZ/G3L ADC support for TSU Biju Das
2026-09-22 4:27 ` [PATCH v3 8/8] arm64: dts: renesas: r9a08g046: Enable TSU Biju Das
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