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Sun, 8 Nov 2026 02:04:29 -0500 (EST) From: Jiaxing Hu To: tomeu@tomeuvizoso.net, heiko@sntech.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, joro@8bytes.org, will@kernel.org, robin.murphy@arm.com, ulfh@kernel.org, p.zabel@pengutronix.de, ogabbay@kernel.org, zhangqing@rock-chips.com Cc: royalnet026@gmail.com, abel.vesa@oss.qualcomm.com, sebastian.reichel@collabora.com, sidong.yang@furiosa.ai, u.kleine-koenig@baylibre.com, chaoyi.chen@rock-chips.com, shawn.lin@rock-chips.com, finley.xiao@rock-chips.com, diederik@cknow-tech.com, alchark@flipper.net, leonard@lausen.nl, jeff.hugo@oss.qualcomm.com, rfoss@kernel.org, dri-devel@lists.freedesktop.org, linux-rockchip@lists.infradead.org, iommu@lists.linux.dev, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Jiaxing Hu Subject: Re: [PATCH v15 03/15] accel/rocket: wait for a running IRQ handler before resetting a core Date: Sun, 8 Nov 2026 20:04:08 +1300 Message-ID: <20261108070408.136140-2-gahing@gahingwoo.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <3654048.cLl3JjQhRp@diego> References: <20261101082307.151957-4-gahing@gahingwoo.com> <3654048.cLl3JjQhRp@diego> X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Hi Heiko, On 3/15 you're right. With synchronize_irq() added, the original comment already describes what happens, so v16 no longer changes it. In 4/15 the code no longer uses pm_runtime_put_noidle(), so only the last part of that comment changes to match. I've shortened the commit messages of 3/15 and 1/15 in v16. 1/15 is Igor's patch, so the change is marked in its tag block; Igor, say if you'd rather keep your text. On the power domains in 14/15: I tested each core with only its own power domain. With both cores running the results are correct, so v16 uses one power domain per core and drops the driver code that handled more than one. On the IOMMU clocks in 8/15: I tested different combinations. With only aclk and iface the IOMMU reset fails, and without either one of the CBUF clocks it does not work either. With all four clocks it works, and the npu clock is not needed, so v16 lists four. Thanks, Jiaxing