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From: Thomas Renninger <trenn@suse.de>
To: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Cc: Len Brown <lenb@kernel.org>,
	Philippe Longepe <philippe.longepe@linux.intel.com>,
	linux-pm@vger.kernel.org, rafael.j.wysocki@intel.com,
	Prarit Bhargava <prarit@redhat.com>,
	viresh.kumar@linaro.org
Subject: Re: [PATCH V6 1/3] cpufreq: intel_pstate: configurable algorithm to get target pstate
Date: Mon, 14 Dec 2015 16:13:46 +0100	[thread overview]
Message-ID: <3489702.fdaYLucDTN@skinner> (raw)
In-Reply-To: <1449768520.3240.250.camel@spandruv-desk3.jf.intel.com>

On Thursday, December 10, 2015 09:28:40 AM Srinivas Pandruvada wrote:
> On Thu, 2015-12-10 at 14:04 +0100, Thomas Renninger wrote:
> > On Wednesday, December 09, 2015 12:21:53 PM Srinivas Pandruvada wrote:
> > > On Wed, 2015-12-09 at 15:34 +0100, Thomas Renninger wrote:
> > > > On Tuesday, December 08, 2015 10:02:23 AM Srinivas Pandruvada wrote:

...
 
> > > The function
> > > to get next state can be common. There is no airmont/silvermont name
> > > attached to this (get_target_pstate_use_cpu_load or
> > > get_target_pstate_use_performance). So the default callback
> > > ".get_target_pstate" can be changed based on preference.
> > > 
> > > This is the order I am thinking of in the order of priority high to
> > > low :
> > > - User policy (either command line or via cpu-freq scaling_governor)
> > > - ACPI
> > > - Pickup defaults based on CPU ID.

That would mean if ACPI pm profile is unknown and only then, assign
algorithm (or other tunables) based on CPU ID?

> > Why by CPU ID? This doesn't make sense to me and unnecessarily complicates
> > things.
> 
> Some CPU are designed for a specific functions.

Ok, I nearly bought this...
Then I started reading (only a very bit). Silvermont is simply a CPU model.
It's not a bound to specific functions like different ARM processors with
possibly very specific chipset. It's just a general X86 processor, right?

And here:
https://en.wikipedia.org/wiki/Silvermont

I get:
List of Silvermont processors:
Desktop processors (Bay Trail-D)
Server processors (Avoton)
Communications processors (Rangeley)
Embedded/automotive processors (Bay Trail-I)
Mobile processors (Bay Trail-M)
Tablet processors (Bay Trail-T)
Smartphone processors (Merrifield and Moorefield)

List of Airmont processors
Mobile processors (Braswell)
Smartphone and Tablet processors (Cherry Trail)

Not sure what specific functions you mean...
Can you name them?

I cut the rest of the mail which was very helpful info and explained
quite some open details.

Thanks!

      Thomas

  reply	other threads:[~2015-12-14 15:13 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-12-04 16:40 [PATCH V6 0/3] cpufreq: intel_pstate: account non C0 time Philippe Longepe
2015-12-04 16:40 ` Philippe Longepe
2015-12-04 16:40 ` [PATCH V6 1/3] cpufreq: intel_pstate: configurable algorithm to get target pstate Philippe Longepe
2015-12-08 15:27   ` Thomas Renninger
2015-12-08 18:02     ` Srinivas Pandruvada
2015-12-09 14:34       ` Thomas Renninger
2015-12-09 20:21         ` Srinivas Pandruvada
2015-12-10 13:04           ` Thomas Renninger
2015-12-10 17:28             ` Srinivas Pandruvada
2015-12-14 15:13               ` Thomas Renninger [this message]
2015-12-14 18:20                 ` Srinivas Pandruvada
2015-12-15 14:24                   ` Thomas Renninger
2015-12-15 17:59                     ` Len Brown
2015-12-16 10:25                       ` Thomas Renninger
2015-12-15 18:10                     ` Srinivas Pandruvada
2015-12-10 22:01             ` Rafael J. Wysocki
2015-12-14 16:14               ` Stephane Gasparini
2015-12-14 16:36                 ` Stephane Gasparini
2015-12-14 22:13                 ` Doug Smythies
2015-12-15 10:30                   ` Philippe Longepe
2015-12-15 13:06                     ` Stephane Gasparini
2015-12-15 23:34                     ` Doug Smythies
2015-12-16  9:49                       ` Stephane Gasparini
2015-12-14 16:22               ` Thomas Renninger
2015-12-14 16:38                 ` Stephane Gasparini
2015-12-14 22:06                 ` Rafael J. Wysocki
2015-12-15 14:13                   ` Thomas Renninger
2015-12-04 16:40 ` [PATCH " Philippe Longepe
2015-12-04 17:35   ` Srinivas Pandruvada
2015-12-10  0:45     ` Rafael J. Wysocki
2015-12-10  0:19       ` Srinivas Pandruvada
2015-12-10  0:51         ` Rafael J. Wysocki
2015-12-04 16:40 ` [PATCH V6 2/3] cpufreq: intel_pstate: account for non C0 time Philippe Longepe
2015-12-04 16:40 ` [PATCH " Philippe Longepe
2015-12-04 16:40 ` [PATCH V6 3/3] cpufreq: intel_pstate: Account for IO wait time Philippe Longepe
2015-12-04 16:40 ` Philippe Longepe

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