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([2a02:810d:15c0:828:77d1:16a1:abe1:84fc]) by smtp.gmail.com with ESMTPSA id n21-20020aa7c695000000b0050bdd7fafd8sm8262403edq.29.2023.05.16.03.33.49 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 16 May 2023 03:33:50 -0700 (PDT) Message-ID: <3af2f676-66fb-1c10-372f-4fcf6f7d733e@linaro.org> Date: Tue, 16 May 2023 12:33:49 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.11.0 Subject: Re: [PATCH v4 4/5] dt-bindings: iommu: arm,smmu: enable clocks for sa8775p Adreno SMMU Content-Language: en-US To: Bartosz Golaszewski , Sebastian Reichel , Rob Herring , Krzysztof Kozlowski , Andy Gross , Bjorn Andersson , Konrad Dybcio , Catalin Marinas , Will Deacon , Arnd Bergmann Cc: linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Bartosz Golaszewski References: <20230417125844.400782-1-brgl@bgdev.pl> <20230417125844.400782-5-brgl@bgdev.pl> From: Krzysztof Kozlowski In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org On 16/05/2023 12:07, Bartosz Golaszewski wrote: > On Mon, Apr 17, 2023 at 2:58 PM Bartosz Golaszewski wrote: >> >> From: Bartosz Golaszewski >> >> The GPU SMMU will require the clocks property to be set so put the >> relevant compatible into the adreno if-then block. >> >> Signed-off-by: Bartosz Golaszewski >> --- >> Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 6 ++++-- >> 1 file changed, 4 insertions(+), 2 deletions(-) >> >> diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml >> index ba677d401e24..53bed0160be8 100644 >> --- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml >> +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml >> @@ -79,6 +79,7 @@ properties: >> - description: Qcom Adreno GPUs implementing "qcom,smmu-500" and "arm,mmu-500" >> items: >> - enum: >> + - qcom,sa8775p-smmu-500 >> - qcom,sc7280-smmu-500 >> - qcom,sm6115-smmu-500 >> - qcom,sm6125-smmu-500 >> @@ -331,7 +332,9 @@ allOf: >> properties: >> compatible: >> contains: >> - const: qcom,sc7280-smmu-500 >> + enum: >> + - qcom,sa8775p-smmu-500 >> + - qcom,sc7280-smmu-500 >> then: >> properties: >> clock-names: >> @@ -413,7 +416,6 @@ allOf: >> - nvidia,smmu-500 >> - qcom,qcm2290-smmu-500 >> - qcom,qdu1000-smmu-500 >> - - qcom,sa8775p-smmu-500 >> - qcom,sc7180-smmu-500 >> - qcom,sc8180x-smmu-500 >> - qcom,sc8280xp-smmu-500 >> -- >> 2.37.2 >> > > Gentle ping for a review and a pick up. The DT patches that use this > schema are in next now so check_dtbs will now fail. I assume this is not for me, as you got my tag in v2, which I repeated in v3. Best regards, Krzysztof