From: "zhenglifeng (A)" <zhenglifeng1@huawei.com>
To: "Rafael J. Wysocki" <rafael@kernel.org>
Cc: <lenb@kernel.org>, <robert.moore@intel.com>,
<viresh.kumar@linaro.org>, <mario.limonciello@amd.com>,
<gautham.shenoy@amd.com>, <ray.huang@amd.com>,
<pierre.gondois@arm.com>, <acpica-devel@lists.linux.dev>,
<linux-acpi@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-pm@vger.kernel.org>, <linuxarm@huawei.com>,
<yumpusamongus@gmail.com>, <srinivas.pandruvada@linux.intel.com>,
<jonathan.cameron@huawei.com>, <zhanjie9@hisilicon.com>,
<lihuisong@huawei.com>, <hepeng68@huawei.com>,
<fanghao11@huawei.com>
Subject: Re: [PATCH v5 3/8] ACPI: CPPC: Rename cppc_get_perf() to cppc_get_reg_val()
Date: Fri, 14 Mar 2025 17:24:59 +0800 [thread overview]
Message-ID: <4fc77a58-8c77-463c-a50d-06ad19685bfb@huawei.com> (raw)
In-Reply-To: <CAJZ5v0iNzNROkPD4+b=Au8DwdF9unajKivdRQMBFfwzjFxHLcg@mail.gmail.com>
On 2025/3/13 3:54, Rafael J. Wysocki wrote:
> On Thu, Feb 6, 2025 at 2:14 PM Lifeng Zheng <zhenglifeng1@huawei.com> wrote:
>>
>> Rename cppc_get_perf() to cppc_get_reg_val() as a generic function to read
>> cppc registers. And extract the operations if register is in pcc out as
>> cppc_get_reg_val_in_pcc(). Without functional change.
>
> This should be split into two patches IMV.
Yes. That makes sense. Thanks.
>
>> Signed-off-by: Lifeng Zheng <zhenglifeng1@huawei.com>
>> ---
>> drivers/acpi/cppc_acpi.c | 66 +++++++++++++++++++++-------------------
>> 1 file changed, 35 insertions(+), 31 deletions(-)
>>
>> diff --git a/drivers/acpi/cppc_acpi.c b/drivers/acpi/cppc_acpi.c
>> index db22f8f107db..3c9c4ce2a0b0 100644
>> --- a/drivers/acpi/cppc_acpi.c
>> +++ b/drivers/acpi/cppc_acpi.c
>> @@ -1189,48 +1189,52 @@ static int cpc_write(int cpu, struct cpc_register_resource *reg_res, u64 val)
>> return ret_val;
>> }
>>
>> -static int cppc_get_perf(int cpunum, enum cppc_regs reg_idx, u64 *perf)
>> +static int cppc_get_reg_val_in_pcc(int cpu, struct cpc_register_resource *reg, u64 *val)
>> {
>> - struct cpc_desc *cpc_desc = per_cpu(cpc_desc_ptr, cpunum);
>> - struct cpc_register_resource *reg;
>> + int pcc_ss_id = per_cpu(cpu_pcc_subspace_idx, cpu);
>> + struct cppc_pcc_data *pcc_ss_data = NULL;
>> + int ret;
>>
>> - if (!cpc_desc) {
>> - pr_debug("No CPC descriptor for CPU:%d\n", cpunum);
>> + if (pcc_ss_id < 0) {
>> + pr_debug("Invalid pcc_ss_id\n");
>> return -ENODEV;
>> }
>>
>> - reg = &cpc_desc->cpc_regs[reg_idx];
>> + pcc_ss_data = pcc_data[pcc_ss_id];
>>
>> - if (IS_OPTIONAL_CPC_REG(reg_idx) && !CPC_SUPPORTED(reg)) {
>> - pr_debug("CPC register (reg_idx=%d) is not supported\n", reg_idx);
>> - return -EOPNOTSUPP;
>> - }
>
> I'm not a big fan of the IS_OPTIONAL_CPC_REG() macro. I'm not
> convinced at all that it adds any value above (and in the next patch
> for that matter) and the message printing the register index is just
> plain unuseful to anyone who doesn't know how to decode it.
With this index, it is easier to locate problems. This is what a "pr_debug"
for, isn't it?
>
> If CPC_SUPPORTED(reg) is not true, the register cannot be used AFAICS
> regardless of what IS_OPTIONAL_CPC_REG() has to say about it.
The name "CPC_SUPPORTED" may be a little confused. Actually, in ACPI 6.5,
only optional _CPC package fields that are not supported by the platform
should be encoded as 0 intergers or NULL registers. A mandatory field as a
0 interger is valid. So If I wanted to make this function as a generic one
to read cppc registers, it would have been more reasonable to do this
IS_OPTIONAL_CPC_REG() check before CPC_SUPPORTED().
>
>> + down_write(&pcc_ss_data->pcc_lock);
>>
>> - if (CPC_IN_PCC(reg)) {
>> - int pcc_ss_id = per_cpu(cpu_pcc_subspace_idx, cpunum);
>> - struct cppc_pcc_data *pcc_ss_data = NULL;
>> - int ret;
>> + if (send_pcc_cmd(pcc_ss_id, CMD_READ) >= 0)
>> + ret = cpc_read(cpu, reg, val);
>> + else
>> + ret = -EIO;
>>
>> - if (pcc_ss_id < 0) {
>> - pr_debug("Invalid pcc_ss_id\n");
>> - return -ENODEV;
>> - }
>> + up_write(&pcc_ss_data->pcc_lock);
>>
>> - pcc_ss_data = pcc_data[pcc_ss_id];
>> + return ret;
>> +}
>>
>> - down_write(&pcc_ss_data->pcc_lock);
>> +static int cppc_get_reg_val(int cpu, enum cppc_regs reg_idx, u64 *val)
>> +{
>> + struct cpc_desc *cpc_desc = per_cpu(cpc_desc_ptr, cpu);
>> + struct cpc_register_resource *reg;
>>
>> - if (send_pcc_cmd(pcc_ss_id, CMD_READ) >= 0)
>> - ret = cpc_read(cpunum, reg, perf);
>> - else
>> - ret = -EIO;
>> + if (!cpc_desc) {
>> + pr_debug("No CPC descriptor for CPU:%d\n", cpu);
>> + return -ENODEV;
>> + }
>>
>> - up_write(&pcc_ss_data->pcc_lock);
>> + reg = &cpc_desc->cpc_regs[reg_idx];
>>
>> - return ret;
>> + if (IS_OPTIONAL_CPC_REG(reg_idx) && !CPC_SUPPORTED(reg)) {
>> + pr_debug("CPC register (reg_idx=%d) is not supported\n", reg_idx);
>> + return -EOPNOTSUPP;
>> }
>>
>> - return cpc_read(cpunum, reg, perf);
>> + if (CPC_IN_PCC(reg))
>> + return cppc_get_reg_val_in_pcc(cpu, reg, val);
>> +
>> + return cpc_read(cpu, reg, val);
>> }
>>
>> /**
>> @@ -1242,7 +1246,7 @@ static int cppc_get_perf(int cpunum, enum cppc_regs reg_idx, u64 *perf)
>> */
>> int cppc_get_desired_perf(int cpunum, u64 *desired_perf)
>> {
>> - return cppc_get_perf(cpunum, DESIRED_PERF, desired_perf);
>> + return cppc_get_reg_val(cpunum, DESIRED_PERF, desired_perf);
>> }
>> EXPORT_SYMBOL_GPL(cppc_get_desired_perf);
>>
>> @@ -1255,7 +1259,7 @@ EXPORT_SYMBOL_GPL(cppc_get_desired_perf);
>> */
>> int cppc_get_nominal_perf(int cpunum, u64 *nominal_perf)
>> {
>> - return cppc_get_perf(cpunum, NOMINAL_PERF, nominal_perf);
>> + return cppc_get_reg_val(cpunum, NOMINAL_PERF, nominal_perf);
>> }
>>
>> /**
>> @@ -1267,7 +1271,7 @@ int cppc_get_nominal_perf(int cpunum, u64 *nominal_perf)
>> */
>> int cppc_get_highest_perf(int cpunum, u64 *highest_perf)
>> {
>> - return cppc_get_perf(cpunum, HIGHEST_PERF, highest_perf);
>> + return cppc_get_reg_val(cpunum, HIGHEST_PERF, highest_perf);
>> }
>> EXPORT_SYMBOL_GPL(cppc_get_highest_perf);
>>
>> @@ -1280,7 +1284,7 @@ EXPORT_SYMBOL_GPL(cppc_get_highest_perf);
>> */
>> int cppc_get_epp_perf(int cpunum, u64 *epp_perf)
>> {
>> - return cppc_get_perf(cpunum, ENERGY_PERF, epp_perf);
>> + return cppc_get_reg_val(cpunum, ENERGY_PERF, epp_perf);
>> }
>> EXPORT_SYMBOL_GPL(cppc_get_epp_perf);
>>
>> --
>> 2.33.0
>>
>>
>
next prev parent reply other threads:[~2025-03-14 9:25 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-06 13:14 [PATCH v5 0/8] Support for autonomous selection in cppc_cpufreq Lifeng Zheng
2025-02-06 13:14 ` [PATCH v5 1/8] ACPI: CPPC: Add IS_OPTIONAL_CPC_REG macro to judge if a cpc_reg is optional Lifeng Zheng
2025-02-06 13:14 ` [PATCH v5 2/8] ACPI: CPPC: Optimize cppc_get_perf() Lifeng Zheng
2025-02-06 13:14 ` [PATCH v5 3/8] ACPI: CPPC: Rename cppc_get_perf() to cppc_get_reg_val() Lifeng Zheng
2025-03-12 19:54 ` Rafael J. Wysocki
2025-03-14 9:24 ` zhenglifeng (A) [this message]
2025-03-14 10:32 ` Rafael J. Wysocki
2025-03-21 1:45 ` zhenglifeng (A)
2025-02-06 13:14 ` [PATCH v5 4/8] ACPI: CPPC: Add cppc_set_reg_val() Lifeng Zheng
2025-02-06 13:14 ` [PATCH v5 5/8] ACPI: CPPC: Refactor register value get and set ABIs Lifeng Zheng
2025-02-06 13:14 ` [PATCH v5 6/8] ACPI: CPPC: Modify cppc_get_auto_sel_caps() to cppc_get_auto_sel() Lifeng Zheng
2025-02-06 13:14 ` [PATCH v5 7/8] ACPI: CPPC: Add three functions related to autonomous selection Lifeng Zheng
2025-02-06 13:14 ` [PATCH v5 8/8] cpufreq: CPPC: Support for autonomous selection in cppc_cpufreq Lifeng Zheng
2025-02-06 13:16 ` [PATCH v5 0/8] " zhenglifeng (A)
2025-02-13 1:55 ` zhenglifeng (A)
2025-02-18 19:17 ` Rafael J. Wysocki
2025-02-22 10:07 ` zhenglifeng (A)
2025-02-24 10:31 ` Pierre Gondois
2025-02-24 12:49 ` zhenglifeng (A)
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