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charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-ORIG-GUID: tWzmOxq0rDVZew807BMNe4I5zSI-pIx- X-Proofpoint-GUID: tWzmOxq0rDVZew807BMNe4I5zSI-pIx- X-Proofpoint-Spam-Info: AW1haW4tMjYwOTA5MDE0NSBTYWx0ZWRfX/medTIJZW0ib 2asj3jSbXuvdo+tQcRHFVyPkJ3SF4EneCeUajX+PgBsnqgov2sEpA2TMBqBoP4hEZVAJmKhp3q/ 95OibQOf/yujukSMIUFeLMT6L7aPQWI= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTA5MDE0NSBTYWx0ZWRfX/Vk/enmc8yDN zf1zABmV+TosYo4cGuEWFgQXJ8/Ddp32iE0Ec/eoHIGUqOh8fhGty072HGpGRh0a6md0vc+YTtp wdD1v9G+ZvlsrGgCvJzSQGcaIjKSte8GkagP0J7xyXBSfwGNhjvaL3sCJtXL/XGZOZVMnvhgIE6 TRsaDW9HPP85V8DcRR64ulaceN1hXkwsg5kRxmhaEIaIaDqDeKWM3DheQIqGQqXr7i3rJsP7jSR mHArTsHWVuEOnYdhTR+T5pu0rKYcO4PVS5z+H9c9qlVCUDe1hwn7Rc8dVqj05yGFJoztnNTbK0A qDXk7i46c/p0PmYD7roVLHNdu0+KA5he2izMFpqjt4gTzfoOW58FavKswlArYWP6iG9pz/6lYtC JCXY57IaJthZ7jox6rzVDP5dmNuuWcW8Z4OvpsO+IVlF+La7cpHHmasqzidqMKgz9nn3yPfgjfx av/DAiOrFOf6BoYqEFg== X-Authority-Analysis: v=2.4 cv=SvWgLvO0 c=1 sm=1 tr=0 ts=6aa157f1 cx=c_pps a=P2rfLEam3zuxRRdjJWA2cw==:117 a=eGCDHFSXubCXFTSSGhjuOA==:17 a=IkcTkHD0fZMA:10 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_K5XuSEh1TEqbUxoQ0s3:22 a=VwQbUJbxAAAA:8 a=KKAkSRfTAAAA:8 a=EUspDBNiAAAA:8 a=H0k3xGeVXtyUzq8jG-sA:9 a=QEXdDO2ut3YA:10 a=ODZdjJIeia2B_SHc_B0f:22 a=cvBusfyB2V15izCimMoJ:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-08_03,2026-09-09_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1011 spamscore=0 phishscore=0 bulkscore=0 malwarescore=0 adultscore=0 priorityscore=1501 lowpriorityscore=0 suspectscore=0 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2609090145 Hi Krzysztof, Thanks for the review. On 8/27/2026 12:25 PM, Krzysztof Kozlowski wrote: > On Wed, Aug 19, 2026 at 12:32:10PM +0300, Atanas Filipov wrote: >> Add an ICC provider for the Qualcomm Camera NOC (CAMNOC). Multiple >> camera sub-devices share CAM_CC_CAMNOC_AXI_CLK; direct clk_set_rate() >> calls from each consumer cause a last-writer-wins race. >> >> Each consumer obtains an ICC path to SLAVE_CAMNOC_AXI and votes via >> icc_set_bw(). The ICC core aggregates votes (max peak_bw) and the >> set() callback converts the result to clk_set_rate(). Consumers >> encode the required frequency as peak_bw in kBps. >> >> Signed-off-by: Atanas Filipov >> --- >> +static int qcom_camnoc_get_bw(struct icc_node *node, u32 *avg, u32 *peak) >> +{ >> + *avg = 0; >> + *peak = 0; >> + >> + return 0; >> +} >> + >> +static int qcom_camnoc_set(struct icc_node *src, struct icc_node *dst) >> +{ >> + struct qcom_camnoc_icc_provider *cp = >> + to_camnoc_provider(src->provider); >> + unsigned long rate; >> + >> + /* >> + * peak_bw is the aggregated max across all consumers (kBps). >> + * Consumers encode the required clock frequency directly as kBps, >> + * so the conversion is simply: rate_hz = peak_bw * 1000. >> + * A vote of 0 means no requirement; leave the clock at its minimum. >> + */ >> + rate = icc_units_to_bps(dst->peak_bw); >> + >> + return clk_set_rate(cp->clk, rate); > > This driver does nothing to the ICC hardware, no votes. It only > translates kbps to Hz. This is not the purpose of ICC drivers. > > Looks heavily incomplete. Maybe those series should be marked as RFC. The basic idea is to manage clocks as interconnect providers, similar to this change: https://lore.kernel.org/all/20230512001334.2983048-3-dmitry.baryshkov@linaro.org/ There is requirement to maintain higher clock rate on source clocks and some place to aggregate them. One example is camnoc axi clock which is used by jpeg, camss, ope and maybe other drivers. The interconnect has already functionality inplace to maintain higher bw per request which can be used for maintaining higher clock frequency from requested drivers. One option is to use already available icc-clk provider, but we have to add many icc providers instead one provider with many ports. If you have an idea or other way of maintaining higher clock freq we can explore that as well. Thanks, ~Gjorgji