From mboxrd@z Thu Jan 1 00:00:00 1970 From: Arjan van de Ven Subject: Re: [RFC][PATCH v5 00/14] sched: packing tasks Date: Wed, 13 Nov 2013 08:13:57 -0800 Message-ID: <5283A545.4040406@linux.intel.com> References: <1382097147-30088-1-git-send-email-vincent.guittot@linaro.org> <20131111163630.GD26898@twins.programming.kicks-ass.net> <52810851.4090907@linux.intel.com> <20131111181805.GE29572@arm.com> <52825BE9.2080605@linux.intel.com> <42638CC1-ACC7-4330-A4F4-D78C88BE8155@arm.com> Mime-Version: 1.0 Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: QUOTED-PRINTABLE Return-path: Received: from mga09.intel.com ([134.134.136.24]:55164 "EHLO mga09.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756914Ab3KMQN7 (ORCPT ); Wed, 13 Nov 2013 11:13:59 -0500 In-Reply-To: <42638CC1-ACC7-4330-A4F4-D78C88BE8155@arm.com> Sender: linux-pm-owner@vger.kernel.org List-Id: linux-pm@vger.kernel.org To: Catalin Marinas Cc: Peter Zijlstra , Vincent Guittot , linux-kernel , Ingo Molnar , Paul Turner , Morten Rasmussen , Chris Metcalf , Tony Luck , "alex.shi@intel.com" , Preeti U Murthy , linaro-kernel , "len.brown@intel.com" , "l.majewski@samsung.com" , Jonathan Corbet , "Rafael J. Wysocki" , Paul McKenney , "linux-pm@vger.kernel.org" On 11/12/2013 3:14 PM, Catalin Marinas wrote: > On 12 Nov 2013, at 16:48, Arjan van de Ven wr= ote: >> On 11/11/2013 10:18 AM, Catalin Marinas wrote: >>> The ordering is based on the actual C-state, so a simple way is to = wake >>> up the CPU in the shallowest C-state. With asymmetric configuration= s >>> (big.LITTLE) we have different costs for the same C-state, so this = would >>> come in handy. >> >> btw I was considering something else; in practice CPUs will be in th= e deepest state.. >> ... at which point I was going to go with some other metrics of what= is best from a platform level > > I agree, other metrics are needed. The problem is that we currently > only have (relatively, guessed from the target residency) the cost of > transition from a C-state to a P-state (for the latter, not sure whic= h). > But we don=92t know what the power (saving) on that C-state is nor th= e one > at a P-state (and vendors reluctant to provide such information). So = the > best the scheduler can do is optimise the wake-up cost and blindly as= sume > that deeper C-state on a CPU is more efficient than lower P-states on= two > other CPUs (or the other way around). for picking the cpu to wake on there are also low level physical kind o= f things we'd want to take into account on the intel side.