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From: Dirk Brandewie <dirk.brandewie@gmail.com>
To: Ashwin Chaugule <ashwin.chaugule@linaro.org>, viresh.kumar@linaro.org
Cc: dirk.brandewie@gmail.com, rwells@codeaurora.org,
	rjw@rjwysocki.net, linaro-acpi@lists.linaro.org,
	linux-pm@vger.kernel.org, Catalin.Marinas@arm.com,
	linda.knippers@hp.com
Subject: Re: [RFC PATCH v2 2/3] CPPC as a PID controller backend
Date: Thu, 09 Oct 2014 09:22:45 -0700	[thread overview]
Message-ID: <5436B655.6090403@gmail.com> (raw)
In-Reply-To: <1412799064-2339-3-git-send-email-ashwin.chaugule@linaro.org>

On 10/08/2014 01:11 PM, Ashwin Chaugule wrote:

> +static int __init acpi_pid_init(void)
> +{
> +	int cpu, rc = 0;
> +

You should add a check here to not bind to Intel CPU. The CPPC interface
was created to provided an ACPI interface to to hardware controlled P states
(HWP) described in Volume 3 section 14.4 of the Intel SDM.
intel_pstate will be enabling HWP by controlling the MSRs directly and
not using CPPC.

Adding this check will keep us from having to fight load order since
this driver and intel_pstate are at the same init level.

> +	rc = acpi_cppc_init();
> +
> +	if (rc)
> +		return -ENODEV;
> +
> +	pr_info("ACPI PID driver initializing.\n");
> +
> +	all_cpu_data = vzalloc(sizeof(void *) * num_possible_cpus());
> +	if (!all_cpu_data)
> +		return -ENOMEM;
> +
> +	rc = cpufreq_register_driver(&acpi_pid_driver);
> +	if (rc)
> +		goto out;
> +
> +	acpi_pid_debug_expose_params();
> +	acpi_pid_sysfs_expose_params();
> +
> +	return rc;
> +out:
> +	get_online_cpus();
> +	for_each_online_cpu(cpu) {
> +		if (all_cpu_data[cpu]) {
> +			del_timer_sync(&all_cpu_data[cpu]->timer);
> +			kfree(all_cpu_data[cpu]);
> +		}
> +	}
> +
> +	put_online_cpus();
> +	vfree(all_cpu_data);
> +	return -ENODEV;
> +}
> +
> +late_initcall(acpi_pid_init);
>


  reply	other threads:[~2014-10-09 16:22 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-10-08 20:11 [RFC PATCH v2 0/3] CPPC as PID backend Ashwin Chaugule
2014-10-08 20:11 ` [RFC PATCH v2 1/3] PCC HACKS: Update PCC comm region with MSR data Ashwin Chaugule
2014-10-08 20:11 ` [RFC PATCH v2 2/3] CPPC as a PID controller backend Ashwin Chaugule
2014-10-09 16:22   ` Dirk Brandewie [this message]
2014-10-09 17:16     ` Ashwin Chaugule
2014-10-09 17:40       ` Dirk Brandewie
2014-10-09 18:18         ` Ashwin Chaugule
2014-10-17 13:58   ` Ashwin Chaugule
2014-10-08 20:11 ` [RFC PATCH v2 3/3] CPPC HACKS Ashwin Chaugule

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