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From: Andy Lutomirski <luto@kernel.org>
To: Len Brown <lenb@kernel.org>,
	x86@kernel.org, linux-pm@vger.kernel.org,
	linux-kernel@vger.kernel.org
Cc: Len Brown <len.brown@intel.com>
Subject: Re: [PATCH 1/1] x86 TSC: set X86_FEATURE_TSC_RELIABLE, per CPUID
Date: Mon, 01 Jun 2015 11:40:04 -0700	[thread overview]
Message-ID: <556CA704.1070000@kernel.org> (raw)
In-Reply-To: <f1643565587e70dd2fe2714e9afa566689211a9a.1433050960.git.len.brown@intel.com>

On 05/30/2015 10:44 PM, Len Brown wrote:
> From: Len Brown <len.brown@intel.com>
>
> Speed cpu_up() by believing CPUID's "invariant TSC" flag,
> and skipping the TSC warp test on single socket systems.

I'm typing this email on a "Intel(R) Core(TM) i7-3930K CPU @ 3.20GHz" 
with a "X79A-GD65 (8D) (MS-7760)" motherboard.  (DO NOT BUY THAT 
MOTHERBOARD!)

The brilliant stock firmware breaks TSC sync on bootup.  Even with the 
updated firmware I'm using, it's broken on resume from S3.

If you want to make this depend on X86_FEATURE_TSC_ADJUST and confirm 
that all cores have the same IA32_TSC_ADJUST value, then maybe that 
would be okay.  Otherwise, please don't underestimate the malice^Wgross 
incompetence of firmware vendors.

--Andy

  reply	other threads:[~2015-06-01 18:40 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-05-31  5:44 [PATCH 1/1] x86 TSC: set X86_FEATURE_TSC_RELIABLE, per CPUID Len Brown
2015-06-01 18:40 ` Andy Lutomirski [this message]
2015-06-02  0:45   ` Len Brown
2015-06-02  1:12     ` Andy Lutomirski
2015-06-03 19:03       ` Len Brown
2015-06-08 23:24         ` Andy Lutomirski
2015-06-09  8:15           ` Thomas Gleixner
2015-06-04  7:17     ` H. Peter Anvin
2015-06-06 16:12       ` Andy Lutomirski

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