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From: Caesar Wang <caesar.upstream@gmail.com>
To: Eduardo Valentin <edubezval@gmail.com>
Cc: Caesar Wang <wxt@rock-chips.com>,
	Heiko Stuebner <heiko@sntech.de>,
	linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-rockchip@lists.infradead.org,
	Zhang Rui <rui.zhang@intel.com>,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2 5/9] thermal: rockchip: Add the flag for adc value increment or decrement
Date: Mon, 9 Nov 2015 11:29:12 +0800	[thread overview]
Message-ID: <56401308.4060602@gmail.com> (raw)
In-Reply-To: <563E1B07.4060108@gmail.com>



在 2015年11月07日 23:38, Caesar Wang 写道:
> Hello Eduardo,
>
> 在 2015年11月07日 03:11, Eduardo Valentin 写道:
>> On Thu, Nov 05, 2015 at 01:18:01PM +0800, Caesar Wang wrote:
>>> The conversion table has the adc value and temperature.
>>> In fact, the adc value only has the increment or decrement mode in
>>> conversion table.
>>>
>>> Moment, we can add the flag to be better support the *code_to_temp*
>>> for differenr SoCs.
>>>
>>> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
>>> ---
>>>
>>> Changes in v2: None
>>> Changes in v1: None
>>>
>>>   drivers/thermal/rockchip_thermal.c | 64 
>>> ++++++++++++++++++++++++++++++--------
>>>   1 file changed, 51 insertions(+), 13 deletions(-)
>>>
>>> diff --git a/drivers/thermal/rockchip_thermal.c 
>>> b/drivers/thermal/rockchip_thermal.c
>>> index e828f18..9df027f 100644
>>> --- a/drivers/thermal/rockchip_thermal.c
>>> +++ b/drivers/thermal/rockchip_thermal.c
>>> @@ -53,6 +53,16 @@ enum sensor_id {
>>>   };
>>>     /**
>>> +* The conversion table has the adc value and temperature.
>>> +* ADC_DECREMENT is the adc value decremnet.(e.g. v2_code_table)
>>> +* ADC_INCREMNET is the adc value incremnet.(e.g. v3_code_table)
>>> +*/
>>> +enum adc_flag {
>>> +    ADC_DECREMENT = 0,
>>> +    ADC_INCREMENT,
>>> +};
>>> +
>>> +/**
>>>    * The max sensors is two in rockchip SoCs.
>>>    * Two sensors: CPU and GPU sensor.
>>>    */
>>> @@ -66,6 +76,9 @@ struct chip_tsadc_table {
>>>         /* that analogic mask data */
>>>       unsigned long data_mask;
>>> +
>>> +    /* adc value is increment or decrement */
>>> +    unsigned int flag;

Sorry, I think to use the enum type will be better.

Says:
enum adc_sort_flag sort_flag;
or
enum adc_sort_mode  mode;

>>
>> Maybe bool? And rename to something more meaningful?
>
> Sure, that should be a bool type.
> I guess the rename in sort_flag......(maybe will have a better name)
>
>
>>
>> Or do you plan to have more conditions to test in your flag?
>
> Moment, the flag (increment or decrement) can support all the rockchip 
> series SoCs have thermal function.
>
>>>   };
>>>     struct rockchip_tsadc_chip {
>>> @@ -223,19 +236,43 @@ static int rk_tsadcv2_code_to_temp(struct 
>>> chip_tsadc_table table, u32 code,
>>>         WARN_ON(table.length < 2);
>>>   -    code &= table.data_mask;
>>> -    if (code < table.id[high].code)
>>> +    switch (table.flag) {
>>> +    case ADC_DECREMENT:
>>> +        code &= table.data_mask;
>>> +        if (code < table.id[high].code)
>>>           return -EAGAIN;        /* Incorrect reading */
>> Add an indentation.
>
> Thanks, will be fixed in next patch.
>
>
>>>   -    while (low <= high) {
>>> -        if (code >= table.id[mid].code &&
>>> -            code < table.id[mid - 1].code)
>>> -            break;
>>> -        else if (code < table.id[mid].code)
>>> -            low = mid + 1;
>>> -        else
>>> -            high = mid - 1;
>>> -        mid = (low + high) / 2;
>>> +        while (low <= high) {
>>> +            if (code >= table.id[mid].code &&
>>> +                code < table.id[mid - 1].code)
>>> +                break;
>>> +            else if (code < table.id[mid].code)
>>> +                low = mid + 1;
>>> +            else
>>> +                high = mid - 1;
>>> +
>>> +            mid = (low + high) / 2;
>>> +        }
>>> +        break;
>>> +    case ADC_INCREMENT:
>>> +        code &= table.data_mask;
>>> +        if (code < table.id[low].code)
>>> +        return -EAGAIN;        /* Incorrect reading */
>>> +
>> add an indentation.
>
> Ditto.
>
> Thanks,
> Caesar
>>
>>> +        while (low <= high) {
>>> +            if (code >= table.id[mid - 1].code &&
>>> +                code < table.id[mid].code)
>>> +                break;
>>> +            else if (code > table.id[mid].code)
>>> +                low = mid + 1;
>>> +            else
>>> +                high = mid - 1;
>>> +
>>> +            mid = (low + high) / 2;
>>> +        }
>>> +        break;
>>> +    default:
>>> +        pr_err("Invalid the table conversion\n");
>>>       }
>>>         /*
>>> @@ -245,8 +282,8 @@ static int rk_tsadcv2_code_to_temp(struct 
>>> chip_tsadc_table table, u32 code,
>>>        * to produce less granular result.
>>>        */
>>>       num = table.id[mid].temp - v2_code_table[mid - 1].temp;
>>> -    num *= table.id[mid - 1].code - code;
>>> -    denom = table.id[mid - 1].code - table.id[mid].code;
>>> +    num *= abs(table.id[mid - 1].code - code);
>>> +    denom = abs(table.id[mid - 1].code - table.id[mid].code);
>>>       *temp = table.id[mid - 1].temp + (num / denom);
>>>         return 0;
>>> @@ -367,6 +404,7 @@ static const struct rockchip_tsadc_chip 
>>> rk3288_tsadc_data = {
>>>           .id = v2_code_table,
>>>           .length = ARRAY_SIZE(v2_code_table),
>>>           .data_mask = TSADCV2_DATA_MASK,
>>> +        .flag = ADC_DECREMENT,
>>>       },
>>>   };
>>>   --
>>> 1.9.1
>>>
>> _______________________________________________
>> linux-arm-kernel mailing list
>> linux-arm-kernel@lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>
>

-- 
Thanks,
Caesar


  reply	other threads:[~2015-11-09  3:29 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-11-05  5:17 [PATCH v2 0/9] Better compatible for the rockchip thermal and support RK3368 SoCs Caesar Wang
2015-11-05  5:17 ` [PATCH v2 1/9] dt-bindings: rockchip-thermal: Support the RK3368 SoCs compatible Caesar Wang
2015-11-05 23:45   ` Rob Herring
2015-11-05  5:17 ` [PATCH v2 2/9] thermal: rockchip: better to compatible the driver for different SoCs Caesar Wang
2015-11-05  5:17 ` [PATCH v2 3/9] thermal: rockchip: trivial: fix typo in commit Caesar Wang
2015-11-05  5:18 ` [PATCH v2 4/9] thermal: rockchip: improve the conversion function Caesar Wang
2015-11-06 19:00   ` Eduardo Valentin
     [not found]     ` <20151106190006.GB8202-bi+AKbBUZKY6gyzm1THtWbp2dZbC/Bob@public.gmane.org>
2015-11-07 14:41       ` Caesar Wang
2015-11-05  5:18 ` [PATCH v2 5/9] thermal: rockchip: Add the flag for adc value increment or decrement Caesar Wang
2015-11-06 19:11   ` Eduardo Valentin
2015-11-07 15:38     ` Caesar Wang
2015-11-09  3:29       ` Caesar Wang [this message]
2015-11-05  5:18 ` [PATCH v2 6/9] thermal: rockchip: Support the RK3368 SoCs in thermal drivers Caesar Wang
     [not found]   ` <1446700685-18017-7-git-send-email-wxt-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
2015-11-06 19:39     ` Andy Shevchenko
2015-11-07 14:25       ` Caesar Wang
2015-11-06 18:47 ` [PATCH v2 0/9] Better compatible for the rockchip thermal and support RK3368 SoCs Eduardo Valentin
     [not found]   ` <20151106184739.GA8202-bi+AKbBUZKY6gyzm1THtWbp2dZbC/Bob@public.gmane.org>
2015-11-06 19:03     ` Heiko Stuebner
2015-11-06 19:18       ` Eduardo Valentin
2015-11-07 15:53       ` Caesar Wang
     [not found]         ` <563E1E7A.6010503-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2015-11-07 23:13           ` Heiko Stuebner
2015-11-08  9:39             ` Caesar Wang
2015-11-07 15:47     ` Caesar Wang

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