linux-pm.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Wei Ni <wni@nvidia.com>
To: Eduardo Valentin <edubezval@gmail.com>
Cc: rui.zhang@intel.com, thierry.reding@gmail.com,
	MLongnecker@nvidia.com, swarren@wwwdotorg.org,
	mikko.perttunen@kapsi.fi, linux-tegra@vger.kernel.org,
	linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH V7 11/12] arm64: tegra: add soctherm node for Tegra210
Date: Tue, 15 Mar 2016 18:43:00 +0800	[thread overview]
Message-ID: <56E7E734.5010307@nvidia.com> (raw)
In-Reply-To: <20160314192500.GE1872@localhost.localdomain>



On 2016年03月15日 03:25, Eduardo Valentin wrote:
> * PGP Signed by an unknown key
> 
> On Fri, Mar 11, 2016 at 11:11:34AM +0800, Wei Ni wrote:
>> Adds soctherm node for Tegra210, and add cpu,
>> gpu, mem, pllx as thermal-zones. Set critical
>> trip temp for cpu and gpu thermal zone.
>>
>> Signed-off-by: Wei Ni <wni@nvidia.com>
>> ---
>>  arch/arm64/boot/dts/nvidia/tegra210.dtsi | 60 ++++++++++++++++++++++++++++++++
>>  1 file changed, 60 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
>> index cd4f45ccd6a7..c7ef500a347e 100644
>> --- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi
>> +++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
>> @@ -3,6 +3,7 @@
>>  #include <dt-bindings/memory/tegra210-mc.h>
>>  #include <dt-bindings/pinctrl/pinctrl-tegra.h>
>>  #include <dt-bindings/interrupt-controller/arm-gic.h>
>> +#include <dt-bindings/thermal/tegra124-soctherm.h>
>>  
>>  / {
>>  	compatible = "nvidia,tegra210";
>> @@ -802,4 +803,63 @@
>>  				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
>>  		interrupt-parent = <&gic>;
>>  	};
>> +
>> +	soctherm: thermal-sensor@0,700e2000 {
>> +		compatible = "nvidia,tegra210-soctherm";
>> +		reg = <0x0 0x700e2000 0x0 0x1000>;
>> +		interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
>> +		clocks = <&tegra_car TEGRA210_CLK_TSENSOR>,
>> +			<&tegra_car TEGRA210_CLK_SOC_THERM>;
>> +		clock-names = "tsensor", "soctherm";
>> +		resets = <&tegra_car 78>;
>> +		reset-names = "soctherm";
>> +		#thermal-sensor-cells = <1>;
>> +	};
>> +
>> +	thermal-zones {
>> +		cpu {
>> +			polling-delay-passive = <1000>;
>> +			polling-delay = <0>;
>> +
>> +			thermal-sensors =
>> +				<&soctherm TEGRA124_SOCTHERM_SENSOR_CPU>;
>> +
>> +			trips {
>> +				cpu_shutdown_trip: shutdown-trip {
>> +					temperature = <102500>;
>> +					hysteresis = <1000>;
>> +					type = "critical";
>> +				};
>> +			};
>> +		};
>> +		mem {
>> +			polling-delay-passive = <0>;
>> +			polling-delay = <0>;
>> +
>> +			thermal-sensors =
>> +				<&soctherm TEGRA124_SOCTHERM_SENSOR_MEM>;
> 
> 
> Why no trips for mem? Why should we  care ?

The critical trip temperature will be set to HW for critical shutdown. Normally,
we just take care the CPU and GPU temperature. And in HW, the MEM use the same
critical trip with GPU. For PLLX, we just keep the default critical trip in HW.
So I didn't configure the MEM and PLLX. I can add critical trips for them.

> 
> Please have a look on the binding to check for mandatory properties and
> sub nodes.

Hmm, yes, the trips and cooling-maps are required properties. How about to add a
dummy-cool-dev, so that it could be compatible with the binding.

Wei.

> 
>> +		};
>> +		gpu {
>> +			polling-delay-passive = <1000>;
>> +			polling-delay = <0>;
>> +
>> +			thermal-sensors =
>> +				<&soctherm TEGRA124_SOCTHERM_SENSOR_GPU>;
>> +
>> +			trips {
>> +				gpu_shutdown_trip: shutdown-trip {
>> +					temperature = <103000>;
>> +					hysteresis = <1000>;
>> +					type = "critical";
>> +				};
>> +			};
>> +		};
>> +		pllx {
>> +			polling-delay-passive = <0>;
>> +			polling-delay = <0>;
>> +
>> +			thermal-sensors =
>> +				<&soctherm TEGRA124_SOCTHERM_SENSOR_PLLX>;
> 
> ditto
> 
>> +		};
>> +	};
>>  };
>> -- 
>> 1.9.1
>>
> 
> * Unknown Key
> * 0x7DA4E256
> 

  reply	other threads:[~2016-03-15 10:42 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-03-11  3:11 [PATCH V7 11/12] arm64: tegra: add soctherm node for Tegra210 Wei Ni
     [not found] ` <1457665894-30141-1-git-send-email-wni-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-03-14 19:25   ` Eduardo Valentin
2016-03-15 10:43     ` Wei Ni [this message]
2016-03-15 19:46       ` Eduardo Valentin

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=56E7E734.5010307@nvidia.com \
    --to=wni@nvidia.com \
    --cc=MLongnecker@nvidia.com \
    --cc=edubezval@gmail.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pm@vger.kernel.org \
    --cc=linux-tegra@vger.kernel.org \
    --cc=mikko.perttunen@kapsi.fi \
    --cc=rui.zhang@intel.com \
    --cc=swarren@wwwdotorg.org \
    --cc=thierry.reding@gmail.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).