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Wysocki" References: <20241101024421.26679-1-quic_msana@quicinc.com> <1e47ee3e-7439-4dc4-aef6-0ad2f82ee341@intel.com> From: Ram Prakash Gupta In-Reply-To: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: EyvgPlTf5AOUxv2B4W5dwsg1dpQdmhz2 X-Proofpoint-ORIG-GUID: EyvgPlTf5AOUxv2B4W5dwsg1dpQdmhz2 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNTE0MDAyMyBTYWx0ZWRfX/obH56WET+rg I/+HfZ43K5DAIG+lq4je8lRcVgH4w7WT5jwQY3tqku63Wg+bBIxZX9OQX0WbPfe+Hw3NuGyly54 vewkrWhXGsfOI5xY8ug8I1vPSXhU7bZRmudJSbYIXBgQSCn1563Q7vvHRruySAWzc8R1GQaBM4M ZHN1vCq0NG6EY887Ye+NF7ykgJOr5uLQkSSuON0e6f9KAQ6F7TsD/eaObKIfSZrki6uUwFLEHRq U8bUJ3JS0YybvrOvPWHpEBpBg8/gOmIIJFwhgIqnpavGFV9H9YRYMejP/Tt3Bb5Tdmd419rU/DS CzVchs7d1XvfDvT0MFp0SyZg3glUoVsw5NEJDQiYGrFdp4uufeYIBRAc4jfiT1vwPIHrKHkiXgP TaO1wJcidh/WwzXGUBG6hGIgiKTTiCG5hkR0LPLpadlOC+/rjyC1ZjMCFiuozrL9yaFfZ0wH X-Authority-Analysis: v=2.4 cv=Gp9C+l1C c=1 sm=1 tr=0 ts=68240774 cx=c_pps a=ouPCqIW2jiPt+lZRy3xVPw==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=GEpy-HfZoHoA:10 a=IkcTkHD0fZMA:10 a=dt9VzEwgFbYA:10 a=VwQbUJbxAAAA:8 a=COk6AnOGAAAA:8 a=QyXUC8HyAAAA:8 a=rkOx34ob1f9j6TDfATwA:9 a=QEXdDO2ut3YA:10 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.0.736,FMLib:17.12.80.40 definitions=2025-05-14_01,2025-05-09_01,2025-02-21_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 clxscore=1011 spamscore=0 lowpriorityscore=0 impostorscore=0 bulkscore=0 adultscore=0 suspectscore=0 priorityscore=1501 mlxscore=0 malwarescore=0 mlxlogscore=999 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2505070000 definitions=main-2505140023 Thanks a lot Adrian and Uffe for your review and comment. The Qualcomm engineer who initiated this work, is no longer working on this and I am taking up the responsibility to continue on this work. On 11/12/2024 8:38 PM, Ulf Hansson wrote: > On Fri, 8 Nov 2024 at 15:43, Adrian Hunter wrote: >> On 1/11/24 04:44, Madhusudhan Sana wrote: >>> Register mmc driver to CPU latency PM QoS framework to improve >>> mmc device io performance. >> Not sure host controller drivers should really be manipulating >> cpu_latency_qos in order to squeeze a bit more I/O performance. > I fully agree, this type of boosting doesn't belong in a low level > storage driver, as it is simply not capable of understanding the > use-case. Note that the cpu_latency_qos can also be managed from > user-space. > > Moreover, I guess there are use cases where it would make sense to > have some in-kernel governor to boost too for some conditions. But as > far as I can tell, we don't have a common way to do this, but rather > platform specific hacks via devfreq drivers for example. > > Kind regards > Uffe Hi Uffe/Adrian, In my opinion, many use case owners might not opt to control qos and may not use qos to gain better performance, and similar work was done in other driver eg. https://patchwork.kernel.org/project/linux-mediatek/patch/20231219123706.6463-2-quic_mnaresh@quicinc.com/ Earlier this was done in Qualcomm specific file but later community suggested to make it into core driver, so that it applies for everyone. Having this thought in mind, here also this was made it into core driver. If this still doesn't fit here in mmc context, would like to refactor and move into Qualcomm specific file sdhci-msm.c please share your opinion. Thanks, Ram > >>> Signed-off-by: Madhusudhan Sana >>> --- >>> drivers/mmc/host/sdhci.c | 47 ++++++++++++++++++++++++++++++++++++++++ >>> drivers/mmc/host/sdhci.h | 4 ++++ >>> 2 files changed, 51 insertions(+) >>> >>> diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c >>> index f4a7733a8ad2..ffcc9544a3df 100644 >>> --- a/drivers/mmc/host/sdhci.c >>> +++ b/drivers/mmc/host/sdhci.c >>> @@ -359,6 +359,46 @@ static void sdhci_config_dma(struct sdhci_host *host) >>> sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); >>> } >>> >>> +/* >>> + * sdhci_pm_qos_init - initialize PM QoS request >>> + */ >>> +void sdhci_pm_qos_init(struct sdhci_host *host) >>> +{ >>> + if (host->pm_qos_enable) >>> + return; >>> + >>> + cpu_latency_qos_add_request(&host->pm_qos_req, PM_QOS_DEFAULT_VALUE); >>> + >>> + if (cpu_latency_qos_request_active(&host->pm_qos_req)) >>> + host->pm_qos_enable = true; >>> +} >>> + >>> +/* >>> + * sdhci_pm_qos_exit - remove request from PM QoS >>> + */ >>> +void sdhci_pm_qos_exit(struct sdhci_host *host) >>> +{ >>> + if (!host->pm_qos_enable) >>> + return; >>> + >>> + cpu_latency_qos_remove_request(&host->pm_qos_req); >>> + host->pm_qos_enable = false; >>> +} >>> + >>> +/* >>> + * sdhci_pm_qos_update - update PM QoS request >>> + * @on - True, vote for perf PM QoS mode >>> + * - False, vote for power save mode. >>> + */ >>> +static void sdhci_pm_qos_update(struct sdhci_host *host, bool on) >>> +{ >>> + if (!host->pm_qos_enable) >>> + return; >>> + >>> + cpu_latency_qos_update_request(&host->pm_qos_req, on ? >>> + 0 : PM_QOS_DEFAULT_VALUE); >>> +} >>> + >>> static void sdhci_init(struct sdhci_host *host, int soft) >>> { >>> struct mmc_host *mmc = host->mmc; >>> @@ -384,6 +424,9 @@ static void sdhci_init(struct sdhci_host *host, int soft) >>> host->reinit_uhs = true; >>> mmc->ops->set_ios(mmc, &mmc->ios); >>> } >>> + >>> + sdhci_pm_qos_init(host); >>> + sdhci_pm_qos_update(host, true); >>> } >>> >>> static void sdhci_reinit(struct sdhci_host *host) >>> @@ -2072,6 +2115,7 @@ void sdhci_set_clock(struct sdhci_host *host, unsigned int clock) >>> >>> clk = sdhci_calc_clk(host, clock, &host->mmc->actual_clock); >>> sdhci_enable_clk(host, clk); >>> + sdhci_pm_qos_update(host, true); >>> } >>> EXPORT_SYMBOL_GPL(sdhci_set_clock); >>> >>> @@ -3811,6 +3855,7 @@ int sdhci_suspend_host(struct sdhci_host *host) >>> sdhci_writel(host, 0, SDHCI_SIGNAL_ENABLE); >>> free_irq(host->irq, host); >>> } >>> + sdhci_pm_qos_update(host, false); >>> >>> return 0; >>> } >>> @@ -3873,6 +3918,7 @@ int sdhci_runtime_suspend_host(struct sdhci_host *host) >>> spin_lock_irqsave(&host->lock, flags); >>> host->runtime_suspended = true; >>> spin_unlock_irqrestore(&host->lock, flags); >>> + sdhci_pm_qos_update(host, false); >>> >>> return 0; >>> } >>> @@ -4987,6 +5033,7 @@ void sdhci_remove_host(struct sdhci_host *host, int dead) >>> if (host->use_external_dma) >>> sdhci_external_dma_release(host); >>> >>> + sdhci_pm_qos_exit(host); >>> host->adma_table = NULL; >>> host->align_buffer = NULL; >>> } >>> diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h >>> index cd0e35a80542..685036ed888b 100644 >>> --- a/drivers/mmc/host/sdhci.h >>> +++ b/drivers/mmc/host/sdhci.h >>> @@ -16,6 +16,7 @@ >>> #include >>> #include >>> #include >>> +#include >>> >>> #include >>> >>> @@ -675,6 +676,9 @@ struct sdhci_host { >>> >>> u64 data_timeout; >>> >>> + struct pm_qos_request pm_qos_req; /* PM QoS request handle */ >>> + bool pm_qos_enable; /* flag to check PM QoS is enable */ >>> + >>> unsigned long private[] ____cacheline_aligned; >>> }; >>>