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Wysocki" , Daniel Lezcano , Zhang Rui , Lukasz Luba , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Thierry Reding , Thierry Reding , Jonathan Hunter , Svyatoslav Ryhel , "Jiri Slaby (SUSE)" , Jonathan Cameron , Uwe =?UTF-8?B?S2xlaW5lLUvDtm5pZw==?= , Svyatoslav Ryhel Cc: linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v4 3/6] thermal: tegra: soctherm-fuse: prepare calibration for Tegra114 support Date: Tue, 26 Aug 2025 11:01:19 +0900 Message-ID: <6192274.lOV4Wx5bFT@senjougahara> In-Reply-To: <20250825104026.127911-4-clamor95@gmail.com> References: <20250825104026.127911-1-clamor95@gmail.com> <20250825104026.127911-4-clamor95@gmail.com> Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" X-ClientProxiedBy: SYAPR01CA0017.ausprd01.prod.outlook.com (2603:10c6:1::29) To DM4PR12MB6494.namprd12.prod.outlook.com (2603:10b6:8:ba::19) Precedence: bulk X-Mailing-List: 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=?utf-8?B?Y3BYK3kreWJjbzFJYUdEK2djcjA4eFpIRHMxeVREd29mbmlpY2NFbm9ha3JE?= =?utf-8?B?c21XSnRWMzUvUmQ2UmhQMFYydllLenp4N2xHTXVlMk02dzF6bDBIQmJRK2JC?= =?utf-8?B?ZnlYdXUvTmI5UllOR0w2MVB5OGJ3PT0=?= X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-Network-Message-Id: af82c4b8-de41-42e3-ca60-08dde44476b3 X-MS-Exchange-CrossTenant-AuthSource: DM4PR12MB6494.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 26 Aug 2025 02:01:25.9844 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: JdozydQqjW7QTcYYqexUWfqyW9lZMsfjxQhDjevH5FVW9nD+lN3AoFhLBfLgLZiPPl2ETQWuilkhoSG6R3KBdg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB7772 On Monday, August 25, 2025 7:40=E2=80=AFPM Svyatoslav Ryhel wrote: > The Tegra114 has a different fuse calibration register layout and address > compared to other Tegra SoCs, requiring SOCTHERM shift, mask, register > address, and nominal tf calibration value to be configurable. >=20 > Signed-off-by: Svyatoslav Ryhel > --- > drivers/thermal/tegra/soctherm-fuse.c | 18 ++++++++++++------ > drivers/thermal/tegra/soctherm.h | 7 ++++++- > drivers/thermal/tegra/tegra124-soctherm.c | 4 ++++ > drivers/thermal/tegra/tegra132-soctherm.c | 4 ++++ > drivers/thermal/tegra/tegra210-soctherm.c | 4 ++++ > 5 files changed, 30 insertions(+), 7 deletions(-) >=20 > diff --git a/drivers/thermal/tegra/soctherm-fuse.c > b/drivers/thermal/tegra/soctherm-fuse.c index 190f95280e0b..8d37cd8c9122 > 100644 > --- a/drivers/thermal/tegra/soctherm-fuse.c > +++ b/drivers/thermal/tegra/soctherm-fuse.c > @@ -9,15 +9,12 @@ >=20 > #include "soctherm.h" >=20 > -#define NOMINAL_CALIB_FT 105 > #define NOMINAL_CALIB_CP 25 >=20 > #define FUSE_TSENSOR_CALIB_CP_TS_BASE_MASK 0x1fff > #define FUSE_TSENSOR_CALIB_FT_TS_BASE_MASK (0x1fff << 13) > #define FUSE_TSENSOR_CALIB_FT_TS_BASE_SHIFT 13 >=20 > -#define FUSE_TSENSOR_COMMON 0x180 > - > /* > * Tegra210: Layout of bits in FUSE_TSENSOR_COMMON: > * 3 2 1 0 > @@ -26,7 +23,7 @@ > * | BASE_FT | BASE_CP | SHFT_FT | SHIFT_CP | > * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ > * > - * Tegra12x, etc: > + * Tegra124: > * In chips prior to Tegra210, this fuse was incorrectly sized as 26 bit= s, > * and didn't hold SHIFT_CP in [31:26]. Therefore these missing six bits > * were obtained via the FUSE_SPARE_REALIGNMENT_REG register [5:0]. > @@ -44,6 +41,13 @@ > * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ > * |---------------------------------------------------| SHIFT_CP | > * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ > + * > + * Tegra114: Layout of bits in FUSE_TSENSOR_COMMON aka FUSE_VSENSOR_CALI= B: > + * 3 2 1 0 > + * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 > + * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ > + * | SHFT_FT | BASE_FT | SHIFT_CP | BASE_CP | > + * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ > */ >=20 > #define CALIB_COEFFICIENT 1000000LL > @@ -77,7 +81,7 @@ int tegra_calc_shared_calib(const struct > tegra_soctherm_fuse *tfuse, s32 shifted_cp, shifted_ft; > int err; >=20 > - err =3D tegra_fuse_readl(FUSE_TSENSOR_COMMON, &val); > + err =3D tegra_fuse_readl(tfuse->fuse_common_reg, &val); > if (err) > return err; >=20 > @@ -96,10 +100,12 @@ int tegra_calc_shared_calib(const struct > tegra_soctherm_fuse *tfuse, return err; > } >=20 > + shifted_cp =3D (val & tfuse->fuse_shift_cp_mask) >> > + tfuse->fuse_shift_cp_shift; > shifted_cp =3D sign_extend32(val, 5); >=20 > shared->actual_temp_cp =3D 2 * NOMINAL_CALIB_CP + shifted_cp; > - shared->actual_temp_ft =3D 2 * NOMINAL_CALIB_FT + shifted_ft; > + shared->actual_temp_ft =3D 2 * tfuse->nominal_calib_ft + shifted_ft; >=20 > return 0; > } > diff --git a/drivers/thermal/tegra/soctherm.h > b/drivers/thermal/tegra/soctherm.h index 70501e73d586..083388094fd4 10064= 4 > --- a/drivers/thermal/tegra/soctherm.h > +++ b/drivers/thermal/tegra/soctherm.h > @@ -56,6 +56,9 @@ > #define SENSOR_TEMP2_MEM_TEMP_MASK (0xffff << 16) > #define SENSOR_TEMP2_PLLX_TEMP_MASK 0xffff >=20 > +#define FUSE_VSENSOR_CALIB 0x08c > +#define FUSE_TSENSOR_COMMON 0x180 > + > /** > * struct tegra_tsensor_group - SOC_THERM sensor group data > * @name: short name of the temperature sensor group > @@ -109,9 +112,11 @@ struct tsensor_group_thermtrips { >=20 > struct tegra_soctherm_fuse { > u32 fuse_base_cp_mask, fuse_base_cp_shift; > + u32 fuse_shift_cp_mask, fuse_shift_cp_shift; > u32 fuse_base_ft_mask, fuse_base_ft_shift; > u32 fuse_shift_ft_mask, fuse_shift_ft_shift; > - u32 fuse_spare_realignment; > + u32 fuse_common_reg, fuse_spare_realignment; > + u32 nominal_calib_ft; > }; >=20 > struct tsensor_shared_calib { > diff --git a/drivers/thermal/tegra/tegra124-soctherm.c > b/drivers/thermal/tegra/tegra124-soctherm.c index > 20ad27f4d1a1..d86acff1b234 100644 > --- a/drivers/thermal/tegra/tegra124-soctherm.c > +++ b/drivers/thermal/tegra/tegra124-soctherm.c > @@ -200,11 +200,15 @@ static const struct tegra_tsensor tegra124_tsensors= [] > =3D { static const struct tegra_soctherm_fuse tegra124_soctherm_fuse =3D = { > .fuse_base_cp_mask =3D 0x3ff, > .fuse_base_cp_shift =3D 0, > + .fuse_shift_cp_mask =3D 0x3f, > + .fuse_shift_cp_shift =3D 0, > .fuse_base_ft_mask =3D 0x7ff << 10, > .fuse_base_ft_shift =3D 10, > .fuse_shift_ft_mask =3D 0x1f << 21, > .fuse_shift_ft_shift =3D 21, > + .fuse_common_reg =3D FUSE_TSENSOR_COMMON, > .fuse_spare_realignment =3D 0x1fc, > + .nominal_calib_ft =3D 105, > }; >=20 > const struct tegra_soctherm_soc tegra124_soctherm =3D { > diff --git a/drivers/thermal/tegra/tegra132-soctherm.c > b/drivers/thermal/tegra/tegra132-soctherm.c index > b76308fdad9e..64c0363b9717 100644 > --- a/drivers/thermal/tegra/tegra132-soctherm.c > +++ b/drivers/thermal/tegra/tegra132-soctherm.c > @@ -200,11 +200,15 @@ static struct tegra_tsensor tegra132_tsensors[] =3D= { > static const struct tegra_soctherm_fuse tegra132_soctherm_fuse =3D { > .fuse_base_cp_mask =3D 0x3ff, > .fuse_base_cp_shift =3D 0, > + .fuse_shift_cp_mask =3D 0x3f, > + .fuse_shift_cp_shift =3D 0, > .fuse_base_ft_mask =3D 0x7ff << 10, > .fuse_base_ft_shift =3D 10, > .fuse_shift_ft_mask =3D 0x1f << 21, > .fuse_shift_ft_shift =3D 21, > + .fuse_common_reg =3D FUSE_TSENSOR_COMMON, > .fuse_spare_realignment =3D 0x1fc, > + .nominal_calib_ft =3D 105, > }; >=20 > const struct tegra_soctherm_soc tegra132_soctherm =3D { > diff --git a/drivers/thermal/tegra/tegra210-soctherm.c > b/drivers/thermal/tegra/tegra210-soctherm.c index > d0ff793f18c5..f6e1493f0202 100644 > --- a/drivers/thermal/tegra/tegra210-soctherm.c > +++ b/drivers/thermal/tegra/tegra210-soctherm.c > @@ -201,11 +201,15 @@ static const struct tegra_tsensor tegra210_tsensors= [] > =3D { static const struct tegra_soctherm_fuse tegra210_soctherm_fuse =3D = { > .fuse_base_cp_mask =3D 0x3ff << 11, > .fuse_base_cp_shift =3D 11, > + .fuse_shift_cp_mask =3D 0x3f, > + .fuse_shift_cp_shift =3D 0, > .fuse_base_ft_mask =3D 0x7ff << 21, > .fuse_base_ft_shift =3D 21, > .fuse_shift_ft_mask =3D 0x1f << 6, > .fuse_shift_ft_shift =3D 6, > + .fuse_common_reg =3D FUSE_TSENSOR_COMMON, > .fuse_spare_realignment =3D 0, > + .nominal_calib_ft =3D 105, > }; >=20 > static struct tsensor_group_thermtrips tegra210_tsensor_thermtrips[] =3D= { Reviewed-by: Mikko Perttunen