From: Christian Marangi <ansuelsmth@gmail.com>
To: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Cc: Ilia Lin <ilia.lin@kernel.org>, Andy Gross <agross@kernel.org>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konrad.dybcio@linaro.org>,
"Rafael J. Wysocki" <rafael@kernel.org>,
Viresh Kumar <viresh.kumar@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Nishanth Menon <nm@ti.com>, Stephen Boyd <sboyd@kernel.org>,
Yassine Oudjana <y.oudjana@protonmail.com>,
linux-pm@vger.kernel.org, linux-arm-msm@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 2/2] dt-bindings: opp: opp-v2-kryo-cpu: enlarge opp-supported-hw maximum
Date: Sun, 22 Jan 2023 20:19:58 +0100 [thread overview]
Message-ID: <63cd8d18.050a0220.85c72.4142@mx.google.com> (raw)
In-Reply-To: <CAA8EJppFKDXJtt5zyM4mhEJ=BQwHUCVJcJKeH2GjkzAvwbfCBw@mail.gmail.com>
On Sun, Jan 22, 2023 at 09:15:53PM +0200, Dmitry Baryshkov wrote:
> On Sun, 22 Jan 2023 at 20:13, Christian Marangi <ansuelsmth@gmail.com> wrote:
> >
> > On Sun, Jan 22, 2023 at 07:59:42PM +0200, Dmitry Baryshkov wrote:
> > > On Sun, 22 Jan 2023 at 19:46, Christian Marangi <ansuelsmth@gmail.com> wrote:
> > > >
> > > > Enlarge opp-supported-hw maximum value. In recent SoC we started
> > > > matching more bit and we currently match mask of 112. The old maximum of
> > > > 7 was good for old SoC that didn't had complex id, but now this is
> > > > limiting and we need to enlarge it to support more variants.
> > > >
> > > > Document all the various mask that can be used and limit them to only
> > > > reasonable values instead of using a generic maximum limit.
> > > >
> > > > Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
> > > > ---
> > > > .../bindings/opp/opp-v2-kryo-cpu.yaml | 20 +++++++++++++++++--
> > > > 1 file changed, 18 insertions(+), 2 deletions(-)
> > > >
> > > > diff --git a/Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml b/Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml
> > > > index b4947b326773..908cb0d7695a 100644
> > > > --- a/Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml
> > > > +++ b/Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml
> > > > @@ -50,12 +50,28 @@ patternProperties:
> > > > opp-supported-hw:
> > > > description: |
> > > > A single 32 bit bitmap value, representing compatible HW.
> > > > - Bitmap:
> > > > + Bitmap for MSM8996 format:
> > > > 0: MSM8996, speedbin 0
> > > > 1: MSM8996, speedbin 1
> > > > 2: MSM8996, speedbin 2
> > > > 3-31: unused
> > > > - maximum: 0x7
> > > > +
> > > > + Bitmap for MSM8996 later revision format:
> > > > + 0: MSM8996, speedbin 0
> > > > + 1: MSM8996, speedbin 1
> > > > + 2: MSM8996, speedbin 2
> > > > + 3: always set
> > >
> > > This is used for speedbin 3
> > >
> >
> > Is it right that 4 bit speedbin is only introduced later? Cause looking
> > at the current opp-supported-hw for MSM8996SG and MSM8996 originally
> > (and based on what this Documentation say) there were only 3 bit and
> > then they started using a 4th bit. Just asking if it's ok to keep the
> > bitmap split or i should just merge it.
>
> I don't think I got the question, please excuse me. Historically
> msm8996.dtsi used 0xff as 'all possible platforms' value for the GPU
> tables. Lately I fixed the CPU tables, added support for speed-bin 3.
> However I left these 0xff in GPU opp table intact. I don't remember if
> there was any reason behind that. Anyway this bit isn't always set, it
> is set only for the entries which should be selected for MSM8996 speed
> bin 3.
>
Question is: Should I merge the 2 format to something like?
A single 32 bit bitmap value, representing compatible HW.
Bitmap for MSM8996 format:
0: MSM8996, speedbin 0
1: MSM8996, speedbin 1
2: MSM8996, speedbin 2
3: MSM8996, speedbin 3
4-31: unused
Bitmap for MSM8996SG format (speedbin shifted of 4 left):
0-3: unused
4: MSM8996SG, speedbin 0
5: MSM8996SG, speedbin 1
6: MSM8996SG, speedbin 2
7-31: unused
Or just replace the 'Always set' to speedbin 3?
(by the looks of it seems they started blowing speedbin 3 only in later
revision and initialy there were only 3 speedbin bit)
> >
> > > > + 4-31: unused
> > > > +
> > > > + Bitmap for MSM8996SG format (speedbin shifted of 4 left):
> > > > + 0-3: unused
> > > > + 4: MSM8996SG, speedbin 0
> > > > + 5: MSM8996SG, speedbin 1
> > > > + 6: MSM8996SG, speedbin 2
> > > > + 7-31: unused
> > > > + enum: [0x1, 0x2, 0x3, 0x4, 0x7,
> > > > + 0x9, 0xd, 0xe, 0xf,
> > > > + 0x10, 0x20, 0x30, 0x70]
> > > >
> > > > clock-latency-ns: true
> > > >
> > > > --
> > > > 2.38.1
> > > >
> >
> > --
> > Ansuel
>
>
>
> --
> With best wishes
> Dmitry
--
Ansuel
next prev parent reply other threads:[~2023-01-22 19:23 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-22 17:45 [PATCH v2 1/2] dt-bindings: cpufreq: qcom-cpufreq-nvmem: make cpr bindings optional Christian Marangi
2023-01-22 17:45 ` [PATCH v2 2/2] dt-bindings: opp: opp-v2-kryo-cpu: enlarge opp-supported-hw maximum Christian Marangi
2023-01-22 17:59 ` Dmitry Baryshkov
2023-01-22 18:04 ` Christian Marangi
2023-01-22 19:15 ` Dmitry Baryshkov
2023-01-22 19:19 ` Christian Marangi [this message]
2023-01-23 13:49 ` Rob Herring
2023-01-23 13:49 ` [PATCH v2 1/2] dt-bindings: cpufreq: qcom-cpufreq-nvmem: make cpr bindings optional Rob Herring
2023-01-23 13:52 ` Christian Marangi
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