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From: <dan.j.williams@intel.com>
To: <dan.j.williams@intel.com>,
	Smita Koralahalli <Smita.KoralahalliChannabasappa@amd.com>,
	<linux-cxl@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<nvdimm@lists.linux.dev>, <linux-fsdevel@vger.kernel.org>,
	<linux-pm@vger.kernel.org>
Cc: Ard Biesheuvel <ardb@kernel.org>,
	Alison Schofield <alison.schofield@intel.com>,
	Vishal Verma <vishal.l.verma@intel.com>,
	"Ira Weiny" <ira.weiny@intel.com>,
	Dan Williams <dan.j.williams@intel.com>,
	Jonathan Cameron <jonathan.cameron@huawei.com>,
	Yazen Ghannam <yazen.ghannam@amd.com>,
	Dave Jiang <dave.jiang@intel.com>,
	Davidlohr Bueso <dave@stgolabs.net>,
	Matthew Wilcox <willy@infradead.org>, Jan Kara <jack@suse.cz>,
	"Rafael J . Wysocki" <rafael@kernel.org>,
	Len Brown <len.brown@intel.com>, Pavel Machek <pavel@kernel.org>,
	Li Ming <ming.li@zohomail.com>,
	Jeff Johnson <jeff.johnson@oss.qualcomm.com>,
	"Ying Huang" <huang.ying.caritas@gmail.com>,
	Yao Xingtao <yaoxt.fnst@fujitsu.com>,
	Peter Zijlstra <peterz@infradead.org>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Nathan Fontenot <nathan.fontenot@amd.com>,
	Terry Bowman <terry.bowman@amd.com>,
	Robert Richter <rrichter@amd.com>,
	Benjamin Cheatham <benjamin.cheatham@amd.com>,
	Zhijian Li <lizhijian@fujitsu.com>,
	Borislav Petkov <bp@alien8.de>,
	Smita Koralahalli <Smita.KoralahalliChannabasappa@amd.com>,
	Tomasz Wolski <tomasz.wolski@fujitsu.com>
Subject: Re: [PATCH v5 6/7] dax/hmem, cxl: Defer and resolve ownership of Soft Reserved memory ranges
Date: Wed, 28 Jan 2026 19:09:44 -0800	[thread overview]
Message-ID: <697acf78acf70_3095100c@dwillia2-mobl4.notmuch> (raw)
In-Reply-To: <697a9d46b147e_309510027@dwillia2-mobl4.notmuch>

dan.j.williams@ wrote:
> Smita Koralahalli wrote:
> > The current probe time ownership check for Soft Reserved memory based
> > solely on CXL window intersection is insufficient. dax_hmem probing is not
> > always guaranteed to run after CXL enumeration and region assembly, which
> > can lead to incorrect ownership decisions before the CXL stack has
> > finished publishing windows and assembling committed regions.
> > 
> > Introduce deferred ownership handling for Soft Reserved ranges that
> > intersect CXL windows at probe time by scheduling deferred work from
> > dax_hmem and waiting for the CXL stack to complete enumeration and region
> > assembly before deciding ownership.
> > 
> > Evaluate ownership of Soft Reserved ranges based on CXL region
> > containment.
> > 
> >    - If all Soft Reserved ranges are fully contained within committed CXL
> >      regions, DROP handling Soft Reserved ranges from dax_hmem and allow
> >      dax_cxl to bind.
> > 
> >    - If any Soft Reserved range is not fully claimed by committed CXL
> >      region, tear down all CXL regions and REGISTER the Soft Reserved
> >      ranges with dax_hmem instead.
> > 
> > While ownership resolution is pending, gate dax_cxl probing to avoid
> > binding prematurely.
> > 
> > This enforces a strict ownership. Either CXL fully claims the Soft
> > Reserved ranges or it relinquishes it entirely.
> > 
> > Co-developed-by: Dan Williams <dan.j.williams@intel.com>
> > Signed-off-by: Dan Williams <dan.j.williams@intel.com>
> > Signed-off-by: Smita Koralahalli <Smita.KoralahalliChannabasappa@amd.com>
> > ---
> >  drivers/cxl/core/region.c | 25 ++++++++++++
> >  drivers/cxl/cxl.h         |  2 +
> >  drivers/dax/cxl.c         |  9 +++++
> >  drivers/dax/hmem/hmem.c   | 81 ++++++++++++++++++++++++++++++++++++++-
> >  4 files changed, 115 insertions(+), 2 deletions(-)
> > 
[..]
> > diff --git a/drivers/dax/cxl.c b/drivers/dax/cxl.c
> > index 13cd94d32ff7..b7e90d6dd888 100644
> > --- a/drivers/dax/cxl.c
> > +++ b/drivers/dax/cxl.c
> > @@ -14,6 +14,15 @@ static int cxl_dax_region_probe(struct device *dev)
> >  	struct dax_region *dax_region;
> >  	struct dev_dax_data data;
> >  
> > +	switch (dax_cxl_mode) {
> > +	case DAX_CXL_MODE_DEFER:
> > +		return -EPROBE_DEFER;
> 
> So, I think this causes a mess because now you have 2 workqueues (driver
> core defer-queue and hmem work) competing to disposition this device.
> What this seems to want is to only run in the post "soft reserve
> dispositioned" world. Something like (untested!)
> 
> diff --git a/drivers/dax/cxl.c b/drivers/dax/cxl.c
> index 13cd94d32ff7..1162495eb317 100644
> --- a/drivers/dax/cxl.c
> +++ b/drivers/dax/cxl.c
> @@ -14,6 +14,9 @@ static int cxl_dax_region_probe(struct device *dev)
>         struct dax_region *dax_region;
>         struct dev_dax_data data;
>  
> +       /* Make sure that dax_cxl_mode is stable, only runs once at boot */
> +       flush_hmem_work();
> +

It occurs to me that this likely insta-hangs because
wait_for_device_probe() waits forever for itself to flush. So it may
need to be a scheme where the cxl_dax_region_driver registration does
something like this (untested!):

diff --git a/drivers/dax/cxl.c b/drivers/dax/cxl.c
index 13cd94d32ff7..6a1a38b4f64b 100644
--- a/drivers/dax/cxl.c
+++ b/drivers/dax/cxl.c
@@ -41,7 +41,32 @@ static struct cxl_driver cxl_dax_region_driver = {
        },
 };
 
-module_cxl_driver(cxl_dax_region_driver);
+static void cxl_dax_region_driver_register(struct work_struct *work)
+{
+       flush_hmem_work();
+       cxl_driver_register(&cxl_dax_region_driver);
+}
+
+static DECLARE_WORK(cxl_dax_region_driver_work, cxl_dax_region_driver_register);
+
+static int __init cxl_dax_region_init(void)
+{
+       /*
+        * Need to resolve a race with dax_hmem wanting to drive regions 
+        * instead of CXL
+        */
+       queue_work(system_long_wq, &cxl_dax_region_driver_work);
+       return 0;
+}
+module_init(cxl_dax_region_init);
+
+static void __exit cxl_dax_region_exit(void)
+{
+       flush_work(&cxl_dax_region_driver_work);
+       cxl_driver_unregister(&cxl_dax_region_driver);
+}
+module_exit(cxl_dax_region_exit);
+
 MODULE_ALIAS_CXL(CXL_DEVICE_DAX_REGION);
 MODULE_DESCRIPTION("CXL DAX: direct access to CXL regions");
 MODULE_LICENSE("GPL");

  reply	other threads:[~2026-01-29  3:09 UTC|newest]

Thread overview: 56+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-01-22  4:55 [PATCH v5 0/7] dax/hmem, cxl: Coordinate Soft Reserved handling with CXL and HMEM Smita Koralahalli
2026-01-22  4:55 ` [PATCH v5 1/7] dax/hmem: Request cxl_acpi and cxl_pci before walking Soft Reserved ranges Smita Koralahalli
2026-01-22 16:16   ` Jonathan Cameron
2026-01-22  4:55 ` [PATCH v5 2/7] dax/hmem: Gate Soft Reserved deferral on DEV_DAX_CXL Smita Koralahalli
2026-01-22  4:55 ` [PATCH v5 3/7] cxl/region: Skip decoder reset on detach for autodiscovered regions Smita Koralahalli
2026-01-22 16:18   ` Jonathan Cameron
2026-01-26 21:37     ` Koralahalli Channabasappa, Smita
2026-01-27 23:37       ` dan.j.williams
2026-01-28 15:39         ` Alejandro Lucero Palau
2026-01-28 21:24           ` dan.j.williams
2026-01-23 10:42   ` Alejandro Lucero Palau
2026-01-23 21:58   ` Dave Jiang
2026-01-22  4:55 ` [PATCH v5 4/7] cxl/region: Add helper to check Soft Reserved containment by CXL regions Smita Koralahalli
2026-01-22 16:25   ` Jonathan Cameron
2026-01-27 21:47     ` Koralahalli Channabasappa, Smita
2026-01-23 22:19   ` Dave Jiang
2026-01-25  3:30     ` Koralahalli Channabasappa, Smita
2026-01-27 21:59   ` dan.j.williams
2026-01-28 21:07     ` Koralahalli Channabasappa, Smita
2026-01-28 21:33       ` dan.j.williams
2026-01-22  4:55 ` [PATCH v5 5/7] dax: Introduce dax_cxl_mode for CXL coordination Smita Koralahalli
2026-01-22 16:33   ` Jonathan Cameron
2026-01-23 22:30   ` Dave Jiang
2026-01-27 20:03   ` Alison Schofield
2026-01-22  4:55 ` [PATCH v5 6/7] dax/hmem, cxl: Defer and resolve ownership of Soft Reserved memory ranges Smita Koralahalli
2026-01-22 13:40   ` kernel test robot
2026-01-23  5:30   ` kernel test robot
2026-01-23  6:35   ` Alison Schofield
2026-01-26 21:05     ` Koralahalli Channabasappa, Smita
2026-01-26 22:33       ` Alison Schofield
2026-01-27 21:45         ` Koralahalli Channabasappa, Smita
2026-01-29  0:45           ` dan.j.williams
2026-01-23 11:59   ` Alejandro Lucero Palau
2026-01-25  3:17     ` Koralahalli Channabasappa, Smita
2026-01-26 12:20       ` Alejandro Lucero Palau
2026-01-26 14:26         ` Alejandro Lucero Palau
2026-01-26 23:53       ` dan.j.williams
2026-01-27 12:16         ` Alejandro Lucero Palau
2025-10-01 17:15           ` Tomasz Wolski
2026-01-27 16:52             ` Alejandro Lucero Palau
2026-01-27 23:41           ` dan.j.williams
2026-01-28 16:19             ` Alejandro Lucero Palau
2026-01-27 21:29         ` Koralahalli Channabasappa, Smita
2026-01-23 22:55   ` Dave Jiang
2026-01-27  1:38   ` Alison Schofield
2026-01-28 21:14     ` Koralahalli Channabasappa, Smita
2026-01-28 21:47       ` Alison Schofield
2026-01-27 20:11   ` Alison Schofield
2026-01-28 23:35   ` dan.j.williams
2026-01-29  3:09     ` dan.j.williams [this message]
2026-01-29 21:20     ` Koralahalli Channabasappa, Smita
2026-01-29 22:01       ` dan.j.williams
2026-02-04 23:27         ` Tomasz Wolski
2026-01-22  4:55 ` [PATCH v5 7/7] dax/hmem: Reintroduce Soft Reserved ranges back into the iomem tree Smita Koralahalli
2026-01-22 16:39   ` Jonathan Cameron
2026-01-28 22:07     ` Koralahalli Channabasappa, Smita

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