Re: powercap ABI clarification

["Pandruvada, Srinivas" <srinivas.pandruvada@intel.com>]

Hi Daniel,


On Mon, 2024-05-27 at 14:19 +0000, Zhang, Rui wrote:
> On Mon, 2024-05-27 at 14:55 +0200, Daniel Lezcano wrote:
> > 
> > Hi Srinivas,
> > 
> > the powercap ABI exports some constraint files. Even if I suspect
> > their 
> > semantic it is not really clear how they should behave.
> > 
> >        │   ├──constraint_0_name
> >        │   ├──constraint_0_power_limit_uw
> >        │   ├──constraint_0_time_window_us
> >        │   ├──constraint_1_name
> >        │   ├──constraint_1_power_limit_uw
> >        │   ├──constraint_1_time_window_us
> > 
> > Are the constraints controller specific? I mean, each controller
> > defines 
> > their constraints? Or is it supposed to behave the same way
> > whatever
> > the 
> > controller?
> 
> Currently we have three controllers, MSR RAPL, MMIO RAPL and TPMI
> RAPL.
> They are actually the same feature (RAPL) via different register
> Interfaces.
> So their behaviors are consistent.
> 
Correct, all our controllers behaves same for these attributes. The
scope of controllers can be different. For example, psys controls whole
platform, a package domain controls limited to that package.

> > 
> > Is the time window giving the duration of the power_limit_uw
> > constraint? 
> > Or is it an average power during this time window?
> 
> The average power during this time window.
> The constraint is always effective after we set it.
> 
Correct.

> > 
> > What is the purpose of min|max_time_window_us?
> 
> It is the upper/lower limit for users to set a meaningful time
> window.
> 
Correct.

> > 
> > Can we set several constraints or are they mutually exclusive?
> 
> My understanding is that they can both take effect.
> "Two power limits can be specified, corresponding to time windows of
> different sizes. Each power limit provides inde-
> pendent clamping control that would permit the processor cores to go
> below OS-requested state to meet the power
> limits."
> 

In Intel platform hardware resolves the constraints.
For example if your set constraints on a package, using either via MMIO
RAPL or MSR RAPL, the most limiting constraint is applied by the
hardware.


Also there is case where the platform domain "psys" constraints can be
more constraining than a package under it. In this case psys constaints
will be applied.


> > 
> > Is there any documentation describing with more details the ABIs?
> > 
> Interesting, I just found this one,
> Documentation/ABI/testing/sysfs-class-powercap, should we move it to
> stable? Other than that, I don't know.
> 
That is the only one.

Thanks,
Srinivas


> thanks,
> rui
>