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boundary="------------LgIKQih4XJdKfcTUVGxqK0lT"; protected-headers="v1" From: Matt Coster To: Michal Wilczynski Cc: Guo Ren , Fu Wei , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bartosz Golaszewski , Philipp Zabel , Frank Binns , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Ulf Hansson , Marek Szyprowski , Drew Fustini , Bartosz Golaszewski , linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, dri-devel@lists.freedesktop.org Message-ID: <6bbcc434-84c3-401e-8bd8-1b22718e7bcd@imgtec.com> Subject: Re: [PATCH v7 1/5] drm/imagination: Use pwrseq for TH1520 GPU power management References: <20250626-apr_14_for_sending-v7-0-6593722e0217@samsung.com> <20250626-apr_14_for_sending-v7-1-6593722e0217@samsung.com> In-Reply-To: <20250626-apr_14_for_sending-v7-1-6593722e0217@samsung.com> --------------LgIKQih4XJdKfcTUVGxqK0lT Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable On 26/06/2025 10:33, Michal Wilczynski wrote: > Update the Imagination PVR DRM driver to leverage the pwrseq framework > for managing the complex power sequence of the GPU on the T-HEAD TH1520= > SoC. >=20 > To cleanly separate platform specific logic from the generic driver, > this patch introduces a `pwr_power_sequence_ops` struct containing > function pointers for power_on and power_off operations. This allows fo= r > different power management strategies to be selected at probe time base= d > on the device's compatible string. >=20 > A `pvr_device_data` struct, associated with each compatible in the > of_device_id table, points to the appropriate ops table (manual or > pwrseq). >=20 > At probe time, the driver inspects the assigned ops struct. If the > pwrseq variant is detected, the driver calls > devm_pwrseq_get("gpu-power"), deferring probe if the sequencer is not > yet available. Otherwise, it falls back to the existing manual clock an= d > reset handling. The runtime PM callbacks now call the appropriate > functions via the ops table. Hi Michal, I've replied again on the v6 series regarding the power domain situation[1], it took me a while to figure out internally what's going on= in this SoC integration but I hope we have a somewhat satisfying answer now. As for v7, just a couple notes from me on this patch, plus whatever changes are needed to solve the power domains once and for all. The rest of the series otherwise looks good to me. >=20 > Reviewed-by: Ulf Hansson > Reviewed-by: Bartosz Golaszewski > Signed-off-by: Michal Wilczynski > --- > drivers/gpu/drm/imagination/pvr_device.c | 36 +++++++- > drivers/gpu/drm/imagination/pvr_device.h | 17 ++++ > drivers/gpu/drm/imagination/pvr_drv.c | 27 +++++- > drivers/gpu/drm/imagination/pvr_power.c | 139 ++++++++++++++++++++++-= -------- > drivers/gpu/drm/imagination/pvr_power.h | 13 +++ > 5 files changed, 185 insertions(+), 47 deletions(-) >=20 > diff --git a/drivers/gpu/drm/imagination/pvr_device.c b/drivers/gpu/drm= /imagination/pvr_device.c > index 8b9ba4983c4cb5bc40342fcafc4259078bc70547..770fc32a6fe485aad41cd92= fa1431dd233ac20dc 100644 > --- a/drivers/gpu/drm/imagination/pvr_device.c > +++ b/drivers/gpu/drm/imagination/pvr_device.c > @@ -23,8 +23,12 @@ > #include > #include > #include > +#include > #include > #include > +#if IS_ENABLED(CONFIG_POWER_SEQUENCING) > +#include > +#endif > #include > #include > #include > @@ -618,6 +622,9 @@ pvr_device_init(struct pvr_device *pvr_dev) > struct device *dev =3D drm_dev->dev; > int err; > =20 > + /* Get the platform-specific data based on the compatible string. */ > + pvr_dev->device_data =3D of_device_get_match_data(dev); > + > /* > * Setup device parameters. We do this first in case other steps > * depend on them. > @@ -631,10 +638,31 @@ pvr_device_init(struct pvr_device *pvr_dev) > if (err) > return err; > =20 > - /* Get the reset line for the GPU */ > - err =3D pvr_device_reset_init(pvr_dev); > - if (err) > - return err; > + /* > + * For platforms that require it, get the power sequencer. > + * For all others, perform manual reset initialization. > + */ > +#if IS_ENABLED(CONFIG_POWER_SEQUENCING) > + if (pvr_dev->device_data->pwr_ops =3D=3D &pvr_power_sequence_ops_pwrs= eq) { > + pvr_dev->pwrseq =3D devm_pwrseq_get(dev, "gpu-power"); > + if (IS_ERR(pvr_dev->pwrseq)) { > + /* > + * This platform requires a sequencer. If we can't get > + * it, we must return the error (including -EPROBE_DEFER > + * to wait for the provider to appear) > + */ > + return dev_err_probe( > + dev, PTR_ERR(pvr_dev->pwrseq), > + "Failed to get required power sequencer\n"); > + } > + } else > +#endif > + { > + /* This platform does not use a sequencer, init reset manually. */ > + err =3D pvr_device_reset_init(pvr_dev); > + if (err) > + return err; > + } Can you extract this whole conditional into an ->init() callback on struct pvr_power_sequence_ops? That would eliminate the #if conditional code from this file entirely since you'd no longer need at all. > =20 > /* Explicitly power the GPU so we can access control registers before= the FW is booted. */ > err =3D pm_runtime_resume_and_get(dev); > diff --git a/drivers/gpu/drm/imagination/pvr_device.h b/drivers/gpu/drm= /imagination/pvr_device.h > index 7cb01c38d2a9c3fc71effe789d4dfe54eddd93ee..0d7f7c78573a0766a467fb0= c3a577ffe152d0892 100644 > --- a/drivers/gpu/drm/imagination/pvr_device.h > +++ b/drivers/gpu/drm/imagination/pvr_device.h > @@ -37,6 +37,9 @@ struct clk; > /* Forward declaration from . */ > struct firmware; > =20 > +/* Forward declaration from '. > +struct pwrseq_desc; > + > /** > * struct pvr_gpu_id - Hardware GPU ID information for a PowerVR devic= e > * @b: Branch ID. > @@ -57,6 +60,14 @@ struct pvr_fw_version { > u16 major, minor; > }; > =20 > +/** > + * struct pvr_device_data - Platform specific data associated with a c= ompatible string. > + * @pwr_ops: Pointer to a structure with platform-specific power funct= ions. > + */ > +struct pvr_device_data { > + const struct pvr_power_sequence_ops *pwr_ops; > +}; > + > /** > * struct pvr_device - powervr-specific wrapper for &struct drm_device= > */ > @@ -98,6 +109,9 @@ struct pvr_device { > /** @fw_version: Firmware version detected at runtime. */ > struct pvr_fw_version fw_version; > =20 > + /** @device_data: Pointer to platform-specific data. */ > + const struct pvr_device_data *device_data; > + > /** @regs_resource: Resource representing device control registers. *= / > struct resource *regs_resource; > =20 > @@ -148,6 +162,9 @@ struct pvr_device { > */ > struct reset_control *reset; > =20 > + /** @pwrseq: Pointer to a power sequencer, if one is used. */ > + struct pwrseq_desc *pwrseq; > + Can you add a note to this doc comment explaining that CONFIG_POWER_SEQUENCING is not a dependency of this driver, and that this member should only be accessed behind an IS_ENABLED() check? > /** @irq: IRQ number. */ > int irq; > =20 > diff --git a/drivers/gpu/drm/imagination/pvr_drv.c b/drivers/gpu/drm/im= agination/pvr_drv.c > index b058ec183bb30ab5c3db17ebaadf2754520a2a1f..af830e565646daf19555197= df492438ef48d5e44 100644 > --- a/drivers/gpu/drm/imagination/pvr_drv.c > +++ b/drivers/gpu/drm/imagination/pvr_drv.c > @@ -1480,15 +1480,37 @@ static void pvr_remove(struct platform_device *= plat_dev) > pvr_power_domains_fini(pvr_dev); > } > =20 > +static const struct pvr_device_data pvr_device_data_manual =3D { > + .pwr_ops =3D &pvr_power_sequence_ops_manual, > +}; > + > +#if IS_ENABLED(CONFIG_POWER_SEQUENCING) > +static const struct pvr_device_data pvr_device_data_pwrseq =3D { > + .pwr_ops =3D &pvr_power_sequence_ops_pwrseq, > +}; > +#endif > + > static const struct of_device_id dt_match[] =3D { > - { .compatible =3D "img,img-rogue", .data =3D NULL }, > +#if IS_ENABLED(CONFIG_POWER_SEQUENCING) > + { > + .compatible =3D "thead,th1520-gpu", > + .data =3D &pvr_device_data_pwrseq, > + }, > +#endif > + { > + .compatible =3D "img,img-rogue", > + .data =3D &pvr_device_data_manual, > + }, > =20 > /* > * This legacy compatible string was introduced early on before the m= ore generic > * "img,img-rogue" was added. Keep it around here for compatibility, = but never use > * "img,img-axe" in new devicetrees. > */ > - { .compatible =3D "img,img-axe", .data =3D NULL }, > + { > + .compatible =3D "img,img-axe", > + .data =3D &pvr_device_data_manual, > + }, > {} > }; > MODULE_DEVICE_TABLE(of, dt_match); > @@ -1513,4 +1535,5 @@ MODULE_DESCRIPTION(PVR_DRIVER_DESC); > MODULE_LICENSE("Dual MIT/GPL"); > MODULE_IMPORT_NS("DMA_BUF"); > MODULE_FIRMWARE("powervr/rogue_33.15.11.3_v1.fw"); > +MODULE_FIRMWARE("powervr/rogue_36.52.104.182_v1.fw"); > MODULE_FIRMWARE("powervr/rogue_36.53.104.796_v1.fw"); > diff --git a/drivers/gpu/drm/imagination/pvr_power.c b/drivers/gpu/drm/= imagination/pvr_power.c > index 41f5d89e78b854cf6993838868a4416a220b490a..13aef27849d1a71df77406c= 8d7845836998a35a0 100644 > --- a/drivers/gpu/drm/imagination/pvr_power.c > +++ b/drivers/gpu/drm/imagination/pvr_power.c > @@ -18,6 +18,9 @@ > #include > #include > #include > +#if IS_ENABLED(CONFIG_POWER_SEQUENCING) > +#include > +#endif > #include > #include > #include > @@ -234,6 +237,96 @@ pvr_watchdog_init(struct pvr_device *pvr_dev) > return 0; > } > =20 > +static int pvr_power_on_sequence_manual(struct pvr_device *pvr_dev) > +{ > + int err; > + > + err =3D clk_prepare_enable(pvr_dev->core_clk); > + if (err) > + return err; > + > + err =3D clk_prepare_enable(pvr_dev->sys_clk); > + if (err) > + goto err_core_clk_disable; > + > + err =3D clk_prepare_enable(pvr_dev->mem_clk); > + if (err) > + goto err_sys_clk_disable; > + > + /* > + * According to the hardware manual, a delay of at least 32 clock > + * cycles is required between de-asserting the clkgen reset and > + * de-asserting the GPU reset. Assuming a worst-case scenario with > + * a very high GPU clock frequency, a delay of 1 microsecond is > + * sufficient to ensure this requirement is met across all > + * feasible GPU clock speeds. > + */ > + udelay(1); > + > + err =3D reset_control_deassert(pvr_dev->reset); > + if (err) > + goto err_mem_clk_disable; > + > + return 0; > + > +err_mem_clk_disable: > + clk_disable_unprepare(pvr_dev->mem_clk); > + > +err_sys_clk_disable: > + clk_disable_unprepare(pvr_dev->sys_clk); > + > +err_core_clk_disable: > + clk_disable_unprepare(pvr_dev->core_clk); > + > + return err; > +} > + > +static int pvr_power_off_sequence_manual(struct pvr_device *pvr_dev) > +{ > + int err; > + > + err =3D reset_control_assert(pvr_dev->reset); > + > + clk_disable_unprepare(pvr_dev->mem_clk); > + clk_disable_unprepare(pvr_dev->sys_clk); > + clk_disable_unprepare(pvr_dev->core_clk); > + > + return err; > +} > + > +const struct pvr_power_sequence_ops pvr_power_sequence_ops_manual =3D = { > + .power_on =3D pvr_power_on_sequence_manual, > + .power_off =3D pvr_power_off_sequence_manual, > +}; > + > +#if IS_ENABLED(CONFIG_POWER_SEQUENCING) > +static int pvr_power_on_sequence_pwrseq(struct pvr_device *pvr_dev) > +{ > + return pwrseq_power_on(pvr_dev->pwrseq); > +} > + > +static int pvr_power_off_sequence_pwrseq(struct pvr_device *pvr_dev) > +{ > + return pwrseq_power_off(pvr_dev->pwrseq); > +} > + > +const struct pvr_power_sequence_ops pvr_power_sequence_ops_pwrseq =3D = { > + .power_on =3D pvr_power_on_sequence_pwrseq, > + .power_off =3D pvr_power_off_sequence_pwrseq, > +}; > +#else /* IS_ENABLED(CONFIG_POWER_SEQUENCING) */ > +static int pvr_power_sequence_pwrseq_stub(struct pvr_device *pvr_dev) > +{ > + WARN_ONCE(1, "pwrseq support not enabled in kernel config\n"); > + return -EOPNOTSUPP; > +} > + > +const struct pvr_power_sequence_ops pvr_power_sequence_ops_pwrseq =3D = { > + .power_on =3D pvr_power_sequence_pwrseq_stub, > + .power_off =3D pvr_power_sequence_pwrseq_stub, > +}; > +#endif /* IS_ENABLED(CONFIG_POWER_SEQUENCING) */ > + > int > pvr_power_device_suspend(struct device *dev) > { > @@ -252,11 +345,7 @@ pvr_power_device_suspend(struct device *dev) > goto err_drm_dev_exit; > } > =20 > - clk_disable_unprepare(pvr_dev->mem_clk); > - clk_disable_unprepare(pvr_dev->sys_clk); > - clk_disable_unprepare(pvr_dev->core_clk); > - > - err =3D reset_control_assert(pvr_dev->reset); > + err =3D pvr_dev->device_data->pwr_ops->power_off(pvr_dev); > =20 > err_drm_dev_exit: > drm_dev_exit(idx); > @@ -276,54 +365,22 @@ pvr_power_device_resume(struct device *dev) > if (!drm_dev_enter(drm_dev, &idx)) > return -EIO; > =20 > - err =3D clk_prepare_enable(pvr_dev->core_clk); > + err =3D pvr_dev->device_data->pwr_ops->power_on(pvr_dev); > if (err) > goto err_drm_dev_exit; > =20 > - err =3D clk_prepare_enable(pvr_dev->sys_clk); > - if (err) > - goto err_core_clk_disable; > - > - err =3D clk_prepare_enable(pvr_dev->mem_clk); > - if (err) > - goto err_sys_clk_disable; > - > - /* > - * According to the hardware manual, a delay of at least 32 clock > - * cycles is required between de-asserting the clkgen reset and > - * de-asserting the GPU reset. Assuming a worst-case scenario with > - * a very high GPU clock frequency, a delay of 1 microsecond is > - * sufficient to ensure this requirement is met across all > - * feasible GPU clock speeds. > - */ > - udelay(1); > - > - err =3D reset_control_deassert(pvr_dev->reset); > - if (err) > - goto err_mem_clk_disable; > - > if (pvr_dev->fw_dev.booted) { > err =3D pvr_power_fw_enable(pvr_dev); > if (err) > - goto err_reset_assert; > + goto err_power_off; > } > =20 > drm_dev_exit(idx); > =20 > return 0; > =20 > -err_reset_assert: > - reset_control_assert(pvr_dev->reset); > - > -err_mem_clk_disable: > - clk_disable_unprepare(pvr_dev->mem_clk); > - > -err_sys_clk_disable: > - clk_disable_unprepare(pvr_dev->sys_clk); > - > -err_core_clk_disable: > - clk_disable_unprepare(pvr_dev->core_clk); > - > +err_power_off: > + pvr_dev->device_data->pwr_ops->power_off(pvr_dev); Nit: can you put the blank line back here please? Cheers, Matt [1]: https://lore.kernel.org/r/f25c1e7f-bef2-47b1-8fa8-14c9c51087a8@imgte= c.com > err_drm_dev_exit: > drm_dev_exit(idx); > =20 > diff --git a/drivers/gpu/drm/imagination/pvr_power.h b/drivers/gpu/drm/= imagination/pvr_power.h > index ada85674a7ca762dcf92df40424230e1c3910342..6a2f3f6213e5ac2254344ad= 24d9678334c8974ea 100644 > --- a/drivers/gpu/drm/imagination/pvr_power.h > +++ b/drivers/gpu/drm/imagination/pvr_power.h > @@ -41,4 +41,17 @@ pvr_power_put(struct pvr_device *pvr_dev) > int pvr_power_domains_init(struct pvr_device *pvr_dev); > void pvr_power_domains_fini(struct pvr_device *pvr_dev); > =20 > +/** > + * struct pvr_power_sequence_ops - Platform specific power sequence op= erations. > + * @power_on: Pointer to the platform-specific power on function. > + * @power_off: Pointer to the platform-specific power off function. > + */ > +struct pvr_power_sequence_ops { > + int (*power_on)(struct pvr_device *pvr_dev); > + int (*power_off)(struct pvr_device *pvr_dev); > +}; > + > +extern const struct pvr_power_sequence_ops pvr_power_sequence_ops_manu= al; > +extern const struct pvr_power_sequence_ops pvr_power_sequence_ops_pwrs= eq; > + > #endif /* PVR_POWER_H */ >=20 --=20 Matt Coster E: matt.coster@imgtec.com --------------LgIKQih4XJdKfcTUVGxqK0lT-- --------------nTsZwlFshtTWAjMb6dIgkLOZ Content-Type: application/pgp-signature; name="OpenPGP_signature.asc" Content-Description: OpenPGP digital signature Content-Disposition: attachment; filename="OpenPGP_signature.asc" -----BEGIN PGP SIGNATURE----- wnsEABYIACMWIQS4qDmoJvwmKhjY+nN5vBnz2d5qsAUCaIC7oQUDAAAAAAAKCRB5vBnz2d5qsOsS AQDtO/CBUzcKv5VgnqJEaUbd6KWYbTjb4oEv2mmpm0nSGQEA8LJh2jY56uTFlqzQBj0n4FSpJUXj 7JYqx0mRMPK2lwM= =kiEm -----END PGP SIGNATURE----- --------------nTsZwlFshtTWAjMb6dIgkLOZ--