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From: Jishnu Prakash <jishnu.prakash@oss.qualcomm.com>
To: Jonathan Cameron <jic23@kernel.org>
Cc: "David Lechner" <dlechner@baylibre.com>,
	"Nuno Sá" <nuno.sa@analog.com>,
	"Andy Shevchenko" <andy@kernel.org>,
	"Amit Kucheria" <amitk@kernel.org>,
	"Thara Gopinath" <thara.gopinath@gmail.com>,
	"Rafael J. Wysocki" <rafael@kernel.org>,
	"Daniel Lezcano" <daniel.lezcano@kernel.org>,
	"Zhang Rui" <rui.zhang@intel.com>,
	"Lukasz Luba" <lukasz.luba@arm.com>,
	linux-arm-msm@vger.kernel.org, linux-iio@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org,
	"Kamal Wadhwa" <kamal.wadhwa@oss.qualcomm.com>,
	"David Collins" <david.collins@oss.qualcomm.com>,
	"Anjelique Melendez" <anjelique.melendez@oss.qualcomm.com>,
	"Neil Armstrong" <neil.armstrong@linaro.org>,
	"Stephan Gerhold" <stephan.gerhold@linaro.org>
Subject: Re: [PATCH 1/2] iio: adc: qcom-spmi-adc5-gen3: Share SDAM0 IRQ with ADC_TM auxiliary driver
Date: Thu, 21 May 2026 16:16:17 +0530	[thread overview]
Message-ID: <6c876a92-e572-4cb9-8c31-bbf681a4770b@oss.qualcomm.com> (raw)
In-Reply-To: <20260515145450.3b1e9c3d@jic23-huawei>

Hi Jonathan,

On 5/15/2026 7:24 PM, Jonathan Cameron wrote:
> On Fri, 15 May 2026 14:23:44 +0530
> Jishnu Prakash <jishnu.prakash@oss.qualcomm.com> wrote:
> 
>> The SDAM0 IRQ can be triggered for both EOC (end of conversion) events for
>> immediate ADC reads done in this driver and for threshold violation events,
>> based on ADC_TM thresholds configured from the auxiliary ADC_TM driver on
>> TM channels on the first SDAM.
>>
>> At present, this interrupt is handled only in the ISR in the main ADC driver.
>> When the ISR is triggered for an ADC_TM event, this driver notifies the ADC_TM
>> driver by calling a notifier callback exposed from it for this purpose.
>>
>> To simplify the interrupt handling in both drivers, share the interrupt between
>> the drivers. With this, ADC_TM interrupts on SDAM0 will be handled directly in
>> the ADC_TM driver, so remove the notifier callback and all TM interrupt
>> handling in the main ADC ISR.
>>
>> Signed-off-by: Jishnu Prakash <jishnu.prakash@oss.qualcomm.com>
>> ---
> 
> Some stuff from Sashiko on this one:
> https://sashiko.dev/#/patchset/20260515-gen3_adc_tm-v1-0-39ba29f9b4ab%40oss.qualcomm.com
> 
> Given I assume you didn't see the warning (I'm fairly sure the bots analysis is correct
> as we've been busy fixing similar cases all cycle), can I just check, have you tested
> this on latest upstream?

I had tested on a build based on top of Linux 7.1-rc2 and verified the driver's basic
functionality, but I think I overlooked the warning from the interrupt management code,
sorry about the miss.

> 
> Thanks,
> 
> Jonathan
> 
> 
>>  drivers/iio/adc/qcom-spmi-adc5-gen3.c         | 52 +++++----------------------
>>  include/linux/iio/adc/qcom-adc5-gen3-common.h |  2 --
>>  2 files changed, 8 insertions(+), 46 deletions(-)
>>
>> diff --git a/drivers/iio/adc/qcom-spmi-adc5-gen3.c b/drivers/iio/adc/qcom-spmi-adc5-gen3.c
>> index f8168a14b907..a819c3e627a0 100644
>> --- a/drivers/iio/adc/qcom-spmi-adc5-gen3.c
>> +++ b/drivers/iio/adc/qcom-spmi-adc5-gen3.c
> 
>>  static int adc5_gen3_probe(struct platform_device *pdev)
>>  {
>>  	struct device *dev = &pdev->dev;
>> @@ -818,7 +782,7 @@ static int adc5_gen3_probe(struct platform_device *pdev)
>>  	}
>>  
>>  	ret = devm_request_irq(dev, adc->dev_data.base[ADC5_GEN3_VADC_SDAM].irq,
>> -			       adc5_gen3_isr, 0,
>> +			       adc5_gen3_isr, IRQF_ONESHOT | IRQF_SHARED,
> 
> Sashikio points out that IRQF_ONESHOT is never correct for a non threaded
> interrupt.  The point of that flag is to ensure we don't handle another interrupt
> until the thread is done. If there isn't a thread then it doesn't do anything
> (other than omit a warning!)

I tried at first keeping only the IRQF_SHARED flag here, but it seems that
shared interrupts need to agree on the ONESHOT flag configuration, else the
second interrupt's IRQ request call fails.

And the ADC_TM interrupt needs to be ONESHOT, since we don't want that interrupt to
be rearmed before we have notified the thermal framework from the threaded
part of the handler. So I had to add the IRQF_ONESHOT here too, though it is
not useful here.

I think it's best to use a threaded IRQ handler in this driver too. I don't really
see any meaningful way to split the actions in the interrupt handler here into a primary
handler and a threaded handler, so is it fine if I just make the primary handler NULL
and move all the ISR functionality into the threaded handler part ?

Thanks,
Jishnu


> 
>>  			       adc->dev_data.base[ADC5_GEN3_VADC_SDAM].irq_name,
>>  			       adc);
>>  	if (ret)
>> diff --git a/include/linux/iio/adc/qcom-adc5-gen3-common.h b/include/linux/iio/adc/qcom-adc5-gen3-common.h
>> index 6303eaa6640b..39cbfcbdb101 100644
>> --- a/include/linux/iio/adc/qcom-adc5-gen3-common.h
>> +++ b/include/linux/iio/adc/qcom-adc5-gen3-common.h
>> @@ -205,7 +205,5 @@ int adc5_gen3_get_scaled_reading(struct device *dev,
>>  int adc5_gen3_therm_code_to_temp(struct device *dev,
>>  				 struct adc5_channel_common_prop *common_props,
>>  				 u16 code, int *val);
>> -void adc5_gen3_register_tm_event_notifier(struct device *dev,
>> -					  void (*handler)(struct auxiliary_device *));
>>  
>>  #endif /* QCOM_ADC5_GEN3_COMMON_H */
>>
> 


  reply	other threads:[~2026-05-21 10:46 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-05-15  8:53 [PATCH 0/2] thermal: qcom: add support for PMIC5 Gen3 ADC thermal monitoring Jishnu Prakash
2026-05-15  8:53 ` [PATCH 1/2] iio: adc: qcom-spmi-adc5-gen3: Share SDAM0 IRQ with ADC_TM auxiliary driver Jishnu Prakash
2026-05-15 13:54   ` Jonathan Cameron
2026-05-21 10:46     ` Jishnu Prakash [this message]
2026-05-22 10:47       ` Jonathan Cameron
2026-05-26 10:53         ` Jishnu Prakash
2026-05-17  7:08   ` Andy Shevchenko
2026-05-20 15:20     ` Daniel Lezcano
2026-05-15  8:53 ` [PATCH 2/2] thermal: qcom: add support for PMIC5 Gen3 ADC thermal monitoring Jishnu Prakash

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