[PATCH 2/3] arm64: dts: ti: k3-j7200: Add the supported frequencies for A72

Apurva Nandan
2023-08-09T17:39:34Z

From: Keerthy <j-keerthy@ti.com>

Add 750M, 1G, 1.5G & 2G as the supported frequencies for A72.
This enables support for Dynamic Frequency Scaling(DFS)

Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Apurva Nandan <a-nandan@ti.com>
---
arch/arm64/boot/dts/ti/k3-j7200.dtsi | 28 ++++++++++++++++++++++++++++
1 file changed, 28 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-j7200.dtsi b/arch/arm64/boot/dts/ti/k3-j7200.dtsi
index ef73e6d7e858..7222c453096f 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j7200.dtsi
@@ -48,6 +48,10 @@ cpu0: cpu@0 {
d-cache-line-size = <64>;
d-cache-sets = <256>;
next-level-cache = <&L2_0>;
+ clocks = <&k3_clks 202 2>;
+ clock-names = "cpu";
+ operating-points-v2 = <&cpu0_opp_table>;
+ #cooling-cells = <2>; /* min followed by max */
};

cpu1: cpu@1 {
@@ -62,6 +66,30 @@ cpu1: cpu@1 {
d-cache-line-size = <64>;
d-cache-sets = <256>;
next-level-cache = <&L2_0>;
+ clocks = <&k3_clks 203 0>;
+ clock-names = "cpu";
+ operating-points-v2 = <&cpu0_opp_table>;
+ #cooling-cells = <2>; /* min followed by max */
+ };
+ };
+
+ cpu0_opp_table: opp-table {
+ compatible = "operating-points-v2";
+
+ opp4-2000000000 {
+ opp-hz = /bits/ 64 <2000000000>;
+ };
+
+ opp3-1500000000 {
+ opp-hz = /bits/ 64 <1500000000>;
+ };
+
+ opp2-1000000000 {
+ opp-hz = /bits/ 64 <1000000000>;
+ };
+
+ opp1-750000000 {
+ opp-hz = /bits/ 64 <750000000>;
};
};

--
2.34.1