From: Krzysztof Kozlowski <krzk@kernel.org>
To: Nikunj Kela <quic_nkela@quicinc.com>,
andersson@kernel.org, konradybcio@kernel.org, robh@kernel.org,
krzk+dt@kernel.org, conor+dt@kernel.org, rafael@kernel.org,
viresh.kumar@linaro.org, herbert@gondor.apana.org.au,
davem@davemloft.net, sudeep.holla@arm.com, andi.shyti@kernel.org,
tglx@linutronix.de, will@kernel.org, joro@8bytes.org,
jassisinghbrar@gmail.com, lee@kernel.org,
linus.walleij@linaro.org, amitk@kernel.org,
thara.gopinath@gmail.com, broonie@kernel.org,
wim@linux-watchdog.org, linux@roeck-us.net
Cc: robin.murphy@arm.com, cristian.marussi@arm.com,
rui.zhang@intel.com, lukasz.luba@arm.com, vkoul@kernel.org,
quic_gurus@quicinc.com, agross@kernel.org,
bartosz.golaszewski@linaro.org, quic_rjendra@quicinc.com,
robimarko@gmail.com, linux-arm-msm@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-pm@vger.kernel.org, linux-crypto@vger.kernel.org,
arm-scmi@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-i2c@vger.kernel.org, iommu@lists.linux.dev,
linux-gpio@vger.kernel.org, linux-serial@vger.kernel.org,
linux-spi@vger.kernel.org, linux-watchdog@vger.kernel.org,
kernel@quicinc.com, quic_psodagud@quicinc.com,
quic_tsoni@quicinc.com, quic_shazhuss@quicinc.com
Subject: Re: [PATCH 22/22] arm64: dts: qcom: Add reduced functional DT for SA8255p Ride platform
Date: Thu, 29 Aug 2024 09:49:56 +0200 [thread overview]
Message-ID: <746be896-8798-44b0-aa86-e77cf34655e1@kernel.org> (raw)
In-Reply-To: <20240828203721.2751904-23-quic_nkela@quicinc.com>
On 28/08/2024 22:37, Nikunj Kela wrote:
> SA8255p Ride platform is an automotive virtual platform. This platform
> abstracts resources such as clocks, regulators etc. in the firmware VM.
> The device drivers request resources operations over SCMI using power,
> performance, reset and sensor protocols.
>
> Multiple virtual SCMI instances are being employed for greater parallelism.
> These instances are tied to devices such that devices can have dedicated
> SCMI channel. Firmware VM (runs SCMI platform stack) is SMP enabled and
> can process requests from agents in parallel. Qualcomm smc transport is
> used for communication between SCMI agent and platform.
>
> Let's add the reduced functional support for SA8255p Ride board.
> Subsequently, the support for PCIe, USB, UFS, Ethernet will be added.
>
> Co-developed-by: Shazad Hussain <quic_shazhuss@quicinc.com>
> Signed-off-by: Shazad Hussain <quic_shazhuss@quicinc.com>
> Signed-off-by: Nikunj Kela <quic_nkela@quicinc.com>
> ---
> arch/arm64/boot/dts/qcom/Makefile | 1 +
> arch/arm64/boot/dts/qcom/sa8255p-pmics.dtsi | 80 +
> arch/arm64/boot/dts/qcom/sa8255p-ride.dts | 149 ++
> arch/arm64/boot/dts/qcom/sa8255p-scmi.dtsi | 2312 ++++++++++++++++++
> arch/arm64/boot/dts/qcom/sa8255p.dtsi | 2405 +++++++++++++++++++
> 5 files changed, 4947 insertions(+)
> create mode 100644 arch/arm64/boot/dts/qcom/sa8255p-pmics.dtsi
> create mode 100644 arch/arm64/boot/dts/qcom/sa8255p-ride.dts
> create mode 100644 arch/arm64/boot/dts/qcom/sa8255p-scmi.dtsi
> create mode 100644 arch/arm64/boot/dts/qcom/sa8255p.dtsi
>
...
> diff --git a/arch/arm64/boot/dts/qcom/sa8255p-ride.dts b/arch/arm64/boot/dts/qcom/sa8255p-ride.dts
> new file mode 100644
> index 000000000000..1dc03051ad92
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/sa8255p-ride.dts
> @@ -0,0 +1,149 @@
> +// SPDX-License-Identifier: BSD-3-Clause
> +/*
> + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
> + */
> +
> +/dts-v1/;
> +
> +#include <dt-bindings/gpio/gpio.h>
> +
> +#include "sa8255p.dtsi"
> +#include "sa8255p-pmics.dtsi"
> +#include "sa8255p-scmi.dtsi"
> +
> +/ {
> + model = "Qualcomm Technologies, Inc. SA8255P Ride";
> + compatible = "qcom,sa8255p-ride", "qcom,sa8255p";
> +
> + aliases {
> + i2c11 = &i2c11;
> + i2c18 = &i2c18;
> + serial0 = &uart10;
> + serial1 = &uart4;
> + spi16 = &spi16;
> + scmichannels = &scmichannels;
Nothing parses this.
> +
> +#include <dt-bindings/interrupt-controller/arm-gic.h>
> +
> +&firmware {
> + scmi0: scmi0 {
scmi-0
> + compatible = "qcom,scmi-smc";
> + arm,smc-id = <0xc6008012>;
> + shmem = <&shmem0>;
> +
> + interrupts = <GIC_SPI 963 IRQ_TYPE_EDGE_RISING>;
> + interrupt-names = "a2p";
> +
> + max-rx-timeout-ms = <3000>;
> +
> + status = "disabled";
status is the last property (from properties)
...
> +
> +&soc {
> + scmichannels: sram@d0000000 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "mmio-sram";
> + reg = <0x0 0xd0000000 0x0 0x40000>;
> + ranges = <0x0 0x0 0x0 0xffffffff>;
> +
> + shmem0: scmi-sram@d0000000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0000000 0x1000>;
> + };
> +
> + shmem1: scmi-sram@d0001000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0001000 0x1000>;
> + };
> +
> + shmem2: scmi-sram@d0002000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0002000 0x1000>;
> + };
> +
> + shmem3: scmi-sram@d0003000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0003000 0x1000>;
> + };
> +
> + shmem4: scmi-sram@d0004000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0004000 0x1000>;
> + };
> +
> + shmem5: scmi-sram@d0005000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0005000 0x1000>;
> + };
> +
> + shmem6: scmi-sram@d0006000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0006000 0x1000>;
> + };
> +
> + shmem7: scmi-sram@d0007000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0007000 0x1000>;
> + };
> +
> + shmem8: scmi-sram@d0008000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0008000 0x1000>;
> + };
> +
> + shmem9: scmi-sram@d0009000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0009000 0x1000>;
> + };
> +
> + shmem10: scmi-sram@d000a000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd000a000 0x1000>;
> + };
> +
> + shmem11: scmi-sram@d000b000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd000b000 0x1000>;
> + };
> +
> + shmem12: scmi-sram@d000c000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd000c000 0x1000>;
> + };
> +
> + shmem13: scmi-sram@d000d000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd000d000 0x1000>;
> + };
> +
> + shmem14: scmi-sram@d000e000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd000e000 0x1000>;
> + };
> +
> + shmem15: scmi-sram@d000f000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd000f000 0x1000>;
> + };
> +
> + shmem16: scmi-sram@d0010000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0010000 0x1000>;
> + };
> +
> + shmem17: scmi-sram@d0011000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0011000 0x1000>;
> + };
> +
> + shmem18: scmi-sram@d0012000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0012000 0x1000>;
> + };
> +
> + shmem19: scmi-sram@d0013000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0013000 0x1000>;
> + };
> +
> + shmem20: scmi-sram@d0014000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0014000 0x1000>;
> + };
> +
> + shmem21: scmi-sram@d0015000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0015000 0x1000>;
> + };
> +
> + shmem22: scmi-sram@d0016000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0016000 0x1000>;
> + };
> +
> + shmem23: scmi-sram@d0017000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0017000 0x1000>;
> + };
> +
> + shmem24: scmi-sram@d0018000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0018000 0x1000>;
> + };
> +
> + shmem25: scmi-sram@d0019000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0019000 0x1000>;
> + };
> +
> + shmem26: scmi-sram@d001a000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd001a000 0x1000>;
> + };
> +
> + shmem27: scmi-sram@d001b000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd001b000 0x1000>;
> + };
> +
> + shmem28: scmi-sram@d001c000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd001c000 0x1000>;
> + };
> +
> + shmem29: scmi-sram@d001d000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd001d000 0x1000>;
> + };
> +
> + shmem30: scmi-sram@d001e000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd001e000 0x1000>;
> + };
> +
> + shmem31: scmi-sram@d001f000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd001f000 0x1000>;
> + };
> +
> + shmem32: scmi-sram@d0020000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0020000 0x1000>;
> + };
> +
> + shmem33: scmi-sram@d0021000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0021000 0x1000>;
> + };
> +
> + shmem34: scmi-sram@d0022000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0022000 0x1000>;
> + };
> +
> + shmem35: scmi-sram@d0023000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0023000 0x1000>;
> + };
> +
> + shmem36: scmi-sram@d0024000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0024000 0x1000>;
> + };
> +
> + shmem37: scmi-sram@d0025000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0025000 0x1000>;
> + };
> +
> + shmem38: scmi-sram@d0026000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0026000 0x1000>;
> + };
> +
> + shmem39: scmi-sram@d0027000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0027000 0x1000>;
> + };
> +
> + shmem40: scmi-sram@d0028000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0028000 0x1000>;
> + };
> +
> + shmem41: scmi-sram@d0029000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0029000 0x1000>;
> + };
> +
> + shmem42: scmi-sram@d002a000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd002a000 0x1000>;
> + };
> +
> + shmem43: scmi-sram@d002b000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd002b000 0x1000>;
> + };
> +
> + shmem44: scmi-sram@d002c000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd002c000 0x1000>;
> + };
> +
> + shmem45: scmi-sram@d002d000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd002d000 0x1000>;
> + };
> +
> + shmem46: scmi-sram@d002e000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd002e000 0x1000>;
> + };
> +
> + shmem47: scmi-sram@d002f000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd002f000 0x1000>;
> + };
> +
> + shmem48: scmi-sram@d0030000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0030000 0x1000>;
> + };
> +
> + shmem49: scmi-sram@d0031000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0031000 0x1000>;
> + };
> +
> + shmem50: scmi-sram@d0032000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0032000 0x1000>;
> + };
> +
> + shmem51: scmi-sram@d0033000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0033000 0x1000>;
> + };
> +
> + shmem52: scmi-sram@d0034000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0034000 0x1000>;
> + };
> +
> + shmem53: scmi-sram@d0035000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0035000 0x1000>;
> + };
> +
> + shmem54: scmi-sram@d0036000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0036000 0x1000>;
> + };
> +
> + shmem55: scmi-sram@d0037000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0037000 0x1000>;
> + };
> +
> + shmem56: scmi-sram@d0038000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0038000 0x1000>;
> + };
> +
> + shmem57: scmi-sram@d0039000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0039000 0x1000>;
> + };
> +
> + shmem58: scmi-sram@d003a000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd003a000 0x1000>;
> + };
> +
> + shmem59: scmi-sram@d003b000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd003b000 0x1000>;
> + };
> +
> + shmem60: scmi-sram@d003c000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd003c000 0x1000>;
> + };
> +
> + shmem61: scmi-sram@d003d000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd003d000 0x1000>;
> + };
> +
> + shmem62: scmi-sram@d003e000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd003e000 0x1000>;
> + };
> +
> + shmem63: scmi-sram@d003f000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd003f000 0x1000>;
> + };
> + };
> +};
> diff --git a/arch/arm64/boot/dts/qcom/sa8255p.dtsi b/arch/arm64/boot/dts/qcom/sa8255p.dtsi
> new file mode 100644
> index 000000000000..c354f76ffa5e
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/sa8255p.dtsi
> @@ -0,0 +1,2405 @@
> +// SPDX-License-Identifier: BSD-3-Clause
> +/*
> + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
> + */
> +
> +#include <dt-bindings/interrupt-controller/arm-gic.h>
> +#include <dt-bindings/mailbox/qcom-ipcc.h>
> +
> +/ {
> + interrupt-parent = <&intc>;
> +
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + clocks {
> + xo_board_clk: xo-board-clk {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + };
> +
> + sleep_clk: sleep-clk {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + };
> +
> + gpll0_board_clk: gpll0-board-clk {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + };
> +
> + bi_tcxo_div2: bi-tcxo-div2-clk {
> + compatible = "fixed-factor-clock";
> + clocks = <&xo_board_clk>;
> + clock-mult = <1>;
> + clock-div = <2>;
> + #clock-cells = <0>;
> + };
> + };
> +
> + cpus {
> + #address-cells = <2>;
> + #size-cells = <0>;
> +
> + CPU0: cpu@0 {
Lowercase label.
...
Best regards,
Krzysztof
next prev parent reply other threads:[~2024-08-29 7:50 UTC|newest]
Thread overview: 147+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-08-28 20:36 [PATCH 00/22] arm64: qcom: Introduce SA8255p Ride platform Nikunj Kela
2024-08-28 20:37 ` [PATCH 01/22] dt-bindings: arm: qcom: add the SoC ID for SA8255P Nikunj Kela
2024-08-29 6:26 ` Krzysztof Kozlowski
2024-08-28 20:37 ` [PATCH 02/22] soc: qcom: socinfo: add support " Nikunj Kela
2024-08-29 6:26 ` Krzysztof Kozlowski
2024-08-28 20:37 ` [PATCH 03/22] dt-bindings: arm: qcom: add SA8255p Ride board Nikunj Kela
2024-08-29 6:26 ` Krzysztof Kozlowski
2024-08-28 20:37 ` [PATCH 04/22] dt-bindings: firmware: qcom,scm: document support for SA8255p Nikunj Kela
2024-08-29 6:28 ` Krzysztof Kozlowski
2024-08-28 20:37 ` [PATCH 05/22] dt-bindings: mailbox: qcom-ipcc: document the " Nikunj Kela
2024-08-29 6:29 ` Krzysztof Kozlowski
2024-08-28 20:37 ` [PATCH 06/22] dt-bindings: watchdog: qcom-wdt: document support on SA8255p Nikunj Kela
2024-08-29 6:29 ` Krzysztof Kozlowski
2024-08-28 20:37 ` [PATCH 07/22] dt-bindings: crypto: qcom,prng: document support for SA8255p Nikunj Kela
2024-08-29 7:27 ` Krzysztof Kozlowski
2024-08-28 20:37 ` [PATCH 08/22] dt-bindings: interrupt-controller: qcom-pdc: " Nikunj Kela
2024-08-29 7:28 ` Krzysztof Kozlowski
2024-08-28 20:37 ` [PATCH 09/22] dt-bindings: soc: qcom: aoss-qmp: " Nikunj Kela
2024-08-29 7:28 ` Krzysztof Kozlowski
2024-08-28 20:37 ` [PATCH 10/22] dt-bindings: pinctrl: " Nikunj Kela
2024-08-29 7:30 ` Krzysztof Kozlowski
2024-08-28 20:37 ` [PATCH 11/22] pinctrl: qcom: sa8775p: Add support for SA8255p SoC Nikunj Kela
2024-08-29 7:29 ` Krzysztof Kozlowski
2024-08-29 14:17 ` Nikunj Kela
2024-08-30 9:52 ` Krzysztof Kozlowski
2024-09-03 15:24 ` Nikunj Kela
2024-09-03 15:34 ` Krzysztof Kozlowski
2024-08-28 20:37 ` [PATCH 12/22] dt-bindings: cpufreq: qcom-hw: document support for SA8255p Nikunj Kela
2024-08-29 7:32 ` Krzysztof Kozlowski
2024-08-28 20:37 ` [PATCH 13/22] dt-bindings: thermal: tsens: document support on SA8255p Nikunj Kela
2024-08-29 7:33 ` Krzysztof Kozlowski
2024-09-02 11:13 ` Daniel Lezcano
2024-08-28 20:37 ` [PATCH 14/22] dt-bindings: arm-smmu: document the " Nikunj Kela
2024-08-29 7:36 ` Krzysztof Kozlowski
2024-08-29 15:39 ` Nikunj Kela
2024-08-30 10:00 ` Krzysztof Kozlowski
2024-08-28 20:37 ` [PATCH 15/22] dt-bindings: mfd: qcom,tcsr: document support for SA8255p Nikunj Kela
2024-08-29 7:37 ` Krzysztof Kozlowski
2024-08-28 20:37 ` [PATCH 16/22] dt-bindings: qcom: geni-se: document support for SA8255P Nikunj Kela
2024-08-28 23:44 ` Rob Herring (Arm)
2024-08-29 7:42 ` Krzysztof Kozlowski
2024-08-29 14:23 ` Nikunj Kela
2024-08-30 9:58 ` Krzysztof Kozlowski
2024-08-30 14:55 ` Nikunj Kela
2024-08-28 20:37 ` [PATCH 17/22] dt-bindings: serial: document support for SA8255p Nikunj Kela
2024-08-29 7:41 ` Krzysztof Kozlowski
2024-08-29 14:27 ` Nikunj Kela
2024-08-28 20:37 ` [PATCH 18/22] dt-bindings: spi: " Nikunj Kela
2024-08-28 23:45 ` Rob Herring (Arm)
2024-08-29 3:06 ` Rob Herring
2024-08-29 14:28 ` Nikunj Kela
2024-08-28 20:37 ` [PATCH 19/22] dt-bindings: i2c: " Nikunj Kela
2024-08-29 7:44 ` Krzysztof Kozlowski
2024-08-28 20:37 ` [PATCH 20/22] dt-bindings: firmware: arm,scmi: allow multiple virtual instances Nikunj Kela
2024-08-29 7:45 ` Krzysztof Kozlowski
2024-08-28 20:37 ` [PATCH 21/22] ARM: dt: GIC: add extended SPI specifier Nikunj Kela
2024-08-29 7:46 ` Krzysztof Kozlowski
2024-08-29 18:52 ` Rob Herring
2024-08-29 19:01 ` Nikunj Kela
2024-08-30 14:44 ` Rob Herring
2024-08-30 14:51 ` Nikunj Kela
2024-08-28 20:37 ` [PATCH 22/22] arm64: dts: qcom: Add reduced functional DT for SA8255p Ride platform Nikunj Kela
2024-08-29 7:49 ` Krzysztof Kozlowski [this message]
2024-08-29 19:06 ` Nikunj Kela
2024-08-30 9:51 ` Krzysztof Kozlowski
2024-08-30 14:58 ` Nikunj Kela
2024-08-29 7:57 ` [PATCH 00/22] arm64: qcom: Introduce " Krzysztof Kozlowski
2024-08-29 14:32 ` Nikunj Kela
2024-09-03 22:02 ` [PATCH v2 00/21] " Nikunj Kela
2024-09-03 22:02 ` [PATCH v2 01/21] dt-bindings: arm: qcom: add the SoC ID for SA8255P Nikunj Kela
2024-09-03 22:02 ` [PATCH v2 02/21] soc: qcom: socinfo: add support " Nikunj Kela
2024-09-03 22:02 ` [PATCH v2 03/21] dt-bindings: arm: qcom: add SA8255p Ride board Nikunj Kela
2024-09-03 22:02 ` [PATCH v2 04/21] dt-bindings: firmware: qcom,scm: document support for SA8255p Nikunj Kela
2024-09-03 22:02 ` [PATCH v2 05/21] dt-bindings: mailbox: qcom-ipcc: document the " Nikunj Kela
2024-09-03 22:02 ` [PATCH v2 06/21] dt-bindings: watchdog: qcom-wdt: document support on SA8255p Nikunj Kela
2024-09-03 22:02 ` [PATCH v2 07/21] dt-bindings: crypto: qcom,prng: document support for SA8255p Nikunj Kela
2024-09-03 22:02 ` [PATCH v2 08/21] dt-bindings: interrupt-controller: qcom-pdc: " Nikunj Kela
2024-09-03 22:02 ` [PATCH v2 09/21] dt-bindings: soc: qcom: aoss-qmp: " Nikunj Kela
2024-09-03 22:02 ` [PATCH v2 10/21] dt-bindings: arm-smmu: document the support on SA8255p Nikunj Kela
2024-09-03 22:02 ` [PATCH v2 11/21] dt-bindings: mfd: qcom,tcsr: document support for SA8255p Nikunj Kela
2024-09-03 22:02 ` [PATCH v2 12/21] dt-bindings: thermal: tsens: document support on SA8255p Nikunj Kela
2024-09-06 7:38 ` Daniel Lezcano
2024-09-03 22:02 ` [PATCH v2 13/21] dt-bindings: pinctrl: Add SA8255p TLMM Nikunj Kela
2024-09-04 1:50 ` Rob Herring (Arm)
2024-09-03 22:02 ` [PATCH v2 14/21] dt-bindings: cpufreq: qcom-hw: document support for SA8255p Nikunj Kela
2024-09-04 6:26 ` Krzysztof Kozlowski
2024-09-04 12:27 ` Nikunj Kela
2024-09-04 13:17 ` Krzysztof Kozlowski
2024-09-04 14:19 ` Nikunj Kela
2024-09-04 14:29 ` Krzysztof Kozlowski
2024-09-03 22:02 ` [PATCH v2 15/21] dt-bindings: i2c: " Nikunj Kela
2024-09-04 6:31 ` Krzysztof Kozlowski
2024-09-04 12:41 ` Nikunj Kela
2024-09-04 13:20 ` Krzysztof Kozlowski
2024-09-04 7:49 ` Krzysztof Kozlowski
2024-09-04 7:55 ` Wolfram Sang
2024-09-04 12:45 ` Nikunj Kela
2024-09-04 13:20 ` Krzysztof Kozlowski
2024-09-05 19:28 ` Andi Shyti
2024-09-03 22:02 ` [PATCH v2 16/21] dt-bindings: spi: " Nikunj Kela
2024-09-04 6:34 ` Krzysztof Kozlowski
2024-09-04 12:48 ` Nikunj Kela
2024-09-04 13:21 ` Krzysztof Kozlowski
2024-09-04 16:14 ` Nikunj Kela
2024-09-04 16:58 ` Andrew Lunn
2024-09-04 21:06 ` Nikunj Kela
2024-09-04 21:49 ` Andrew Lunn
2024-09-05 8:04 ` Krzysztof Kozlowski
2024-09-05 14:03 ` Nikunj Kela
2024-09-05 14:09 ` Krzysztof Kozlowski
2024-09-05 14:15 ` Nikunj Kela
2024-09-05 14:39 ` Krzysztof Kozlowski
2024-09-05 16:08 ` Nikunj Kela
2024-09-05 16:23 ` Andrew Lunn
2024-09-05 16:39 ` Nikunj Kela
2024-09-05 17:35 ` Andrew Lunn
2024-09-05 16:56 ` Krzysztof Kozlowski
2024-09-05 17:00 ` Krzysztof Kozlowski
2024-09-05 14:46 ` Andrew Lunn
2024-09-05 14:49 ` Krzysztof Kozlowski
2024-09-05 15:43 ` Nikunj Kela
2024-09-09 20:29 ` Nikunj Kela
2024-09-09 22:00 ` Mark Brown
2024-09-05 13:21 ` Dmitry Baryshkov
2024-09-04 7:48 ` Krzysztof Kozlowski
2024-09-04 12:49 ` Nikunj Kela
2024-09-05 13:22 ` Dmitry Baryshkov
2024-09-03 22:02 ` [PATCH v2 17/21] dt-bindings: serial: " Nikunj Kela
2024-09-04 6:36 ` Krzysztof Kozlowski
2024-09-04 12:54 ` Nikunj Kela
2024-09-04 13:24 ` Krzysztof Kozlowski
2024-09-04 7:47 ` Krzysztof Kozlowski
2024-09-04 12:56 ` Nikunj Kela
2024-09-04 13:16 ` Krzysztof Kozlowski
2024-09-04 17:05 ` Andrew Lunn
2024-09-04 21:10 ` Nikunj Kela
2024-09-04 21:54 ` Andrew Lunn
2024-09-05 8:08 ` Krzysztof Kozlowski
2024-09-03 22:02 ` [PATCH v2 18/21] dt-bindings: qcom: geni-se: document support for SA8255P Nikunj Kela
2024-09-03 22:02 ` [PATCH v2 19/21] dt-bindings: firmware: arm,scmi: allow multiple virtual instances Nikunj Kela
2024-09-04 6:39 ` Krzysztof Kozlowski
2024-09-03 22:02 ` [PATCH v2 20/21] dt-bindings: arm: GIC: add ESPI and EPPI specifiers Nikunj Kela
2024-09-03 22:02 ` [PATCH v2 21/21] arm64: dts: qcom: Add reduced functional DT for SA8255p Ride platform Nikunj Kela
2024-09-04 5:54 ` [PATCH v2 00/21] arm64: qcom: Introduce " Krzysztof Kozlowski
2024-09-04 12:58 ` Nikunj Kela
2024-09-04 23:50 ` Nikunj Kela
2024-09-05 12:59 ` Dmitry Baryshkov
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=746be896-8798-44b0-aa86-e77cf34655e1@kernel.org \
--to=krzk@kernel.org \
--cc=agross@kernel.org \
--cc=amitk@kernel.org \
--cc=andersson@kernel.org \
--cc=andi.shyti@kernel.org \
--cc=arm-scmi@vger.kernel.org \
--cc=bartosz.golaszewski@linaro.org \
--cc=broonie@kernel.org \
--cc=conor+dt@kernel.org \
--cc=cristian.marussi@arm.com \
--cc=davem@davemloft.net \
--cc=devicetree@vger.kernel.org \
--cc=herbert@gondor.apana.org.au \
--cc=iommu@lists.linux.dev \
--cc=jassisinghbrar@gmail.com \
--cc=joro@8bytes.org \
--cc=kernel@quicinc.com \
--cc=konradybcio@kernel.org \
--cc=krzk+dt@kernel.org \
--cc=lee@kernel.org \
--cc=linus.walleij@linaro.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-crypto@vger.kernel.org \
--cc=linux-gpio@vger.kernel.org \
--cc=linux-i2c@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pm@vger.kernel.org \
--cc=linux-serial@vger.kernel.org \
--cc=linux-spi@vger.kernel.org \
--cc=linux-watchdog@vger.kernel.org \
--cc=linux@roeck-us.net \
--cc=lukasz.luba@arm.com \
--cc=quic_gurus@quicinc.com \
--cc=quic_nkela@quicinc.com \
--cc=quic_psodagud@quicinc.com \
--cc=quic_rjendra@quicinc.com \
--cc=quic_shazhuss@quicinc.com \
--cc=quic_tsoni@quicinc.com \
--cc=rafael@kernel.org \
--cc=robh@kernel.org \
--cc=robimarko@gmail.com \
--cc=robin.murphy@arm.com \
--cc=rui.zhang@intel.com \
--cc=sudeep.holla@arm.com \
--cc=tglx@linutronix.de \
--cc=thara.gopinath@gmail.com \
--cc=viresh.kumar@linaro.org \
--cc=vkoul@kernel.org \
--cc=will@kernel.org \
--cc=wim@linux-watchdog.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).