From: "Zhang, Rui" <rui.zhang@intel.com>
To: Daniel Lezcano <daniel.lezcano@linaro.org>,
"rafael@kernel.org" <rafael@kernel.org>
Cc: "quic_manafm@quicinc.com" <quic_manafm@quicinc.com>,
"amitk@kernel.org" <amitk@kernel.org>,
"lukasz.luba@arm.com" <lukasz.luba@arm.com>,
"linux-pm@vger.kernel.org" <linux-pm@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: RE: [PATCH v3 3/4] thermal/core: Build ascending ordered indexes for the trip points
Date: Fri, 22 Jul 2022 07:15:56 +0000 [thread overview]
Message-ID: <86eac26233874ff389498e24c8253e0c@intel.com> (raw)
In-Reply-To: <f0c217a2-7df0-c8ed-d2ae-c6019c7600d8@linaro.org>
> -----Original Message-----
> From: Daniel Lezcano <daniel.lezcano@linaro.org>
> Sent: Thursday, July 21, 2022 5:35 PM
> To: Zhang, Rui <rui.zhang@intel.com>; rafael@kernel.org
> Cc: quic_manafm@quicinc.com; amitk@kernel.org; lukasz.luba@arm.com;
> linux-pm@vger.kernel.org; linux-kernel@vger.kernel.org
> Subject: Re: [PATCH v3 3/4] thermal/core: Build ascending ordered indexes
> for the trip points
> Importance: High
>
> On 19/07/2022 16:17, Zhang Rui wrote:
> > On Tue, 2022-07-19 at 09:22 +0200, Daniel Lezcano wrote:
> >> On 19/07/2022 03:14, Zhang Rui wrote:
> >>> On Mon, 2022-07-18 at 15:21 +0200, Daniel Lezcano wrote:
> >>>>
> >>>> Hi Zhang,
> >>>>
> >>>> thanks for the review
> >>>>
> >>>> On 18/07/2022 07:28, Zhang Rui wrote:
> >>>>> On Fri, 2022-07-15 at 23:09 +0200, Daniel Lezcano wrote:
> >>>>
> >>>> [ ... ]
> >>>>
> >>>>>> Instead of taking the risk of breaking the existing platforms,
> >>>>>> use an array of temperature ordered trip identifiers and make it
> >>>>>> available for the code needing to browse the trip points in an
> >>>>>> ordered way.
> >>>>>>
> >>>>>> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
> >>>>>> ---
> >>>>
> >>>> [ ... ]
> >>>>
> >>>>>> +static void sort_trips_indexes(struct thermal_zone_device
> >>>>>> *tz)
> >>>>>> +{
> >>>>>> + int i, j;
> >>>>>> +
> >>>>>> + for (i = 0; i < tz->trips; i++)
> >>>>>> + tz->trips_indexes[i] = i;
> >>>>>> +
> >>>>>> + for (i = 0; i < tz->trips; i++) {
> >>>>>> + for (j = i + 1; j < tz->trips; j++) {
> >>>>>> + int t1, t2;
> >>>>>> +
> >>>>>> + tz->ops->get_trip_temp(tz, tz-
> >>>>>>> trips_indexes[i], &t1);
> >>>>>
> >>>>> This line can be moved to the upper loop.
> >>>>
> >>>> Right, thanks!
> >>>>
> >>>>>> + tz->ops->get_trip_temp(tz, tz-
> >>>>>>> trips_indexes[j], &t2);
> >>>>>> +
> >>>>>
> >>>>> what about the disabled trip points?
> >>>>>
> >>>>> we should ignore those trip points and check the return value to
> >>>>> make sure we're comparing the valid trip_temp values.
> >>>>
> >>>> We don't have to care about, whatever the position, the
> >>>> corresponding trip id will be disabled by the trip init function
> >>>> before calling this one and ignored in the handle_thermal_trip()
> >>>> function
> >>>
> >>> hah, I missed this one and replied to your latest reply directly.
> >>>
> >>> The thing I'm concerning is that if we don't check the return value,
> >>> for a disabled trip point, the trip_temp (t1/t2) returned is some
> >>> random value, it all depends on the previous value set by last
> >>> successful .get_trip_temp(), and this may screw up the sorting.
> >>
> >> The indexes array is the same size as the trip array, that makes the
> >> code much less prone to errors.
> >>
> >> To have the same number of trip points, the index of the disabled
> >> trip must be inserted also in the array. We don't care about its
> >> position in the indexes array because it is discarded in the
> >> handle_trip_point() function anyway. For this reason, the random
> >> temperature of the disabled trip point and the resulting position in
> >> the sorting is harmless.
> >>
> >> It is made on purpose to ignore the return value, so we have a
> >> simpler code.
> >>
> > Let's take below case for example,
> > say, we have three trip points 0, 1, 2, and trip point 1 is broken and
> > disabled.
> >
> > trip temp for trip point 0 is 10 and for trip point 2 is 20.
> > .get_trip_temp(tz, 1, &t) fails, and t is an uninitialized random
> > value
> >
> >
> > Initial:
> > trip_indexes[0]=0,trip_indexes[1]=1,trip_indexes[2]=2
> > step1:
> > i=0,j=1
> > get trip temp for trip point trip_indexes[0]=0 and trip_indexes[1]=1
> > trip point 1 returns trip temp 5, and it swaps with trip point 0
> > so
> > trip_indexes[0]=1,trip_indexes[1]=0,trip_indexes[2]=2
> > step2:
> > i=0,j=2
> > get trip temp for trip point trip_indexes[0]=1 and trip_indexes[2]=2
> > trip point 1 returns trip temp 25, and it swaps with trip point 2
> > so
> > trip_indexes[0]=2,trip_indexes[1]=0,trip_indexes[2]=1
> >
> > And the sorting is broken now.
> >
> > please correct me if I'm missing anything.
>
> Oh, nice! Thanks for the detailed explanation.
>
> We can initialize t1 and t2 to INT_MAX, so if the get_trip_temp() fails, they
> will be set to the maximum temperature and it will be at the end of the array.
>
> Alternatively, we check the disabled bit and set the temperature to INT_MAX.
IMO, we can
1. get the trip temp for each trip point and cache them
2. set the trips_disabled bit
3. do the sorting using the cached trip temp values
in thermal_zone_device_trip_init() altogether.
Thanks,
rui
>
>
>
>
>
> --
> <http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs
>
> Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |
> <http://twitter.com/#!/linaroorg> Twitter | <http://www.linaro.org/linaro-
> blog/> Blog
next prev parent reply other threads:[~2022-07-22 7:17 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-15 21:09 [PATCH v3 1/4] thermal/core: Encapsulate the trip point crossed function Daniel Lezcano
2022-07-15 21:09 ` [PATCH v3 2/4] thermal/core: Avoid calling ->get_trip_temp() unnecessarily Daniel Lezcano
2022-07-18 4:59 ` Zhang Rui
2022-07-18 14:04 ` Daniel Lezcano
2022-07-19 1:01 ` Zhang Rui
2022-07-15 21:09 ` [PATCH v3 3/4] thermal/core: Build ascending ordered indexes for the trip points Daniel Lezcano
2022-07-18 5:28 ` Zhang Rui
2022-07-18 13:21 ` Daniel Lezcano
2022-07-19 1:14 ` Zhang Rui
2022-07-19 1:35 ` Zhang Rui
2022-07-19 7:22 ` Daniel Lezcano
2022-07-19 14:17 ` Zhang Rui
2022-07-21 9:34 ` Daniel Lezcano
2022-07-22 7:15 ` Zhang, Rui [this message]
2022-07-22 16:49 ` Rafael J. Wysocki
2022-07-18 14:32 ` Daniel Lezcano
2022-07-19 1:07 ` Zhang Rui
2022-07-15 21:09 ` [PATCH v3 4/4] thermal/core: Fix thermal trip cross point Daniel Lezcano
2022-07-18 5:30 ` Zhang Rui
2023-10-26 18:37 ` Rafael J. Wysocki
2022-07-18 4:58 ` [PATCH v3 1/4] thermal/core: Encapsulate the trip point crossed function Zhang Rui
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